CHERRY CS8129YTHA5

CS8129
CS8129
5V, 750mA Low Dropout Linear
Regulator with Lower RESET Threshold
Description
The CS8129 is a precision 5V linear regulator capable of sourcing 750mA.
The RESET threshold voltage has been
lowered to 4.2V so that the regulator
can be used with 4V microprocessors.
The lower RESET threshold also permits operation under low battery conditions (5.5V plus a diode). The RESET Õs
delay time is externally programmed
using a discrete RC network. During
power up, or when the output goes out
of regulation, RESET remains in the
low state for the duration of the delay.
This function is independent of the
input voltage and will function correctly as long as the output voltage remains
at or above 1V. Hysteresis is included in
Features
the Delay and the RESET comparators
to improve noise immunity. A latching
discharge circuit is used to discharge
the delay capacitor when it is triggered
by a brief fault condition.
The regulator is protected against a
variety of fault conditions: i.e. reverse
battery, overvoltage, short circuit and
thermal runaway conditions. The regulator is protected against voltage transients ranging from -50V to +40V. Short
circuit current is limited to 1.2A (typ).
The CS8129 is packaged in a 5 lead
TOÐ220 and a 16 lead surface mount
package.
Block Diagram
VIN
Over Voltage
Shutdown
VOUT
■ 5V +/- 3% Regulated
Output
■ Low Dropout Voltage
(0.6V @ 0.5A)
■ 750mA Output Current
Capability
■ Reduced RESET Threshold
for use with 4V Microprocessors
■ Externally Programmed
RESET Delay
■ Fault Protection
Reverse Battery
60V, -50V Peak Transient
Voltage
Short Circuit
Thermal Shutdown
Package Options
16 Lead SOIC Wide
VIN
Regulated Supply
for Circuit Bias
PreRegulator
Error
Amplifier
Bandgap
Reference
+
-
Charge
Current
Generator
Anti-Saturation
and
Current Limit
VOUTSENSE
Thermal
Shutdown
Latching Discharge
VOUT
1
NC
NC
NC
VOUT(SENSE)
Gnd
Gnd
Gnd
Gnd
RESET
Gnd
NC
NC
Delay
NC
Delay
Q
S
+
5 Lead TO-220
R
+
-
VDISCHARGE
+
-
Delay Comparator
RESET
Gnd
1
1 VIN
2 RESET
3 Gnd
4 Delay
5 VOUT
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 3/31/99
1
A
¨
Company
CS8129
Absolute Maximum Ratings
Input Operating Range..................................................................................................................................................-0.5 to 26V
Power Dissipation.............................................................................................................................................Internally Limited
Peak Transient Voltage (46V Load Dump @ 14V VIN) ...............................................................................................-50V, 60V
Output Current .................................................................................................................................................Internally Limited
ESD Susceptibility (Human Body Model)..............................................................................................................................4kV
Junction Temperature .............................................................................................................................................-55¡C to 150¡C
Storage Temperature...............................................................................................................................................-55¡C to 150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260¡C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183¡C, 230¡C peak
Electrical Characteristics: -40ûC ² TA ² + 125ûC, -40ûC ² TJ ² +150ûC, 6V ² VIN ² 26V, 5mA ² IOUT ² 500mA, R RESET = 4.7k½ to VOUT
unless otherwise noted*
PARAMETER
■
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output Stage (VOUT)
Output Voltage
5.00
5.15
V
Dropout Voltage
IOUT = 500mA
4.85
0.35
0.60
V
Supply Current
IOUT ² 10mA
IOUT ² 100mA
IOUT ² 500mA
2
6
55
7
12
100
mA
Line Regulation
6V ² VIN ² 26V, IOUT = 50mA
5
50
mV
Load Regulation
50mA ² IOUT ² 500mA, VIN = 14V
10
50
mV
Ripple Rejection
f = 120Hz, VIN = 7 to 17V,
IOUT = 250mA
Current Limit
Overvoltage Shutdown
54
75
0.75
1.20
32
dB
A
40
V
Reverse Polarity Input
Voltage DC
VOUT ³ -0.6V, 10½ Load
-15
-30
V
Thermal Shutdown
Guaranteed by Design
150
180
210
¡C
5
10
15
µA
4.05
4.00
4.35
4.20
4.50
4.45
V
V
50
150
250
mV
3.25
2.85
3.50
3.10
3.75
3.35
V
V
200
400
800
mV
0.1
0.4
V
0
10
µA
0.2
0.5
V
32
48
ms
■ RESET and Delay Functions
Delay Charge Current
VDELAY = 2V
RESET Threshold
VOUT Increasing, VRT(ON)
VOUT Decreasing, VRT(OFF)
RESET Hysteresis
VRH=VRT(ON) - VRT(OFF)
Delay Threshold
Charge, VDC(HI)
Discharge, VDC(LO)
Delay Hysteresis
RESET Output Voltage Low1V < VOUT < VRT(L) , 3k½ to VOUT
RESET Output Leakage
VOUT > VRT(H)
Current
Delay Capacitor
Discharge Voltage
Discharge Latched ÒONÓ,
VOUT > VRT
Delay Time
CDELAY = 0.1µF (Note 1)
16
* To observe safe operating junction temperatures, low duty cycle pulse testing is used in tests where applicable.
Delay Time =
CDelay x VDelay Threshold Charge
I Charge
= CDelay x 3.5 x 10 5 (typ)
Note 1: assuming ideal capacitor
2
CS8129
Package Lead Description
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
16L SOIC Wide
5L TO-220
1
1
VIN
Unregulated supply voltage to IC.
16
5
VOUT
Regulated 5V output.
4, 5, 11, 12, 13
3
Gnd
Ground connection.
8
4
Delay
Timing capacitor for RESET function.
6
2
RESET
CMOS/TTL compatible output lead. RESET goes low whenever VOUT drops below 6% of it's regulated value.
14
N/A
VOUT(SENSE)
Remote sensing of output voltage.
Typical Performance Characteristics
Quiescent Current vs Input Voltage over Temperature
55.0
Quiescent Current vs Input Voltage over Load Resistance
120.0
Rload = 25W
50.0
Room Temp.
Rload = 6.67W
100.0
45.0
40.0
80.0
30.0
125ûC
25.0
ICQ (mA)
ICQ (mA)
35.0
25ûC
60.0
20.0
Rload = 10W
40.0
15.0
10.0
20.0
-40ûC
5.0
Rload = 25W
Rload = NO LOAD
0.0
0.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
VIN (V)
VIN (V)
VOUT vs. VIN over RLOAD
Output Voltage vs Input Voltage over Temperature
5.5
Rload = 25W
5.5
5.0
4.5
4.5
4.0
4.0
Rload = 6.67W
3.5
3.0
VOUT (V)
3.5
VOUT (V)
Room Temp.
5.0
Rload=25½
125ûC
2.5
3.0
2.5
2.0
2.0
-40ûC
1.0
Rload =
NO LOAD
1.5
25ûC
1.5
1.0
Rload = 10W
0.5
0.5
0.0
0.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
VIN (V)
VIN (V)
Line Regulation vs. Output Current
Load Regulation vs. Output Current
100
6
VIN 6-26V
4
60
LOAD REGULATION (mV)
LINE REGULATION (mV)
80
40
TEMP = 25ûC
20
TEMP = -40ûC
0
-20
-40
TEMP = 125ûC
-60
-80
TEMP = -40ûC
2
0
-2
TEMP = 25ûC
-4
VIN = 14V
-6
TEMP = 125ûC
-8
-10
-12
-100
-14
0
100
200
300
400
500
600
700
800
0
OUTPUT CURRENT (mA)
100
200
300
400
500
600
OUTPUT CURRENT (mA)
3
700
800
CS8129
Typical Performance Characteristics Continued
Quiescent Current vs. Output Current
900
100
800
90
QUIESCENT CURRENT (mA)
DROPOUT VOLTAGE (mV)
Dropout Voltage vs. Output Current
700
600
25ûC
500
125ûC
400
300
-40ûC
200
100
125ûC
80
70
25ûC
VIN = 14V
60
50
-40ûC
40
30
20
10
0
0
0
100
200
300
400
500
600
700
800
0
100
200
OUTPUT CURRENT (mA)
300
400
500
600
700
800
OUTPUT CURRENT (mA)
Ripple Rejection
Output Capacitor ESR
103
IOUT= 250mA
90
80
70
60
50
40
COUT= 10mF, ESR = 1W
30
20
0
100
101
102
103
104
105
106
107
10-1
10
-2
10
-3
COUT= 47mF
COUT= 68mF
10-4
100
108
Stable Region
100
COUT= 10mF, ESR = 10W
10
COUT= 47/68mF
101
ESR (ohms)
REJECTION (dB)
102
COUT= 10mF, ESR = 1 & 0.1mF,
ESR = 0
101
FREQUENCY (Hz)
102
Output Current (mA)
Test & Application Circuit
VOUT
VIN
CIN*
100nF
CS8129
Delay
Gnd
Delay
0.1mF
*CIN required if regulator is far from the power source filter.
**COUT required for stability.
4
RESET
RRST
4.7kW
COUT**
10mF to 100mF
103
CS8129
RESET Circuit Waveform
VOUT
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)
VRH
VRT(ON)
VRT(OFF)
(1)
RESET
(2)
(3)
VRL
tDelay
Delay
VDH
VDC(HI)
VDC(LO)
VDIS
(2)
RESET Circuit Functional Description
put voltage is above VRT(ON). Otherwise, the Delay lead
sinks current to ground (used to discharge the delay
capacitor). The discharge current is latched ON when the
output voltage is below VRT(OFF). The Delay capacitor is
fully discharged anytime the output voltage falls out of
regulation, even for a short period of time. This feature
ensures a controlled RESET pulse is generated following
detection of an error condition. The circuit allows
the RESET output transistor to go to the OFF (open) state
only when the voltage on the Delay lead is higher than
VDC(HI).
The CS8129 RESET function has hysteresis on both the
reset and delay comparators, a latching Delay capacitor
discharge circuit, and operates down to 1V.
The RESET circuit output is an open collector type with
ON and OFF parameters as specified. The RESET output
NPN transistor is controlled by the two circuits described
(see Block Diagram).
Low Voltage Inhibit Circuit
This circuit monitors output voltage, and when output
voltage is below the specified minimum causes the
RESET output transistor to be in the ON (saturation)
state. When the output voltage is above the specified level,
this circuit permits the RESET output transistor to go into
the OFF state if allowed by the RESET Delay circuit.
The Delay time for the RESET function is calculated from
the formula:
Delay time =
CDelay x VDelay Threshold
ICharge
Delay time = CDelay(µF) x 3.2
Reset Delay Circuit
x
10 5
If CDelay=0.1µF, Delay time (ms)=32ms ± 50%: i.e. 16ms to
48ms. The tolerance of the capacitor must be taken into
account to calculate the total variation in the delay time.
This circuit provides a programmable (by external capacitor) delay on the RESET output lead. The Delay lead provides source current to the external delay capacitor only
when the "Low Voltage Inhibit" circuit indicates that out-
5
CS8129
Application Notes
low temperatures. The ESR of the capacitor should be less
than 50% of the maximum allowable ESR found in step 3
above.
Stability Considerations
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25¡C to -40¡C), both the value and ESR of the least
expensive will vary considerably. The capacitor manufacturers data sheet usually provides this information.
The value for the output capacitor COUT shown in the test
and applications circuit should work for most applications, however it is not necessarily the optimized solution.
To determine an acceptable value for COUT for a particular
application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part.
Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and
monitor the outputs with an oscilloscope. A decade box
connected in series with the capacitor will simulate the
higher ESR of an aluminum capacitor. Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible.
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage conditions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If
the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic
capacitors have a tolerance of +/- 20% so the minimum
value found should be increased by at least 50% to allow
for this tolerance plus the variation which will occur at
Calculating Power Dissipation
in a Single Output Linear Regulator
The maximum power dissipation for a single output regulator (Figure 1) is:
PD(max)={VIN(max)ÐVOUT(min)}IOUT(max)+VIN(max)IQ
(1)
where
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current for the application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum permissible value of RQJA can be calculated:
RQJA =
150¡C - TA
PD
(2)
The value of RQJA can then be compared with those in
the package section of the data sheet. Those packages
with RQJA's less than the calculated value in equation 2
will keep the die temperature below 150¡C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
IIN
VIN
Smart
Regulator
}
IOUT
VOUT
Control
Features
IQ
Figure 1: Single output regulator with key performance parameters
labeled.
6
where
RQJC = the junctionÐtoÐcase thermal resistance,
RQCS = the caseÐtoÐheatsink thermal resistance, and
RQSA = the heatsinkÐtoÐambient thermal resistance.
RQJC appears in the package section of the data sheet. Like
RQJA, it too is a function of package type. RQCS and RQSA
are functions of the package type, heatsink and the interface between them. These values appear in heat sink data
sheets of heat sink manufacturers.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of RQJA.
RQJA = RQJC + RQCS + RQSA
(3)
7
CS8129
Application Notes: continued
CS8129
Package Specification
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm (INCHES)
D
Lead Count
Metric
Max
Min
10.50
10.10
16 L SOIC Wide
Thermal Data
English
Max Min
.413 .398
RQJC
RQJA
Surface Mount Wide Body (DW); 300 mil wide
typ
typ
16 Lead
SOIC Wide
23
105
5 Lead
TO-220
2.1
ûC/W
50
ûC/W
5 Lead TO-220 (THA) Horizontal
4.83 (.190)
10.54 (.415)
9.78 (.385)
7.60 (.299)
7.40 (.291)
10.65 (.419)
10.00 (.394)
2.87 (.113)
2.62 (.103)
1.40 (.055)
14.99 (.590)
14.22 (.560)
6.55 (.258)
5.94 (.234)
0.51 (.020)
0.33 (.013)
4.06 (.160)
1.14 (.045)
3.96 (.156)
3.71 (.146)
1.27 (.050) BSC
2.77 (.109)
2.49 (.098)
2.24 (.088)
6.83 (.269)
2.65 (.104)
2.35 (.093)
1.68
(.066)
TYP
1.70 (.067)
0.81(.032)
1.27 (.050)
0.40 (.016)
0.32 (.013)
0.23 (.009)
D
REF: JEDEC MS-013
2.92 (.115)
2.29 (.090)
0.56 (.022)
0.36 (.014)
6.60 (.260)
5.84 (.230)
6.81(.268)
0.30 (.012)
0.10 (.004)
5 Lead TO-220 (T) Straight
10.54 (.415)
9.78 (.385)
2.87 (.113)
6.55 (.258) 2.62 (.103)
5.94 (.234)
4.83 (.190)
4.06 (.160)
5 Lead TO-220 (TVA) Vertical
1.40 (.055)
1.14 (.045)
4.83 (.190)
4.06 (.160)
3.96 (.156)
3.71 (.146)
10.54 (.415)
9.78 (.385)
14.99 (.590)
14.22 (.560)
3.96 (.156)
3.71 (.146)
1.40 (.055)
1.14 (.045)
6.55 (.258)
5.94 (.234)
2.87 (.113)
2.62 (.103)
14.22 (.560)
13.72 (.540)
14.99 (.590)
14.22 (.560)
1.78 (.070)
2.92 (.115)
2.29 (.090)
8.64 (.340)
7.87 (.310)
1.02 (.040)
0.76 (.030)
1.83(.072)
1.57(.062)
1.02(.040)
0.63(.025)
0.56 (.022)
0.36 (.014)
4.34 (.171)
1.68
(.066) typ
1.70 (.067)
0.56 (.022)
0.36 (.014)
7.51 (.296)
6.80 (.268)
6.93(.273)
6.68(.263)
2.92 (.115)
2.29 (.090)
.94 (.037)
.69 (.027)
Ordering Information
Part Number
CS8129YDW16
CS8129YDWR16
CS8129YT5
CS8129YTHA5
CS8129YTVA5
Rev. 3/31/99
Description
16 Lead SOIC Wide
16 Lead SOIC Wide
(tape & reel)
5 Lead TO-220 Straight
5 Lead TO-220 Horizontal
5 Lead TO-220 Vertical
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
8
© 1999 Cherry Semiconductor Corporation