INA120 ® Precision INSTRUMENTATION AMPLIFIER FEATURES DESCRIPTION ● LOW OFFSET VOLTAGE: 25µV max ● LOW OFFSET VOLTAGE DRIFT: 0.25µV/°C max ● PIN-STRAPPED GAINS: 1, 10, 100, 1000 The INA120 is a precision instrumentation amplifier ideal for accurate signal acquisition. It combines precision, protected-input operational amplifiers, lasertrimmed gain-setting resistors, and a high commonmode rejection difference amplifier on a single chip. ● LOW GAIN DRIFT: 30ppm/°C max at G = 100 ● HIGH COMMON-MODE REJECTION: 106dB at 60Hz, G = 100 APPLICATIONS ● BRIDGE AMPLIFIER ● ● ● ● ● THERMOCOUPLE AMPLIFIER RTD SENSOR AMPLIFIER MEDICAL INSTRUMENTATION DATA ACQUISITION SYSTEM SWITCHED-GAIN AMPLIFIER Simple pin-strapped connections set precise gains of 1, 10, 100 or 1000. External resistors can be used to set any gain from one to 5000. Gains can be digitally selected with an external multiplexer. Gain-sense connections on the INA120 maintain accuracy when using multiplexer or gain-switching circuitry. Low power dissipation and careful on-chip thermal management reduce warm-up drift and assure excellent long-term stability. The INA120 is available in both plastic and ceramic 18-pin DIP packages, specified for the industrial temperature range. Offset Adjust Gain Sense 1 Gain Set 1 4 3 –In 6 X1000 9 A1 1kΩ 17 10kΩ 20kΩ 10kΩ – A3 400Ω 1kΩ 20kΩ – 2kΩ VO 18 Com 10kΩ A2 1kΩ X10 11 Gain Set 2 14 1 + X100 10 10kΩ + 15 16 +In 13 A 2 Out Gain Sense 2 International Airport Industrial Park • Mailing Address: PO Box 11400 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • 1989 Burr-Brown Corporation V– 2 – 44Ω © V+ + 2kΩ 8 12 1kΩ 5 RC A 1 Out 7 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 PDS-1071 Printed in U.S.A. March, 1992 SPECIFICATIONS At TA = +25°C and VS = ±15V unless otherwise specified. INA120CG PARAMETER CONDITIONS GAIN Range of Gain Gain Equation Gain Error MIN 1 Gain Temp Coefficient Nonlinearity G=1 G = 10 G = 100 G = 1000 G=1 G = 10 G = 100 G = 1000 G=1 G = 10 G = 100 G = 1000 OFFSET VOLTAGE Initial Offset vs Temperature vs Power Supply VS = ±6V to ±18V NOISE Input Voltage Noise fB = 0.1Hz to 10Hz Density; f = 10Hz f = 100Hz f = 1000Hz Input Current Noise fB = 0.1Hz to 10Hz Density; f = 10Hz f = 1kHz Output Voltage Noise fB = 0.1Hz to 10Hz ±10 80 96 106 106 G = 1000 G = 1000 DYNAMIC RESPONSE Small Signal Bandwidth (–3dB) Slew Rate Settling Time to 0.01% Full Power Bandwidth, G < 200 Overload Recovery OUTPUT Voltage, RL = 2kΩ Current Short-Circuit Current Capacitive Load, Stable Operation G=1 G = 10 G = 100 G = 1000 0.4 G=1 G = 10 G = 100 G = 1000 VO = ±10V, RL = 2kΩ 50% Overdrive Over Temperature Over Temperature MIN 1000 1 + (2RF/RG) 0.01 0.05 0.05 0.1 0.1 0.2 0.3 0.5 4 10 4 10 6 30 22 50 0.001 0.005 0.002 0.005 0.004 0.01 0.008 0.05 ±7 ±0.2 ±5 ±0.2 10 10 || 3 1010 || 3 G=1 G = 10 G = 100 G = 1000 INA120BG, BP MAX 1 + (2RF/RG) 0.01 0.05 0.1 0.3 4 4 6 22 0.001 0.002 0.004 0.008 ±10.5 5 INA120AP MAX MIN 1000 1 ±7 ±0.2 ±5 ±0.2 10 10 || 3 1010 || 3 ±10 ±10 74 90 106 106 0.05 0.2 0.3 1 20 20 40 50 0.01 0.01 0.02 0.1 MAX UNITS 1000 V/V V/V % % % % ppm/°C ppm/°C ppm/°C ppm/°C % of FS % of FS % of FS % of FS 0.1 0.2 0.5 1 20 40 60 100 0.01 0.01 0.02 0.1 (50+ (200+ µV 600/G) 2000/G) (2 + 20/G) µV/°C (1 + 20/G)(40 + 300/G) µV/V ±20 ±20 ±0.2 ±10 ±0.2 1010 || 3 1010 || 3 ±20 ±12.5 90 106 110 110 TYP 1 + (2RF/RG) 0.02 0.1 0.2 0.5 6 8 10 40 0.001 0.002 0.004 0.008 (50+ (100+ 300/G) 1000/G) (1 + 20/G) (1 + 20/G)(20 + 250/G) ±20 ±12.5 90 106 110 110 TYP 1 (10+ (25+ 300/G) 600/G) (.25 + 10/G) (1 + 20/G)(10 + 150/G) INPUT BIAS CURRENT Initial Bias Current vs Temperature Initial Offset Current vs Temperature Impedance: Differential Common-Mode INPUT VOLTAGE RANGE Range, Linear Response CMRR (DC, 1kΩ Source Imbalance) TYP ±10 70 86 100 100 ±50 ±50 nA nA/°C nA nA/°C Ω || pF Ω || pF ±12.5 85 95 105 105 V dB dB dB dB 0.7 14 11 10 0.7 14 11 10 0.7 14 11 10 µV p-p nV/√Hz nV/√Hz nV/√Hz 50 1.8 0.4 50 1.8 0.4 50 1.8 0.4 pAp-p pA/√Hz pA/√Hz 8 8 8 µVp-p 2 200 20 2 0.6 24 30 50 200 9 2 2 200 20 2 0.6 24 30 50 200 9 2 2 200 20 2 0.6 24 30 50 200 9 2 MHz kHz kHz kHz V/µs µs µs µs µs kHz µs ±12.8 15 24 4000 V mA mA pF 0.4 ±12.8 15 24 4000 ±10.5 5 0.4 ±12.8 15 24 4000 ±10.5 5 POWER SUPPLY Rated Voltage Voltage Range Supply Current ±6 VO = 0V TEMPERATURE RANGE Specification Operation BP,AP Operation CG,BG Storage ±15 ±18 ±4 ±2.7 –25 +85 ±15 ±2.7 ±18 ±4 ±6 –25 +85 –25 –40 +85 –40 +125 –55 +125 +150 –65 +150 –65 See Absolute Maximum Table. –55 –65 ® INA120 ±6 2 ±15 ±2.7 ±18 ±4 +85 +85 +150 V V mA °C °C °C °C PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Top View Supply Voltage ................................................................................... ±18V Input Voltage Range .................................................. (V+) +2 to (V–) –2V Differential Input Voltage ....................................................... Total VS +4V Operating Temperature Ceramic G Package .................................................... –65°C to +150°C Plastic P Package ........................................................ –40°C to +125°C Storage Temperature Ceramic G Package .................................................... –65°C to +150°C Plastic P Package ........................................................ –40°C to +125°C Junction Temperature Ceramic G Package ................................................................... +175°C Plastic P Package ....................................................................... +125°C Lead Temperature (soldering, 10s) ............................................... +300°C DIP VO 1 18 Com V+ 2 17 V– –VIN 3 16 +VIN Gain Sense 1 4 15 Gain Sense 2 Gain Set 1 5 14 Gain Set 2 Offset Adjust 6 13 A 2 Out Offset Adjust 7 12 A1 Out RC 8 11 X10 MODEL X1000 9 10 X100 INA120AP INA120BP INA120BG INA120CG PACKAGE INFORMATION(1) PACKAGE PACKAGE DRAWING NUMBER 18-Pin Plastic DIP 18-Pin Plastic DIP 18-Pin Ceramic DIP 18-Pin Ceramic DIP 218 218 158 158 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. ORDERING INFORMATION MODEL INA120AP INA120BP INA120BG INA120CG PACKAGE 18-Pin Plastic DIP 18-Pin Plastic DIP 18-Pin Ceramic DIP 18-Pin Ceramic DIP TEMPERATURE RANGE –25°C –25°C –25°C –25°C to to to to +85°C +85°C +85°C +85°C The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 INA120 TYPICAL PERFORMANCE CURVES TA = +25°C, VS = ±15V unless otherwise noted. SETTLING TIME vs GAIN (0.1%) GAIN vs FREQUENCY 400 10k G = 1000 300 Settling Time (µs) Gain (V/V) 1k G = 100 100 G = 10 10 G=1 1 10 200 100 0 100 1k 10k 100k 1M 10M 1 10 100 Frequency (Hz) COMMON-MODE REJECTION vs SOURCE RESISTANCE IMBALANCE COMMON-MODE REJECTION vs FREQUENCY 160 Common-Mode Rejection (dB) Common-Mode Rejection (dB) 160 G = 1000 120 80 G = 100 G = 10 40 RS = 0 G=1 0 –40 G = 1000, G = 100 f = 60Hz 120 G = 10 80 G=1 40 0 1 10 100 1k 10k 100k 1M 100 1k 10k 100k Frequency (Hz) Source Resistance Imbalance ( Ω) POWER SUPPLY REJECTION vs FREQUENCY INPUT BIAS AND OFFSET CURRENT vs TEMPERATURE 20 120 G = 1000 Input Bias and Offset Current (nA) 140 Power Supply Rejection (dB) 1000 Gain (V/V) ±VS 100 G = 100 80 G = 10 60 G=1 40 20 0 1 10 100 1k 10k 100k 10 IB 5 IOS 0 –75 1M Frequency (Hz) –50 –25 0 +25 +50 +75 Ambient Temperature (°C) ® INA120 15 4 +100 +125 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15V unless otherwise noted. SLEW RATE vs TEMPERATURE 1 2.8 0.8 Slew Rate (V/µs) Quiescent Current (mA) QUIESCENT CURRENT vs TEMPERATURE 3 2.6 2.4 0.4 Output Op Amp 0.2 2.2 2.0 –75 0.6 –50 –25 0 +25 +50 +75 +100 0 –75 +125 –50 –25 0 +25 +50 +75 +100 +125 Ambient Temperature (°C) Ambient Temperature (°C) INPUT-REFERRED NOISE G = 1000 CURRENT LIMIT vs TEMPERATURE 35 Input Noise Voltage 200nV/Division Current Limit (mA) 30 Output Op Amp 25 20 15 –75 –50 –25 0 +25 +50 +75 +100 Time (2s/ Division) +125 Ambient Temperature (°C) LARGE-SIGNAL TRANSIENT RESPONSE G = 1 Output Voltage (2V/Division) Output Voltage (500mV/Division) SMALL-SIGNAL TRANSIENT RESPONSE G=1 Time (20µs/ Division) Time (20µs/ Division) ® 5 INA120 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15V unless otherwise noted. SMALL-SIGNAL TRANSIENT RESPONSE G = 100 Output Voltage (2V/Division) Output Voltage (50mV/Division) LARGE-SIGNAL TRANSIENT RESPONSE G = 100 Time (5µs/ Division) Time (10µs/ Division) APPLICATION INFORMATION Figure 1 shows the basic connections required for operation of the INA120. Applications with noisy or high impedance power supply lines may require decoupling capacitors close to the device pins as shown. The differential input voltage is applied to pins 16 and 3. effective RG with internal resistors, gain accuracy and drift can be somewhat improved. Connections available on the INA120 allow all input stage gain-setting resistors to be provided externally. A custom precision resistor network could be connected to provide the highest accuracy and lowest gain drift for non-standard gains. Impedance of this external network should be made close to that of the internal network for best performance. The output is referred to the output common reference terminal, pin 18. This terminal must have a low-impedance connection to ground. A resistance of 1Ω or greater in series with the common terminal could degrade common-mode rejection beyond the specified value. OFFSET TRIMMING Many applications require no external offset voltage trimming. Figure 4 shows optional circuits for trimming offset voltage. Since the INA120 has two amplification stages, the offset voltage is comprised of two components—the input stage offset and output stage offset. SETTING THE GAIN Gains of 1, 10, 100 or 1000 can be configured by interconnecting the gain-set pins as shown in the table of Figure 1. These pin-strapped gains provide best gain accuracy and drift because they are determined by the ratios of accurately trimmed and matched on-chip resistors. The input stage offset is equal to the combined offset of op amps A1 and A2. This input stage offset dominates at high gain. When used in gains of 100 to 1000, it is often sufficient to adjust the input stage offset with a potentiometer connected to pins 6 and 7 as shown. Connect both inputs to ground and adjust for 0V at the output, pin 1. Do not use pins 6 and 7 to trim offset voltage at G = 1 or to correct for offset in devices following the INA120 since this can cause excessive offset voltage drift. Digital gain control can be achieved using an analog multiplexer as shown in Figure 2. Since the switches are in series with the high impedance gain-sense connections, pins 4 and 15, their series resistance does not significantly affect gain error or drift. Gain error at G = 1 is slightly higher than with direct pin connections shown in Figure 1. The gain is selected with a two-bit address, A0 and A1. The Multiplexer Enable control is directly connected to V+ since a logic “low” on this line would cause the input amplifiers to run open-loop. At G = 1, offset is dominated by the output stage. Output stage offset can be trimmed by applying a correction voltage at the output reference terminal, pin 18. Low impedance must be maintained at this node to preserve the high CMR of the INA120. This is achieved by buffering the trim voltage with an op amp as shown. Other gains may be set by connecting an external resistor, RG, as shown in Figure 3a. Gain accuracy using an external gain-setting resistor is a function of RG and the internal 20kΩ resistors. The internal resistors are typically within ±0.2% of nominal value and their drift under ±80ppm/°C. Inaccuracy and drift of RG will contribute additional gain error and drift. At intermediate gains it may be necessary to provide both input stage and output stage offset adjustments. Again, ground both inputs. Connect a jumper between pins 9 and 11 (temporarily connects the INA120 in high gain) and adjust R1 for 0V at the output, pin 1. Then disconnect the jumper and adjust the output offset control for 0V output. Figure 3b shows an external gain-setting resistor connected in parallel with internal resistors. By forming a portion of the ® INA120 6 +15V 1µF 4 3 6 7 12 2 5 A1 8 GAIN 1 10 100* 1000 CONNECT 4-5 4-5 4-8 4-8 VIN 14-15 11-14-15 11-14 11-14 10-15 9-15 9 1 A3 10 18 A2 *G = 100, shown at right. VO= 100 x VIN Output Ground Reference 11 14 15 16 13 17 1µF –15V FIGURE 1. Basic Connection. –VIN HI-509A Multiplexer +15V 1µF 13 1 V+ 9 2 14 4 3 3 6 7 12 2 4 12 2 5 A1 10 EN 8 11 A0 1 A1 16 7 9 6 10 5 11 1 A3 VO 18 A2 15 4 8 3 3 2 1 14 15 16 17 13 1µF 4 –15V V– +VIN A1 A0 GAIN L L H H L H L H 1 10 100 1000 FIGURE 2. Digital Gain Control. ® 7 INA120 –VIN 4 3 V+ 6 7 12 2 5 A1 RG = 40k Ω G–1 8 20kΩ RG = 816Ω for G = 50 9 1 A3 VO 20kΩ 10 18 A2 11 14 15 16 13 +VIN 17 V– (a) V+ –VIN 4 3 6 7 12 2 5 A1 8 20kΩ 9 R1 G=1+ 44kΩ R1 || 444Ω R1 G 440Ω 110Ω 200 500 1 A3 VO 20kΩ 10 18 A2 11 14 15 16 13 +VIN 17 V– (b) FIGURE 3. External Gain-Setting Resistors. exceeds the common-mode range of the INA120 and the input amplifiers will saturate. INPUT BIAS CURRENT RETURN PATH The input impedance of the INA120 is extremely high— approximately 1010Ω. This does not mean, however, that no current flows in the input terminals. The input bias current of the INA120 is typically ±10nA (it can be either polarity). High input impedance means that this input bias current changes very little with varying input voltage. INPUT PROTECTION The inputs of the INA120 are protected for input voltages up to 2V beyond the power supply voltages. If the input can exceed these conditions, input clamp diodes should be provided as shown in Figure 6. RS may not be required if the input cannot supply more than 100mA. If the input can supply larger currents, choose RS according to the maximum source voltage, limiting current to under 100mA. Input circuitry must provide a path for this input bias current if the INA120 is to function. Figure 5 shows various provisions for an input bias current path. Without an appropriate current path, the inputs will float to a potential which ® INA120 8 Input Stage Offset Adjustment for High Gains (see text). V+ V+ R1 100kΩ 4 3 6 7 12 2 5 A1 8 G = 10 VIN 9 A3 10 1 VO V+ 100µA 1/2 REF200 18 A2 11 OPA27 14 15 16 13 100Ω 10kΩ 17 ±10mV 100Ω V– 100µA 1/2 REF200 Output Offset Adjustment for low gains (see text). V– FIGURE 4. Offset Adjustment Circuits. V+ Microphone, Hydrophone etc. INA120 47k Ω RS 47k Ω RS INA120 Diodes:1N4148 RS used to limit input current to 100mA. Thermocouple INA120 V– 10k Ω FIGURE 6. Input Protection Circuit. INA120 Center-tap provides bias current return. FIGURE 5. Providing an Input Bias Current Path. ® 9 INA120 V+ 10.0V 6 REF102 (2) R1 27k Ω 1N4148 (1) Cu R2 5.23k Ω R4 80.6k Ω (2) R7 1MΩ K INA120 Cu ISA TYPE MATERIAL SEEBECK COEFFICIENT (µV/°C) R2 (R3 = 100Ω) R4 (R5 + R6 =100Ω) E Chromel Constantan 58.5 3.48k 56.2k J Iron Constantan 50.2 4.12k 64.9k K Chromel Alumel 39.4 5.23k 80.6k T Copper Constantan 38.0 5.49k 84.5k 4 R5 50Ω R3 100Ω R6 100Ω Zero Adj NOTES: (1) –2.1mV/°C at 200µA. (2) R7 provides down-scale burn-out indication. FIGURE 7. Thermocouple Amplifier With Cold Junction Compensation. V+ 4 3 6 7 12 2 5 A1 8 G = 1000 Shielded Cable 9 VIN A3 10 18 A2 11 14 15 16 13 17 V– 2 5 220Ω 6 1 3 INA105 FIGURE 8. Guard Drive Circuit. ® INA120 1 10 VO VO PACKAGE OPTION ADDENDUM www.ti.com 3-Oct-2003 PACKAGING INFORMATION ORDERABLE DEVICE STATUS(1) INA120AP OBSOLETE INA120BG OBSOLETE INA120BP OBSOLETE INA120CG OBSOLETE PACKAGE TYPE PACKAGE DRAWING PINS PACKAGE QTY (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. 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