TI TL5501

TL5501
6-BIT ANALOG-TO-DIGITAL CONVERTER
SLAS026 – OCTOBER 1989 – REVISED APRIL 1990
D
D
D
D
D
D
D
D
D
N PACKAGE
(TOP VIEW)
6-Bit Resolution
Linearity Error . . . ± 0.8%
Maximum Conversion Rate . . . 30 MHz Typ
Analog Input Voltage Range
VCC to VCC – 2 V
Analog Input Dynamic Range . . . 1 V
TTL Digital I/O Level
Low Power Consumption
200 mW Typ
5-V Single-Supply Operation
Interchangeable With Fujitsu MB40576
(LSB) D0
D1
D2
D3
D4
(MSB) D5
CLK
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
GND
DGTL VCC
ANLG VCC
REFB
ANLG INPUT
REFT
ANLG VCC
DGTL VCC
description
The TL5501 is a low-power ultra-high-speed video-band analog-to-digital converter that uses the Advanced
Low-Power Schottky (ALS) process. It utilizes the full-parallel comparison (flash method) for high-speed
conversion. It converts wide-band analog signals (such as a video signal) to a digital signal at a sampling rate
of dc to 30 MHz. Because of this high-speed capability, the TL5501 is suitable for digital video applications such
as digital TV, video processing with a computer, or radar signal processing.
The TL5501 is characterized for operation from 0°C to 70°C.
functional block diagram
CLK
ANLG INPUT
REFT
R
1
EN
D5 (MSB)
D4
R
2
D3
63-to-6
Encoder
Latch
and
Buffer
D2
R
62
D1
R
D0 (LSB)
63
R
REFB
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1990, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
TL5501
6-BIT ANALOG-TO-DIGITAL CONVERTER
SLAS026 – OCTOBER 1989 – REVISED APRIL 1990
equivalents of analog input circuit
ANLG VCC
ANLG VCC
D
VI
VI
Ibias
Ci
(see Note A)
ANLG GND
NOTE A: Ci – nonlinear emitter-follower junction capacitance
ri – linear resistance model for input current transition caused by comparator switching.
VI < VrefB: Infinite; CLK high: infinite.
VrefB – voltage at REFB terminal
Ibias – constant input bias current
D – base-collector junction diode of emitter-follower transistor
equivalent of digital input circuit
DGTL VCC
25 kΩ
3.1 kΩ
25 kΩ
Output
Vref = 1.4 V
VI
GND
2
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• DALLAS, TEXAS 75265
ri
VrefB
TL5501
6-BIT ANALOG-TO-DIGITAL CONVERTER
SLAS026 – OCTOBER 1989 – REVISED APRIL 1990
FUNCTION TABLE
STEP
ANALOG INPUT
VOLTAGE
0
3.992 V
L
L
L
1
4.008 V
L
L
L
|
|
31
4.488 V
L
H
32
4.508 V
H
L
33
4.520 V
H
DIGITAL OUTPUT CODE
L
L
L
L
L
H
H
H
H
H
L
L
L
L
L
L
L
L
H
|
|
|
62
4.984 V
H
H
H
|
H
H
L
63
5.000 V
H
H
H
H
H
H
† These values are based on the assumption that VrefB and Vref T have been
adjusted so that the voltage at the transition from digital 0 to 1 (VZT) is
4.000 V and the transition to full scale (VFT) is 4.992 V. 1 LSB = 16 mV.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, ANLG VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Supply voltage range, DGTL VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range at digital input, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range at analog input, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to ANLG VCC + 0.5 V
Analog reference voltage range, Vref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to ANLG VCC + 0.5 V
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 150°C
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
NOTE 1: All voltage values are with respect to the network ground terminal.
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, ANLG VCC
4.75
5
5.25
V
Supply voltage, DGTL VCC
4.75
5
5.25
V
High-level input voltage, VIH
2
V
Low-level input voltage, VIL
0.8
V
Input voltage at analog input, VI (see Note 2)
4
5
V
Analog reference voltage (top side), VrefT (see Note 2)
4
5
5.1
V
Analog reference voltage (bottom side), VrefB (see Note 2)
3
4
4.1
V
High-level output current, IOH
µA
– 400
Low-level output current, IOL
Clock pulse duration, high-level or low-level, tw
4
mA
70
°C
25
Operating free-air temperature, TA
0
ns
NOTE 2: VrefB < VI < Vref T, Vref T – VrefB = 1 V ± 0.1 V.
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3
TL5501
6-BIT ANALOG-TO-DIGITAL CONVERTER
SLAS026 – OCTOBER 1989 – REVISED APRIL 1990
electrical characteristics over operating supply voltage range, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
VI = 5 V
VI = 4 V
MAX
UNIT
75
µA
II
Analog input current
IIH
IIL
Digital high-level input current
II
IrefB
Digital input current
Iref T
VOH
Reference current
High-level output voltage
VIrefB = 5 V
IOH = – 400 µA
VOL
ri
Low-level output voltage
IOL = 1.6 mA
1Ci
ICC
Analog input capacitance
35
65
pF
Supply current
40
60
mA
73
VI = 2.7 V
VI = 0.4 V
Digital low-level input current
0
– 400
VI = 7 V
VIrefB = 4 V
Reference current
Analog input resistance
µA
20
µA
– 40
100
µA
–4
– 7.2
mA
4
7.2
mA
2.7
V
0.4
V
100
kΩ
operating characteristics over operating supply voltage range, TA = 25°C (unless otherwise noted)
PARAMETER
EL
fmax
TEST CONDITIONS
MIN
TYP†
Linearity error
Maximum converstion rate
20
td
Digital output delay time
† All typical values are at VCC = 5 V, Vref = 4 V, TA = 25°C.
See Figure 3
MAX
UNIT
± 0.8
%FSR
30
15
MHz
30
timing diagram
twH
CLK
Sample
N
twL
Sample
Sample
N+1
N+2
1.4 V
ANLG
INPUT
td
D1 – D6
4
Data
N–1
Data
N
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Data
N+1
ns
TL5501
6-BIT ANALOG-TO-DIGITAL CONVERTER
SLAS026 – OCTOBER 1989 – REVISED APRIL 1990
TYPICAL CHARACTERISTICS
IDEAL CONVERSION CHARACTERISTICS
63
111111
See Note A
62
Digital Output CodeS
S111101
VFS
VFT = VFS
1/2 LSB
100001
61
33
32
100000
VZT
VZS + 1/2 LSB
011111
Step
111110
31
VZS
4.984
4.992 V
5.000
4.968
4.520
0
4.504
000000
4.488
1
4.024
000001
4.008
2
3.992
000010
VI — Analog Input Voltage — V
NOTE A: This curve is based on the assumption that VrefB and Vref T have been
adjusted so that the voltage at the transition from digital 0 to 1 (VZT) is
4.000 V and the transition to full scale (VFT) is 4.992 V. 1 LSB = 16 mV.
Figure 1
END-POINT LINEARITY ERROR
111111
63
111110
62
EL61
100001
61
33
EL33
100000
EL32
011111
EL31
000010
32
Step
Digital Output Code
111101
31
2
EL2
000001
1
EL1
000000
0
VI — Analog Input Voltage — V
Figure 2
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5
TL5501
6-BIT ANALOG-TO-DIGITAL CONVERTER
SLAS026 – OCTOBER 1989 – REVISED APRIL 1990
PARAMETER MEASUREMENT INFORMATION
Measurement
Point
ÏÏÏ
VCC
RL = 2 kΩ
To
Digital
Output
CL = 15 pF
Figure 3. Load Circuit
6
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Copyright  1998, Texas Instruments Incorporated