CDC203 3.3-V HEX INVERTER/CLOCK DRIVER SCAS324A – OCTOBER 1989 – REVISED NOVEMBER 1995 D D D D D D D D DW PACKAGE (TOP VIEW) Replaces 74AC11203 Low-Skew Propagation Delay Specifications for Clock Driver Applications Operates at 3.3-V VCC Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Packaged in Plastic Small-Outline Package 1Y 2Y 3Y GND GND GND GND 4Y 5Y 6Y 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 1A 2A 3A NC VCC VCC NC 4A 5A 6A NC – No internal connection description The CDC203 contains six independent inverters. The device performs the Boolean function Y = A. It is designed specifically for applications requiring low skew between switching outputs. The CDC203 is characterized for operation from 25°C to 70°C. FUNCTION TABLE INPUT A OUTPUT Y H L L H logic symbol† 1A 2A 3A 4A 5A 6A 20 logic diagram (positive logic) 1 1 19 2 18 3 13 8 12 9 11 10 1Y 1A 20 1 19 2 18 3 13 8 12 9 11 10 1Y 2Y 3Y 2A 2Y 4Y 5Y 3A 3Y 6Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 4A 5A 6A 4Y 5Y 6Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 CDC203 3.3-V HEX INVERTER/CLOCK DRIVER SCAS324A – OCTOBER 1989 – REVISED NOVEMBER 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±150 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology Data Book, literature number SCBD002B. recommended operating conditions VCC Supply voltage VIH High level input voltage High-level VCC = 3 V VCC = 3.6 V VIL Low level input voltage Low-level VCC = 3 V VCC = 3.6 V VI VO Input voltage NOM MAX 3 3.3 3.6 2.1 Output voltage 0.9 1.1 0 IOH High level output current High-level IOL Low level output current Low-level VCC = 3 V VCC = 3.6 V ∆t / ∆v Input transition rise or fall rate fclock TA Input clock frequency Operating free-air temperature • DALLAS, TEXAS 75265 – 12 12 12 25 POST OFFICE BOX 655303 VCC VCC – 12 0 UNIT V V 2.5 0 VCC = 3 V VCC = 3.6 V 2 MIN V V V mA mA 10 ns / V 40 MHz 70 °C CDC203 3.3-V HEX INVERTER/CLOCK DRIVER SCAS324A – OCTOBER 1989 – REVISED NOVEMBER 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VOH IOH = – 12 mA IOL = 50 µA VOL IOL = 12 mA VI = VCC or GND VI = VCC or GND, Ci VI = VCC or GND MIN 3V IOH = – 50 µA II ICC TA = 25°C VCC IO = 0 TYP MAX 2.9 MIN MAX UNIT 2.9 3.6 V 3.5 3.5 3V 2.58 2.48 3.6 V 3.18 V 3.08 3V 0.1 0.1 3.6 V 0.1 0.1 3V 0.36 0.44 3.6 V 0.36 0.44 3.6 V ± 0.1 ±1 µA 4 40 µA 3.6 V 3.3 V 4 V pF switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (see Note 3 and Figures 1 and 2) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tsk(o) A Y MIN MAX 3.5 6.1 3.5 6.1 0.7 UNIT ns ns NOTE 3: All specifications are valid only for all outputs switching in phase simultaneously. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 CDC203 3.3-V HEX INVERTER/CLOCK DRIVER SCAS324A – OCTOBER 1989 – REVISED NOVEMBER 1995 PARAMETER MEASUREMENT INFORMATION From Output Under Test CL = 30 pF (see Note A) 500 Ω LOAD CIRCUIT VCC Input (see Note B) 50% 50% 0V tPLH tPHL 50% VCC Output VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CDC203 3.3-V HEX INVERTER/CLOCK DRIVER SCAS324A – OCTOBER 1989 – REVISED NOVEMBER 1995 PARAMETER MEASUREMENT INFORMATION 50% 1A – 6A 50% 50% 50% Y1 tPHL1 tPLH1 50% 50% Y2 tPHL2 tPLH2 50% Y3 50% tPHL3 tPLH3 Y4 50% 50% tPHL4 tPLH4 50% Y5 50% tPHL5 tPLH5 50% Y6 50% tPHL6 tPLH6 NOTE A: Output skew, tsk(o), is calculated as the greater of: – The difference between the fastest and slowest of tPLHn (n = 1, 2, . . . , 6) – The difference between the fastest and slowest of tPHLn (n = 1, 2, . . . , 6) Figure 2. Waveforms for Calculation of tsk(o) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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