High Accuracy Fast Buffer Features General Description # Low input currentÐ50 pA # Low offset and driftÐ 2 mV/25 mV/§ C # High slew rateÐ1500 V/ms # Fast rise and fall timeÐ2.5 ns # High input resistanceÐ1000 GX # BandwidthÐ140 MHz # Pin compatible with ELH0033 # MIL-STD-883 Revision C devices manufactured in U.S.A. The EL2005 is a high-speed, FET input buffer similar to ELH0033 and EL2004 but with input specifications significantly improved over the previous types. The input stage employs a cascode configuration to maintain constant input characteristics over the full g 10V input range. The input looks like a 3 pF capacitor to ground in almost all cases since the DC bias current is constant with input voltage. In sample and hold circuits this results in an order of magnitude improvement in hold characteristics. Input offset voltage and offset voltage drift are also improved a factor of two over previous types. Advantages # No input loading # Input current independent of input voltage # Eliminates offset adjustments # Drives cables directly Ordering Information Part No. Temp. Range Package OutlineÝ EL2005CG b 25§ C to a 85§ C TO-8 MDP0002 EL2005G b 55§ C to a 125§ C TO-8 MDP0002 EL2005G/883B b 55§ C to a 125§ C TO-8 MDP0002 EL2005/EL2005C EL2005/EL2005C These excellent DC characteristics are complemented by a wide 140 MHz bandwidth while the 1500 V/ms slew rate and excellent phase linearity of the ELH0033 family are preserved allowing direct plug-in replacement for upgraded performance. (For even faster operation see EL2004.) Elantec facilities comply with MIL-I-45208A and are MILSTD-1772 certified. Elantec’s Military devices comply with MIL-STD-883B Revision C and are manufactured in our rigidly controlled, ultra-clean facilities in Milpitas, California. For additional information on Elantec’s Quality and Reliability Assurance Policy and procedures request brochure QRA-1. Simplified Schematic Connection Diagram Note: Case is electrically isolated. 2005 – 2 Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a ‘‘controlled document’’. Current revisions, if any, to these specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation. Patent pending. CMSÝ2005DS © 1989 Elantec, Inc. January 1990 Rev F 2005 – 1 Top View EL2005/EL2005C High Accuracy Fast Buffer Absolute Maximum Ratings (TA e 25§ C) Supply Voltage (V a b Vb) Input Voltage Power Dissipation (See curves) Continuous Output Current Peak Output Current VS VIN PD IOC IOP TA 40V 40V 1.5W g 100 mA g 250 mA TJ TST Operating Temperature Range EL2005 EL2005C Operating Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds) b 55§ C to a 125§ C b 25§ C to a 85§ C 175§ C b 65§ C to a 150§ C 300§ C Important Note: All parameters having Min/Max specifications are guaranteed. The Test Level column indicates the specific device testing actually performed during production and Quality inspection. Elantec performs most electrical tests using modern high-speed automatic test equipment, specifically the LTX77 Series system. Unless otherwise noted, all tests are pulsed tests, therefore TJ e TC e TA. Test Level I II III IV V Test Procedure 100% production tested and QA sample tested per QA test plan QCX0002. 100% production tested at TA e 25§ C and QA sample tested at TA e 25§ C , TMAX and TMIN per QA test plan QCX0002. QA sample tested per QA test plan QCX0002. Parameter is guaranteed (but not tested) by Design and Characterization Data. Parameter is typical value at TA e 25§ C for information purposes only. DC Electrical Characteristics VS e g 15V, VIN e 0V, TMIN s TA s TMAX Description Test Conditions Min RS s 100 kX, TJ e 25§ C (Note 1) VOS Output Offset Voltage DVOS/DT Average Temperature Coefficient of RS e 100X Offset Voltage 2 RS s 100 kX PSRR Supply Rejection IB Input Bias Current AV RIN Voltage Gain Input Impedance g 10V s VS s g 20V 65 Output Impedance 5 I 10 I 25 V 75 I Min Typ Max 3 60 Test Units Level 10 I mV 15 III mV 25 V mV/§ C 75 II dB TJ e 25§ C (Notes 1 and 3) 2 50 I 5 100 I pA TA e 25§ C (Notes 2 and 3) 50 500 IV 100 1000 IV pA TJ e TA e TMAX 2 5 I 0.5 5 III nA RS e 100X, RL e 1 kX, VIN e g 10V 0.97 0.98 1.0 I 0.96 0.98 1.0 II V/V RS e 100X, RL e 100X, vIN e g 10V 0.88 0.95 0.98 I 0.88 0.95 0.99 II V/V IV X I X II X RL e 1 kX, b 10V s VIN s g 10V 2 c 109 1012 TJ e 25§ C (Note 1), RL e 1 kX RO EL2005C Test Typ Max Level 1010 RL e 1 kX, VIN e g 1V 1012 4 2 I I 8 I 2 c 109 1012 1010 1012 4 9 TD is 3.8in EL2005 Parameter EL2005/EL2005C High Accuracy Fast Buffer DC Electrical Characteristics VS e g 15V, VIN e 0V, TMIN s TA s TMAX Ð Contd. Description Min VO Output Voltage Swing EL2005C Test Conditions VIN e g 14V, RL e 1 kX VIN e g 10.5V, RL e 100X, TA e 25§ C Typ Max Test Min Level g 12.5 V g 9.8 I g9 g9 Typ Max Test Units Level g 12.5 V V g 9.8 I V IS Supply Current VIN e 0 (Note 1) 19 22 I 19 24 II mA PD Power Consumption 570 660 I 570 720 II mW VIN e 0 TD is 1.7in EL2005 Parameter AC Electrical Characteristics TC e 25§ C, VS e g 15V, RS e 50X, RL e 1 kX Description Test Conditions EL2005C Test Test Min Typ Max Min Typ Max Level Level Units SR Slew Rate VIN e g 10V, VOUT e g 5V 1000 1500 III 1000 1500 III V/ms BW Bandwidth VIN e 1 Vrms 140 V 140 V MHz wNL Phase Non-Linearity BW e 1 MHz to 20 MHz 2 V 2 V Degree tr Rise Time DVIN e 0.5V 2.5 V 2.5 V ns tP Propagation Delay DVIN e 0.5V 1.0 V 1.0 V ns HD Harmonic Distortion f l1 kHz k 0.1 V k 0.1 V % AV Voltage Gain RS e 100X, VIN e 1 Vrms, f e 1 kHz RO Output Impedance VIN e 1 Vrms, f e 1 kHz 0.97 0.99 1.0 I 4 8 I 0.96 0.99 1.0 II V/V 4 9 II X Note 1: Specification is at 25§ C junction temperature due to requirements of high-speed automatic testing. Actual values at operating temperatures will exceed the value at TJ e 25§ C. When supply voltages are g 15V, no-load operating junction temperatures may rise 40§ C to 60§ C above ambient and more under load conditions. Accordingly, VOS may change one to several mV, and IB will change significantly during warm-up. Refer to IB vs Temperature graph for expected values. Note 2: Measured in still air seven minutes after application of power. Note 3: Input bias current is guaranteed over the input range of b10V s VIN s a 10V. 3 TD is 2.5in EL2005 Parameter EL2005/EL2005C High Accuracy Fast Buffer Typical Performance Curves Maximum Power Dissipation Gain vs Input Voltage Output Resistance vs Output Current Frequency Response Supply Current vs Supply Voltage Offset Voltage vs Supply Voltage Input Bias Current vs Input Voltage Input Bias Current vs Temperature Input Bias Current During Warm-up Rise Time vs Temperature Small Signal Pulse Response Large Signal Pulse Response 2005 – 3 2005 – 4 4 EL2005/EL2005C High Accuracy Fast Buffer Typical Applications Using Resistor Current Limiting Offset Zero Adjust Current Limiting Using Current Sources 2005 – 5 2005 – 6 2005 – 7 Q1 e Q2 e 2N2905 Q3 e Q4 e 2N2219 High Input Impedance AC Coupled Amplifier Coaxial Cable Driver *Select C1 for optimum pulse response 2005 – 8 5 2005 – 9 EL2005/EL2005C High Accuracy Fast Buffer Typical Applications Ð Contd. 50X Cable Driver with Short Circuit Protection Bootstrapped Supplies for High Voltage Applications NPN e 2N6551 PNP e 2N6554 ( 2W devices or equivalent 2005 – 11 2005 – 10 High-Speed Sample and Hold 2005 – 12 6 EL2005/EL2005C High Accuracy Fast Buffer Resistor values may be predicted by: Applications Information Recommended Layout Precautions RLIM j RF/video printed circuit board layout rules should be followed when using the EL2005 since it will provide power gain to frequencies over 100 MHz. Ground planes are recommended and power supplies should be decoupled at each device with low inductance capacitors. In addition, ground plane shielding may be extended to the metal case of the device since it is electrically isolated from internal circuitry. Alternatively, the case should be connected to the output to minimize input capacitance. Va Vb e ISC ISC where: ISC s 100 mA for EL2005 The inclusion of limiting resistors in the collectors of the output transistors reduces output voltage swing. Decoupling VC a and VC b pins with capacitors to ground will retain full output swing for transient pulses. An alternate active current limit technique that retains full DC output swing is also shown on page 4. In this circuit, the current sources are saturated during normal operation thus applying full supply voltage to the VC pins. Under fault conditions, the voltage decreases as required by the overload. Offset Voltage Adjustment The EL2005’s offset voltages have been actively trimmed by laser to meet guaranteed specifications when the offset preset pin is shorted to the offset adjust pin. The pre-calibration allows the devices to be used in most DC or AC applications without individually offset nulling each device. If offset null is desirable, it is simply obtained by leaving the offset preset pin open and connecting a trim pot of 200X between the offset adjust pin and V b as illustrated on page 4. RLIM j VBE 0.6V e e 10X ISC 60 mA Capacitive Loading The EL2005 is designed to drive capacitive loads such as coaxial cables in excess of several thousand picofarads without susceptibility to oscillation. However, peak current resulting from (C c dV/dt) should be limited below absolute maximum peak current ratings for the devices. Operation from Single or Asymmetrical Power Supplies This device type may be readily used in applications where symmetrical supplies are unavailable or not desirable. In this case, an apparent output offset occurs due to the device’s voltage gain of less than unity. This additional output offset error may be predicted by: Thus: DVIN c CL s IOUT s g 250 mA Dt (V a b V b ) e 0.005 (V a b V b ) DVO j (1 b AV) 2 In addition, power dissipation resulting from driving capacitive loads plus standby power should be kept below the total package power rating: where: AV e No load voltage gain, typically 0.99 V ae Positive supply voltage V be Negative supply voltage PDpkg t PDC a PAC PDpkg t (V a b V b ) c IS a PAC For example, with V a e a 5V and V b e b 12V, DVO would be b 35 mV. This may be adjusted to zero as described above. PAC j (VP-P)2 c f c CL where: VP-P e Peak-to-peak output voltage swing f e Frequency CL e Load Capacitance Short Circuit Protection In order to optimize transient response and output swing, output current limit has been omitted from the EL2005. Short circuit protection may be added by inserting appropriate value resistors between V a and VC a pins and V b and VC b pins as shown on page 4. 7 EL2005/EL2005C High Accuracy Fast Buffer Hardware Applications Information Ð Contd. In order to utilize the full drive capabilities of the EL2005, it should be mounted with a heatsink, particularly for extended temperature operation. The case is isolated from the circuit and may be connected to system chassis. Operation within an Op Amp Loop The EL2005 may be used as a current booster or isolation buffer within a closed loop with op amps such as the ELH0032 and HA2500 and HA2600 series. An isolation resistor of 47X should be used between the op amp output and the input of EL2005. The wide bandwidth and high slew rates of the EL2005 assure that the loop has the characteristics of the op amp and that additional rolloff is not required. IMPORTANT! Power supply bypassing is necessary to prevent oscillation with the EL2005 in all circuits. Low inductance ceramic disc capacitors with the shortest practical lead lengths must be connected from each supply lead (within (/4× to (/2× of the device package) to a ground plane. Capacitors should be one or two 0.1 mF in parallel; adding a 4.7 mF solid tantalum capacitor will help in troublesome instances. Burn-In Circuit 2005 – 13 8 EL2005/EL2005C TAB WIDE High Accuracy Fast Buffer EL2005 Macromodel input l l l l l l Va l l l l l a Vc a l l l l Vb l Vcb * l l output * l l l .subckt M2005 5 12 1 10 9 11 * Models .model qn npn (is e 5eb14 bf e 150 vaf e 100 rc e 1 rb e 5 re e 1 ikf e 200mA a cje e 5pF cjc e 5pF mje e .42 mjc e .23 tf e .3nS tr e 200nS br e 5 vtf e 0) .model qp pnp (is e 5eb14 bf e 150 vaf e 100 rc e .2 rb e 3 re e 1 ikf e 100mA a cje e 5.7pF cjc e 4pF tf e .3nS mje e .32 mjc e .43 tr e 170nS br e 5 vtf e 0) .model qfa njf (vto eb8V beta e 2.344eb3 cgd e 10pF cgs e 7pF lambda e 671eb6) .model qfb njf(vto eb4V beta e 1.06eb3 cgd e 3pF cgs e 3pF) * Resistors r1 21 22 30 r2 7 10 30 r3 25 11 3 r4 11 26 3 * Transistors j1a 20 5 21 qfb j1b 28 10 27 qfb j2 12 11 20 qfa j4 24 10 28 qfa q3 22 22 23 qn q4 1 22 25 qn q5 24 24 23 qp q6 9 24 26 qp q7 27 27 7 qn .ends 9 TD is 4.1in * Connections: * * * * EL2005/EL2005C High Accuracy Fast Buffer EL2005 Macromodel Ð Contd. 2005 – 14 10 11 BLANK EL2005/EL2005C EL2005/EL2005C High Accuracy Fast Buffer General Disclaimer Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. January 1990 Rev F WARNING Ð Life Support Policy Elantec, Inc. products are not authorized for and should not be used within Life Support Systems without the specific written consent of Elantec, Inc. Life Support systems are equipment intended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. Users contemplating application of Elantec, Inc. products in Life Support Systems are requested to contact Elantec, Inc. factory headquarters to establish suitable terms & conditions for these applications. Elantec, Inc.’s warranty is limited to replacement of defective components and does not cover injury to persons or property or other consequential damages. Elantec, Inc. 1996 Tarob Court Milpitas, CA 95035 Telephone: (408) 945-1323 (800) 333-6314 Fax: (408) 945-9305 European Office: 44-71-482-4596 12 Printed in U.S.A.