100 MHz DC-Restored Video Amplifier Features General Description # Complete video level restoration system # 0.01% differential gain and 0.02§ differential phase accuracy at NTSC # 100 MHz bandwidth # 0.1 dB flatness to 20 MHz # Sample-and-hold has 15 nA typical leakage and 1.5 pC charge injection # System can acquire DC correction level in 10 ms, or 5 scan lines of 2 ms each, to (/2 IRE # VS e g 5V to g 15V # TTL/CMOS hold signal The EL2090C is the first complete DC-restored monolithic video amplifier sub-system. It contains a very high-quality video amplifier and a nulling sample-and-hold amplifier specifically designed to stabilize video performance. When the HOLD logic input is set to a logic 0 during a horizontal sync, the sampleand-hold amplifier may be used as a general-purpose op-amp to null the DC offset of the video amplifier. When the HOLD input goes to a logic 1 the sample-and-hold stores the correction voltage on the hold capacitor to maintain DC correction during the subsequent scan line. Applications # Input amplifier in video equipment # Restoration amplifier in video mixers Ordering Information Part No. Temp. Range Pkg. OutlineÝ EL2090CN 0§ C to a 75§ C 14-Pin P-DIP MDP0031 EL2090CM 0§ C to a 75§ C 16-Lead SOL MDP0027 EL2090C EL2090C The video amplifier is optimized for video characteristics, and performance at NTSC is nearly perfect. It is a current-feedback amplifier, so that b 3 dB bandwidth changes little at various closed-loop gains. The amplifier easily drives video signal levels into 75X loads. With 100 MHz bandwidth, the EL2090 is also useful in HDTV applications. The sample-and-hold is optimized for fast sync pulse response. The application circuit shown will restore the video DC level in five scan lines, even if the HOLD pulse is only 2 ms long. The output impedance of the sample-and-hold is low and constant over frequency and load current so that the performance of the video amplifier is not compromised by connections to the DC restore circuitry. The EL2090C is fabricated in Elantec’s proprietary Complementary Bipolar process which produces NPN and PNP transistors with equivalent AC and DC performance. The EL2090C is specified for operation over the 0§ C to 75§ C temperature range. Connection Diagrams 14-Pin DIP Package 16-Pin SOL Package 2090 – 2 Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a ‘‘controlled document’’. Current revisions, if any, to these specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation. Patent pending. CMSÝ2090DS © 1990 Elantec, Inc. January 1996 Rev D 2090 – 1 EL2090C 100 MHz DC-Restored Video Amplifier Absolute Maximum Ratings (TA e 25§ C) Voltage between V a and Vb Voltage between VIN a , S/HIN a , S/HINb, CHOLD, and GND pins VOUT Current Current into VINb and HOLD Pins 36V 16 mA See Curves 0§ C to 75§ C Current S/HOUT Internal Power Dissipation Operating Ambient Temperature Range Operating Junction Temperature Plastic DIP or SOL Storage Temperature Range (V a ) a 0.5V to (Vb) b0.5V 60 mA 5 mA 150§ C b 65§ C to a 150§ C Important Note: All parameters having Min/Max specifications are guaranteed. The Test Level column indicates the specific device testing actually performed during production and Quality inspection. Elantec performs most electrical tests using modern high-speed automatic test equipment, specifically the LTX77 Series system. Unless otherwise noted, all tests are pulsed tests, therefore TJ e TC e TA. Test Level I II III IV V Test Procedure 100% production tested and QA sample tested per QA test plan QCX0002. 100% production tested at TA e 25§ C and QA sample tested at TA e 25§ C , TMAX and TMIN per QA test plan QCX0002. QA sample tested per QA test plan QCX0002. Parameter is guaranteed (but not tested) by Design and Characterization Data. Parameter is typical value at TA e 25§ C for information purposes only. Open Loop DC Electrical Characteristics VS e g 15V; RL e 150X, TA e 25§ C unless otherwise specified Parameter IS Description Total Supply Current Temp Typ Max Test Level Units Full Min 14 17 II mA mV Video Amplifier Section (Not Restored) VOS Input Offset Voltage Full 8 70 II IB a a VIN Input Bias Current Full 2 15 II mA IBb b VIN Input Bias Current Full 30 150 II mA ROL Transimpedance 25§ C 300 V V/mA AVOL Open-Loop Voltage Gain; VOUT e g 2V Full 56 65 II dB VO Output Voltage Swing VS e g 15V; RL e 2 kX VS e g 5V; RL e 150X Full g 12 g 13 II V Full g 3.0 g 3.5 II V 25§ C g 50 g 90 g 160 II mA 2 10 II mV ISC Short-Circuit Current; a VIN Set to g 2V; b VIN to Ground through 1 kX VOS Input Offset Voltage Full IB Input Bias Current Full 0.5 2.5 II mA IOS Input Offset Current Full 0.05 0.5 II mA RIN, DIFF Input Differential Resistance 25§ C 200 V kX RIN, COMM Input Common-Mode Resistance 25§ C 100 V MX VCM Common-Mode Input Range Full g 12.5 II V g 11 2 TD is 3.9in Sample-And-Hold Section EL2090C 100 MHz DC-Restored Video Amplifier Open Loop DC Electrical Characteristics VS e g 15V; RL e 150X, TA e 25§ C unless otherwise specified Ð Contd. Parameter Description Temp. Min Typ Max Test Level Units AVOL Large Signal Voltage Gain Full 15k 50k II V/V CMRR Common-Mode Rejection Ratio VCM e g 11V Full 75 95 II dB PSRR Power-Supply Rejection Ratio VS e g 5V to g 15V Full 75 95 II dB Vthresh HOLD Pin Logic Threshold Full 0.8 1.4 2.0 II V Idroop Hold Mode Droop Current Full 10 50 II nA Icharge Charge Current Available to Chold Full g 90 g 135 II mA VO Output Swing; RL e 2k Full g 10 g 13 ISC Short-Circuit Current 25§ C g 10 g 17 g 40 II V II mA TD is 2.3in Sample-And-Hold Section Ð Contd. Closed Loop AC Electrical Characteristics VS e g 15V; CL e 15 pF; Cstray (bVIN) e 2.5 pF; RF e RG e 300X; RL e 150X; Chold e 100 pF; TA e 25§ C Parameter Description Min Typ Max Test Level Units Video Amplifier Section SR SlewRate; VOUT from b2 to a 2V BW Bandwidth; 600 V V/ms 100 60 20 III III III MHz MHz MHz Differential Gain; VIN from b0.7V to 0.7V; F e 3.58 MHz 0.01 V % Differential Phase; VIN from b0.7V to 0.7V; F e 3.58 MHz 0.02 V § V MHz III pC V ns b 3 dB g 1 dB g 0.1 dB Peaking dG di 75 35 10 BW Gain-Bandwidth Product 1.3 DQ Sample to Hold Charge Injection (Note 1) 1.5 DT Sample to Hold or Hold to Sample Delay Time 20 Ts Sample to Hold Settling Time to 2 mV 200 5 V ns Note 1: The logic input is between 0V and 5V, with a 220X resistor in series with the HOLD pin and 39 pF capacitor from HOLD pin to ground. 3 TD is 3.4in Sample-And-Hold Section EL2090C 100 MHz DC-Restored Video Amplifier 2090 – 3 Figure 1. Typical Application (AV e a 2) Typical Performance Curves Relative Frequency Response for Various Gains Frequency Response with Different Loads (AV e a 2) 2090 – 4 Frequency Response Flatness for Various Load and Supply Conditions Frequency Response Flatness vs CIN b , AV e a 2 2090 – 5 4 EL2090C 100 MHz DC-Restored Video Amplifier Typical Performance Curves Ð Contd. Differential Gain and Phase vs Supply Voltage; AV e a 2, RL e 150X, VIN from 0 to a 0.7 VDC Deviation from Linear Phase vs Frequency Differential Gain vs DC Input Offset; AV e a 2, FO e 3.58 MHz, RL e 150X Differential Phase vs DC Input Offset; AV e a 2, FO e 3.58 MHz, RL e 150X 2090 – 12 Differential Gain vs DC Input Offset; AV e a 2 and FO e 30 MHz, RL e 150X Differential Phase vs DC Input Offset; AV e a 2, FO e 30 MHz, RL e 150X 2090 – 6 5 EL2090C 100 MHz DC-Restored Video Amplifier Typical Performance Curves Ð Contd. S/H Available Charge Current vs Temperature 2090 – 7 Sample-to-Hold Change Injection vs Temperature Typical Droop Current vs Temperature, VS e g 15V Supply Current vs Supply Voltage Supply Current vs Temperature; VS e g 15V 2090 – 8 2090 – 9 6 EL2090C 100 MHz DC-Restored Video Amplifier Typical Performance Curves Ð Contd. Maximum Power Dissipation vs Ambient TemperatureÐ 14-Pin PDIP and 16-Pin SOL This suggests that the largest applicable power supply voltages be used so that the output swing of the sample-and-hold can still correct for the variations of DC offset in the video input with large values of Raz. The typical application circuit shown will allow correction of g 1V inputs with good isolation of the sample-and-hold output. Good isolation is defined as no video degradation due to the insertion of the sample-andhold loop. Lower supply voltages will require a smaller value of DC feedback resistor to retain correction of the full input DC variation. The EL2090 differential phase performance is optimum at g 9V supplies, and differential gain only marginally improves above this voltage. Since all video characteristics mildly degrade with increasing die temperature, the g 9V levels are somewhat better than g 15V supplies. However, g 15V supplies are quite usable. 2090 – 10 Applications Information The EL2090C is a general purpose component and thus the video amplifier and sample-andhold pins are uncommitted. Therefore much of the ultimate performance as a DC-restored video amplifier will be set by external component values and parasitics. Some application considerations will be offered here. Ultimate video performance, especially in HDTV applications, can also be optimized by setting the black-level reference such that the signal span at the video amplifier’s output is set to its optimum range. For instance, setting the span to g 1V of output is preferable to a span of 0V to a 2V. The curves of differential gain and phase versus input DC offset will serve as guides. The DC feedback from the sample-and-hold can be applied to either positive or negative inputs of the video amplifier (with appropriate phasing of the sample-and-hold amplifier inputs). We will consider feedback to the inverting video input. During a sample mode (the HOLD input at a logic low), the sample-and-hold acts as a simple nulling op-amp. The DC feedback resistor may be split so that a bypass capacitor is added to reduce the initially small sample-and-hold transients to even smaller levels. The corruption can be reduced to as low as 1 mV peak seen at the video amplifier output. The size of the capacitor should not be so large as to de-stabilize the sample-and-hold feedback loop, nor so small as to reduce the video amplifier’s gain flatness. A resistor or some other video isolation network should be inserted between the video amplifier output and the sample-and-hold input to prevent excessive video from bleeding through the autozero section, as well as preventing spurious DC correction due to video signals confusing the sample-and-hold during autozero events. Figure 1 shows convenient component values. A full 3.58 MHz trap is not necessary for suppressing NTSC chroma burst interaction with the sample-and-hold input; the simple R-C network suggested in Figure 1 suffices. Ideally, the DC feedback resistor Raz is a high value so as not to couple a large amount of the AC signal on the video input back to the sampleand-hold amplifier output. The sample-and-hold output is a low impedance at high frequencies, but variations of the DC operating point will change the output impedance somewhat. No more than a few ohms output impedance change will occur, but this can cause gain variations in the 0.01% realm. This DC-dependent gain change is in fact a differential gain effect. Some small differential phase error will also be added. The best approach is to maximize the DC feedback resistor value so as to isolate the sampleand-hold from the video path as much as possible. Values of 1 kX or above for Raz will cause little to no video degradation. 7 EL2090C 100 MHz DC-Restored Video Amplifier hold step and increasing Chold is the most direct way to do this. Increasing Chold also reduces the slew rate of the sample and hold section but because of the limited size of the video signal, this is usually not a limitation. 2. A sampling interval (dictated by the HOLD pin) that is too small. By small, we mean less than 2 ms. Applications Information Ð Contd. The HOLD input to the sample-and-hold has a 1.4V threshold and is clamped to a diode below ground and 6V above ground. The hold step characteristics are not sensitive to logic high nor low levels (within TTL or CMOS swings), but logic slewrates greater than 1000V/ms can couple noise and hold step into the sample-to-hold output waveforms. The logic slewrate should be greater than 50V/ms to avoid hold jitter. To avoid artificially high droop in hold mode, the Chold pin and Chold itself should be guarded with circuit board traces connected to the output of the sample-and-hold. Low-leakage hold capacitors should be used, such as mica or mylar, but not ceramic. The excellent properties of more expensive polystyrene, polypropylene, or teflon capacitors are not needed. For a sampling interval that is wide enough, there is enough time for the loop to close and for the amplifier to discharge whatever charge was dumped onto Chold it during the initial power spike and to then ramp up (or down) to the voltage that is proper for a balanced loop. When the sampling interval is too small, there is insufficient time for internal devices to recover from their initial saturated state from power-up because the feedback is not closed long enough. Therefore, typical recovery times for the loop are 2 ms or greater. Summarizing, the two things that could prevent proper saturation recovery are (as mentioned above) too large a capacitor which slows the charge and discharge rate of the stored voltage at Chold and too small a sampling interval in which the entire feedback loop is closed. The user should be aware of a combination of conditions that may make the EL2090 operate incorrectly upon power-up. The fault condition can be described by noticing that the sample-andhold output (pin 11) appears locked at a voltage close to VCC. This voltage is maintained regardless of changes at the inputs to the sample-andhold (pins 5 and 6) or to the HOLD control input (pin 7). Two conditions must occur to bring this about: 1. A large value of CholdÐusually values of 1000 pF or more. This is not an unusual situation. Many users want to reduce the size of the The circuit shown below prevents the fault condition from occurring by preventing the node from ever saturating. By clamping the value of Chold to some value lower than the supply voltage less 2090 – 13 8 EL2090C 100 MHz DC-Restored Video Amplifier cy response versus gain graph, the peaking and bandwidth is a weak function of gain. The EL2090 was designed for Rf e 300X giving optimum gain flatness at Av e a 2. Unity-gain response is flattest for Rf e 360X; gains of a 5 can use Rf e 270X. In situations where the peaking is accentuated by load capacitance or b input capacitance the value of Rf will have to be increased, and some bandwidth will be sacrificed. Applications Information Ð Contd. a saturation voltage, we prevent this node from approaching the positive rail. The maximum voltage is set by the resistive voltage divider (between V a and GND) R1 and R2 plus a diode. This value can be adjusted if the maximum size of the input signal is known. The diode used is an off-the-shelf 1N914 or 1N916. As is true of all 100 MHz amplifiers, good bypassing of the supplies to ground is mandatory. 1 mF tantalums are sufficient, and 0.01 mF leaded chip capacitors in parallel with medium value electrolytics are also good. Leads longer than (/2 can induce a characteristic 150 MHz resonance and ringing. The VIN a of the video amplifier should not look into an inductive source impedance. If the source is physically remote and a terminated input line is not provided, it may be necessary to connect an input ‘‘snubber’’ to ground. A snubber is a resistor in series with a capacitor which de-Q’s the input resonance. Typical values are 100X and 30 pF. The VIN b of the video amplifier should have the absolute minimum of parasitic capacitance. Stray capacitance of more than 3 pF will cause peaking and compromise the gain flatness. The bandwidth of the amplifier is fundamentally set by the value of Rf. As demonstrated by the frequen- The output of the video amplifier is sensitive to capacitive loads greater than 25 pF, and a snubber to ground or a resistor in series with the output is useful to isolate reactive loads. 9 EL2090C 100 MHz DC-Restored Video Amplifier * Revision A, October 1992 .param vclamp e Àb0.002 * (TEMPb25)Ó * * Connections: Vidin a * Vidinb l a Vsupply * l l b Vsupply * l l l Vid Out * l l l l S/H In a * l l l l l * S/H Inb l l l l l l * S/H Out l l l l l l l Hold Control * l l l l l l l l Chold * l l l l l l l l l * l l l l l l l l l l .subckt EL2090/EL 3 1 14 12 13 5 6 11 7 9 * * ******** Video Amplifier ******************* ************ Sample & Hold ************************* * * e1 20 0 3 0 1.0 g40 49 0 5 6 1e-3 vis 20 34 0V vcur 49 42 0v h2 34 38 vxx 1.0 r43 6 0 100Meg r10 1 36 25 r44 5 0 100Meg l1 36 38 20nH r40 42 0 4K iinp 3 0 10mA d41 50 42 diode iinm 1 0 5mA d42 42 51 diode h1 21 0 vis 600 v41 50 0 ÀvclampÓ r2 21 22 1K v42 0 51 ÀvclampÓ d1 22 0 dclamp g41 44 0 42 0 200e-6 d2 0 22 dclamp r42 44 0 31Meg e2 23 0 22 0 0.00166666666 d45 9 14 diode l5 23 24 0.7mH d46 12 9 diode c5 24 0 0.5pF s1 44 9 48 0 swa r5 24 0 600 e40 46 0 9 0 0.95 g1 0 25 24 0 1.0 i40 0 9 10nA rol 25 0 400K r45 46 47 70 cdp 25 0 7.7pF l40 47 11 70nH q1 12 25 26 qp c40 7 9 0.32pF q2 14 25 27 qn r47 7 48 10K q3 14 26 28 qn c41 48 0 3pF q4 12 27 29 qp * r7 28 13 4 * Models r8 29 13 4 * ios1 14 26 2.5mA .model qn npn(is e 5e-15 bf e 500 tf e 0.1nS) ios2 27 12 2.5mA .model qp pnp(is e 5e-15 bf e 500 tf e 0.1nS) ips 14 12 7.2mA .model dclamp d(is e 1e-30 ibv e 0.02 bv e 2.75 n e 4) ivos 0 33 5mA .model diode d vxx 33 0 0V .model swa vswitch(von e 1.2v voff e 1.6v roff e 1e12 ron e 100) r11 33 0 1K .ends 10 TD is 6.6in EL2090 Macromodel EL2090C 100 MHz DC-Restored Video Amplifier EL2090 Macromodel Ð Contd. 2090 – 15 Sample and Hold Amplifier 11 EL2090C EL2090C 100 MHz DC-Restored Video Amplifier EL2090 Macromodel Ð Contd. 2090 – 14 Video Amplifier General Disclaimer Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. January 1996 Rev D WARNING Ð Life Support Policy Elantec, Inc. products are not authorized for and should not be used within Life Support Systems without the specific written consent of Elantec, Inc. Life Support systems are equipment intended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. Users contemplating application of Elantec, Inc. products in Life Support Systems are requested to contact Elantec, Inc. factory headquarters to establish suitable terms & conditions for these applications. Elantec, Inc.’s warranty is limited to replacement of defective components and does not cover injury to persons or property or other consequential damages. Elantec, Inc. 1996 Tarob Court Milpitas, CA 95035 Telephone: (408) 945-1323 (800) 333-6314 Fax: (408) 945-9305 European Office: 44-71-482-4596 12 Printed in U.S.A.