Revised April 2002 CD4024BC 7-Stage Ripple Carry Binary Counter General Description Features The CD4024BC is a 7-stage ripple-carry binary counter. Buffered outputs are externally available from stages 1 through 7. The counter is reset to its logical “0” stage by a logical “1” on the reset input. The counter is advanced one count on the negative transition of each clock pulse. ■ Wide supply voltage range: 3.0V to 15V ■ High noise immunity: 0.45 VDD (typ.) ■ Low power TTL compatibility: or 1 driving 74LS ■ High speed: Fan out of 2 driving 74L 12 MHz (typ.) input pulse rate VDD − VSS = 10V ■ Fully static operation Ordering Code: Order Number Package Number Package Description CD4024BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4024BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Top View © 2002 Fairchild Semiconductor Corporation DS005957 www.fairchildsemi.com CD4024BC 7-Stage Ripple Carry Binary Counter October 1987 CD4024BC Logic Diagrams Input Logic Flip-flop logic (1 of 7 identical stages). Block Diagram www.fairchildsemi.com 2 Recommended Operating Conditions (Note 1) (Note 2) −0.5 to +18 VDC DC Supply Voltage (VDD) Input Voltage (VIN ) Input Voltage (VIN) −65°C to +150°C Storage Temperature Range (TS) 700 mW Small Outline 500 mW −55°C to +125°C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Lead Temperature Note 2: VSS = 0V unless otherwise specified. 260°C (Soldering, 10 seconds) (TL) 0 to VDD VDC Operating Temperature Range (TA) Power Dissipation (PD) Dual-In-Line +3 to +15 VDC DC Supply Voltage (VDD) −0.5 to VDD +0.5 VDC DC Electrical Characteristics (Note 2) Symbol IDD VOL VOH VIL VIH IOL IOH IIN Parameter Quiescent Device Current LOW Level Output Voltage HIGH Level Output Voltage LOW Level Input Voltage HIGH Level Input Voltage −55°C Conditions Min +25°C Max Min Typ +125°C Max Min VDD = 5V 5 0.3 5 150 VDD = 10V 10 0.5 10 300 VDD = 15V 20 0.7 20 600 Units µA |lO|<1 µA VDD = 5V 0.05 0 0.05 0.05 VDD = 10V 0.05 0 0.05 0.05 VDD = 15V 0.05 0 0.05 0.05 V |lO|<1 µA VDD = 5V 4.95 4.95 5 VDD = 10V 9.95 9.95 10 9.95 VDD = 15V 14.95 14.95 15 14.95 4.95 V |lO|<1 µA VDD = 5V, VO = 0.5V or 4.5V 1.5 2 1.5 VDD = 10V, VO = 1.0V or 9.0V 3.0 4 3.0 3.0 VDD = 15V, VO = 1.5V or 13.5V 4.0 6 4.0 4.0 1.5 V |lO|<1 µA VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 3 3.5 VDD = 10V, VO = 1.0V or 9.0V 7.0 7.0 6 7.0 VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 9 11.0 LOW Level Output Current VDD = 5V, VO = 0.4V 0.64 0.51 0.88 0.36 (Note 3) VDD = 10V, VO = 0.5V 1.6 1.3 2.25 0.9 VDD = 15V, VO = 1.5V 4.2 3.4 8.8 2.4 HIGH Level Output Current VDD = 5V, VO = 4.6V −0.64 −0.51 −0.88 −0.36 (Note 3) VDD = 10V, VO = 9.5V −1.6 −1.3 −2.25 −0.9 VDD = 15V, VO = 13.5V −4.2 −3.4 −8.8 −2.4 Input Current Max V mA mA VDD = 15V, VIN = 0V −0.1 −10−5 −0.1 −1.0 VDD = 15V, VIN = 15V 0.1 10−5 0.1 1.0 µA Note 3: IOH and IOL are tested one output at a time. 3 www.fairchildsemi.com CD4024BC Absolute Maximum Ratings(Note 1) CD4024BC AC Electrical Characteristics (Note 4) TA = 25°C, CL = 50 pF, RL = 200 k, tr and tf = 20 ns unless otherwise specified Symbol tPHL, tPLH tTHL, tTLH tWL, tWH tRCL, tFCL fCL tPHL tWH CIN Typ Max Propagation Delay Time Parameter VDD = 5V 185 350 to Q1 Output VDD = 10V 85 125 VDD = 15V 70 100 VDD = 5V 100 200 VDD = 10V 50 100 VDD = 15V 40 80 Transition Time Minimum Input Pulse Width Input Rise and Fall Time Maximum Input Pulse Frequency Reset Propagation Delay Time Reset Minimum Pulse Width Input Capacitance (Note 5) Conditions VDD = 5V 75 200 VDD = 10V 40 110 VDD = 15V 35 90 VDD = 5V 15 VDD = 10V 10 VDD = 15V 8 VDD = 5V 1.5 5 VDD = 10V 4 12 VDD = 15V 5 15 VDD = 5V 185 350 85 125 VDD = 15V 70 100 VDD = 5V 185 350 VDD = 10V 85 125 VDD = 15V 70 100 Any Input 5 7.5 Note 5: Capacitance is guaranteed by periodic testing. 4 Units ns ns ns µs MHz VDD = 10V Note 4: AC Parameters are guaranteed by DC correlated testing. www.fairchildsemi.com Min ns ns pF CD4024BC Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 5 www.fairchildsemi.com CD4024BC 7-Stage Ripple Carry Binary Counter Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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