Si9435DY P-Channel Logic Level PowerTrench MOSFET General Description Features This P-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. • –5.3 A, –30 V. RDS(ON) = 50 mΩ @ VGS = –10 V RDS(ON) = 80 mΩ @ VGS = –4.5 V • Low gate charge These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. • Fast switching speed • High performance trench technology for extremely low RDS(ON) Applications • DC/DC converter • High power and current handling capability • Load switch • Motor Drive D D D D SO-8 S S S G Absolute Maximum Ratings Symbol 5 4 6 3 7 2 8 1 TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter –30 V VGSS Gate-Source Voltage ±20 V ID Drain Current -5.3 A PD Power Dissipation for Single Operation – Continuous (Note 1a) – Pulsed -20 (Note 1a) 2.5 (Note 1b) 1.2 (Note 1c) TJ, TSTG W 1.0 -55 to +150 °C (Note 1a) 50 °C/W (Note 1) 25 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity 9435 Si9435DY 13’’ 12mm 2500 units 2001 Fairchild Semiconductor International Si9435DY Rev A(W) Si9435DY January 2001 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = –250 µA, Referenced to 25°C VDS = –24 V, VGS = 0 V –1 µA IGSSF Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –20 V, VDS = 0 V –100 nA –3 V On Characteristics –30 V –22 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = –250 µA ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = –250 µA, Referenced to 25°C 4 VGS = –10 V, ID = –5.3 A VGS = –10 V, ID = –5.3 A, TJ=125°C VGS = –4.5 V, ID = –4.2A, 38 54 55 ID(on) On–State Drain Current VGS = –10 V, VDS = –5 V gFS Forward Transconductance VDS = –15 V, ID = –5.3 A VDS = –15 V, f = 1.0 MHz V GS = 0 V, –1 –1.7 mV/°C 50 79 80 mΩ –20 A 12 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) tf Qg Total Gate Charge Qgs Gate–Source Charge Qgd Gate–Drain Charge 690 pF 306 pF 77 pF (Note 2) 7 14 ns 10 18 ns Turn–Off Delay Time 19 34 ns Turn–Off Fall Time 11 20 ns 14 23 nC VDD = –15 V, VGS = –10 V, VDS = –15 V, VGS = –10 V ID = –1 A, RGEN = 6 Ω ID = –5.3 A, 2.4 nC 4.8 nC Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = –5.3 A Voltage (Note 2) –0.86 –5.3 A –1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 50°C/W when 2 mounted on a 1in pad of 2 oz copper b) 105°C/W when 2 mounted on a .04 in pad of 2 oz copper c) 125°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% Si9435DY Rev A(W) Si9435DY Electrical Characteristics Si9435DY Typical Characteristics 30 2.5 -7.5V 25 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = -10.0V -5.0V -6.5V -4.0V -6.0V 20 15 10 -3.0V 5 0 0 1 2 3 4 5 VGS = -3.5V 2 -4.0V -4.5V 1.5 -5.5V -7.0V 1 -10.0V 0.5 0 5 -VDS, DRAIN TO SOURCE VOLTAGE (V) 10 15 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 0.2 ID = -5.3A ID = -5.3A VGS = -10V 1.4 0.15 1.2 0.1 1.0 o TA = 125 C 0.05 o TA = 25 C 0.8 0 0.6 -50 -25 0 25 50 75 100 125 150 2 4 o 6 8 10 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 20 100 VDS = -10V 16 VGS = 0V o o 25 C TA = -55 C 10 o 125 C o 12 1 8 0.1 4 0.01 TA = 125 C o 25 C 0 o -55 C 0.001 1 2 3 4 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. Si9435DY Rev A(W) Si9435DY Typical Characteristics 10 1000 ID = -5.3A VDS = -5V -10V 8 f = 1 MHz VGS = 0 V CISS 800 -15V 6 600 4 400 2 200 COSS CRSS 0 0 0 5 10 15 0 5 Qg, GATE CHARGE (nC) 10 15 20 25 30 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 100 50 100µs RDS(ON) LIMIT 1ms 10ms 10 100ms 1s 1 SINGLE PULSE RθJA = 125°C/W TA = 25°C 40 30 10s 0.1 20 DC VGS = -10V SINGLE PULSE 10 o RθJA = 125 C/W o TA = 25 C 0.01 0 0.1 1 10 100 0.001 0.01 0.1 -VDS, DRAIN-SOURCE VOLTAGE (V) 1 10 100 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA 0.2 o 0.1 RθJA = 125 C/W 0.1 0.05 0.02 0.01 P(pk) 0.01 SINGLE PULSE t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. Si9435DY Rev A(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. G