TI SN74LVCC4245A

SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
D
D
D
D
EPIC  (Enhanced-Performance Implanted
CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
DB, DW, OR PW PACKAGE
(TOP VIEW)
VCCA
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
GND
description
This 8-bit (octal) noninverting bus transceiver
uses two separate power-supply rails. The A port,
VCCA, is dedicated to accept a 5-V supply level,
and the configurable B port, which is designed to
track VCCB, accepts voltages from 3 V to 5 V. This
allows for translation from a 3.3-V to a 5-V
environment and vice versa.
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VCCB
NC
OE
B1
B2
B3
B4
B5
B6
B7
B8
GND
NC – No internal connection
The SN74LVCC4245A is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are
effectively isolated.
The SN74LVCC4245A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OPERATION
OE
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright  1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
logic diagram (positive logic)
DIR
2
22
OE
A1
3
21
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCCA + 0.5 V
I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCCB + 0.5 V
Except I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCCA + 0.5 V
Output voltage range, VO (see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCCA + 0.5 V
(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCCB + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCCA, VCCB, or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. This value is limited to 6 V maximum.
2. The package thermal impedance is calculated in accordance with JESD 51.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
recommended operating conditions (see Note 3)
VCCA
VCCA
VCCB
VIHA
VCCB
Supply voltage
Supply voltage
High-level input voltage
VOB ≤ 0.1 V,
VOB ≥ VCCB – 0.1 V
45V
4.5
5.5 V
VIHB
High-level input voltage
VOA ≤ 0.1 V,
VOA ≥ VCCA – 0.1 V
45V
4.5
5.5 V
VILA
Low-level input voltage
VOB ≤ 0.1 V,
VOB ≥ VCCB – 0.1 V
45V
4.5
5.5 V
VILB
Low-level input voltage
VOA ≤ 0.1 V,
VOA ≥ VCCA – 0.1 V
45V
4.5
5.5 V
MIN
NOM
MAX
4.5
5
5.5
V
2.7
3.3
5.5
V
2.7 V
2
3.6 V
2
5.5 V
2
2.7 V
2
3.6 V
2
5.5 V
3.85
UNIT
V
V
2.7 V
0.8
3.6 V
0.8
5.5 V
0.8
2.7 V
0.8
3.6 V
0.8
5.5 V
1.65
V
V
VIA
VIB
Input voltage
0
Input voltage
0
VOA
VOB
Output voltage
0
IOHA
IOHB
High-level output current
4.5 V
3V
–24
mA
High-level output current
4.5 V
2.7 V to 4.5 V
–24
mA
IOLA
IOLB
Low-level output current
4.5 V
3V
24
mA
Low-level output current
4.5 V
2.7 V to 4.5 V
24
mA
Output voltage
0
VCCA
VCCB
V
VCCA
VCCB
V
V
V
TA
Operating free-air temperature
–40
85
°C
NOTE 3: All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application
report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCCA
4.5 V
IOH = –100 µA
IOH = –24 mA
VOHA
4.5 V
IOH = –100 µA
4.5 V
12 mA
IOH = –12
45V
4.5
VOHB
IOH = –24 mA
VOLA
4.5 V
MIN
TYP
4.4
4.49
3V
3.76
4.25
VCCB
3V
3V
2.9
2.99
2.7 V
2.2
2.5
3V
2.46
2.85
2.7 V
2.1
2.3
3V
2.25
2.65
4.5 V
3.76
4.25
IOL = 100 µA
IOL = 24 mA
4.5 V
3V
4.5 V
3V
IOL = 100 µA
IOL = 12 mA
4.5 V
3V
4.5 V
IOL = 24 mA
4.5 V
MAX
V
V
0.1
0.21
0.44
2.7 V
0.11
0.44
2.7 V
0.22
0.5
3V
0.21
0.44
4.5 V
0.18
0.44
3.6 V
±0.1
±1
5.5 V
±0.1
±1
5.5 V
3.6 V
±0.5
±5
5.5 V
Open
8
80
3.6 V
8
80
5.5 V
8
80
3.6 V
5
50
5.5 V
8
80
VOLB
Control inputs
VI = VCCA or GND
IOZ†
A or B ports
VO = VCCA/B or GND,
An = VCC or GND
VI = VIL or VIH
IO(A port)
0,
t) = 0
Bn = VCCB or GND
55V
5.5
A to B
An = VCCA or GND,
GND
IO (B port)
t) = 0
55V
5.5
A port
VI = VCCA – 2.1 V, Other inputs at VCCA or GND,
OE at GND and DIR at VCCA
5.5 V
5.5 V
1.35
1.5
OE
VI = VCCA – 2.1 V, Other inputs at VCCA or GND,
DIR at VCCA or GND
5.5 V
5.5 V
1
1.5
DIR
VI = VCCA – 2.1 V, Other inputs at VCCA or GND,
OE at VCCA or GND
5.5 V
3.6 V
1
1.5
∆ICCB‡
B port
VI = VCCB – 0.6 V, Other inputs at VCCB or GND,
OE at GND and DIR at GND
5.5 V
3.6 V
0.35
0.5
Ci
Control inputs
Open
Open
5
Cio
A or B ports
5V
3.3 V
11
ICCB
∆ICCA‡
B to A
VI = VCCA or GND
VO = VCCA/B or GND
V
0.1
II
ICCA
55V
5.5
UNIT
V
µA
µA
µA
µA
mA
mA
pF
pF
† For I/O ports, the parameter IOZ includes the input leakage current.
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or the associated VCC.
4
POST OFFICE BOX 655303
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SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figures 1 through 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPHL
tPLH
A
B
tPHL
tPLH
B
A
tPZL
tPZH
OE
A
tPZL
tPZH
OE
B
tPLZ
tPHZ
OE
A
tPLZ
tPHZ
OE
B
VCCA = 5 V
± 0.5 V,
VCCB = 5 V
± 0.5 V
VCCA = 5 V
± 0.5 V,
VCCB = 2.7 V
TO 3.6 V
MIN
MAX
MIN
MAX
1
7.1
1
7
1
6
1
7
1
6.8
1
6.2
1
6.1
1
5.3
1
9
1
9
1
8.3
1
8
1
8.2
1
10
1
8.1
1
10.2
1
4.7
1
5.2
1
4.9
1
5.2
1
5.4
1
5.4
1
6.3
1
7.4
UNIT
ns
ns
ns
ns
ns
ns
operating characteristics, VCCA = 5 V, VCCB = 3.3 V, TA = 25°C
PARAMETER
Cpd
d
Power dissipation capacitance per transceiver
POST OFFICE BOX 655303
TEST CONDITIONS
Outputs enabled
Outputs disabled
• DALLAS, TEXAS 75265
CL = 0
0,
f = 10 MHz
TYP
20
6.5
UNIT
pF
5
SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
PARAMETER MEASUREMENT INFORMATION FOR A TO B
VCCA = 4.5 V TO 5.5 V AND VCCB = 2.7 V TO 3.6 V
6V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
LOAD CIRCUIT
tw
3V
1.5 V
Input
1.5 V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V
1.5 V
0V
tPHL
tPLH
VOH
Output
1.5 V
1.5 V
0V
tPZL
3V
Input
3V
Output
Control
1.5 V
1.5 V
VOL
tPLZ
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NONINVERTING OUTPUTS
1.5 V
tPZH
3V
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH – 0.3 V
VOH
[0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
PARAMETER MEASUREMENT INFORMATION FOR A TO B
VCCA = 4.5 V TO 5.5 V AND VCCB = 3.6 V TO 5.5 V
7V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
GND
LOAD CIRCUIT
tw
3V
1.5 V
Input
1.5 V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V
1.5 V
0V
0V
tPHL
VOH
1.5 V
1.5 V
VOL
tPLZ
Output
Waveform 1
S1 at 7 V
(see Note B)
1.5 V
tPLH
Output
1.5 V
tPZL
3V
Input
3V
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NONINVERTING OUTPUTS
1.5 V
tPZH
3.5 V
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH – 0.3 V
VOH
[0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 2. Load Circuit and Voltage Waveforms
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SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
PARAMETER MEASUREMENT INFORMATION FOR B TO A
VCCA = 4.5 V TO 5.5 V AND VCCB = 2.7 V TO 3.6 V
2 × VCCA
500 Ω
From Output
Under Test
S1
Open
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCA
GND
GND
CL = 50 pF
(see Note A)
500 Ω
LOAD CIRCUIT
tw
3V
1.5 V
Input
1.5 V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V
1.5 V
0V
VOH
1.5 V
1.5 V
0V
tPLZ
Output
Waveform 1
S1 at 2 × VCCA
(see Note B)
tPHL
tPLH
Output
1.5 V
tPZL
3V
Input
3V
Output
Control
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
1.5 V
VCCA
VOL + 0.3 V
VOL
tPHZ
tPZH
1.5 V
VOH – 0.3 V
VOH
[0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 3. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74LVCC4245A
OCTAL DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS
SCAS584F – NOVEMBER 1996 – REVISED AUGUST 1998
PARAMETER MEASUREMENT INFORMATION FOR B TO A
VCCA = 4.5 V TO 5.5 V AND VCCB = 3.6 V TO 5.5 V
2 × VCCA
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCA
GND
LOAD CIRCUIT
tw
VCCB
VCCB/2
Input
VCCB/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCB/2
VCCB/2
0V
tPHL
tPLH
VOH
Output
1.5 V
1.5 V
1.5 V
0V
tPZL
VCCB
Input
3V
Output
Control
1.5 V
VOL
tPLZ
Output
Waveform 1
S1 at 2 × VCCA
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NONINVERTING OUTPUTS
1.5 V
VCCA
VOL + 0.3 V
VOL
tPHZ
tPZH
1.5 V
VOH – 0.3 V
VOH
[0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 4. Load Circuit and Voltage Waveforms
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Copyright  1998, Texas Instruments Incorporated