TI SNJ54F541J

SN54F541, SN74F541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS021A – D3126, JANUARY 1989 – REVISED OCTOBER 1993
•
•
•
SN54F541 . . . J PACKAGE
SN74F541 . . . DW OR N PACKAGE
(TOP VIEW)
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Plastic and Ceramic DIPs
OE1
A1
A2
A3
A4
A5
A6
A7
A8
GND
description
The ′F541 octal buffer/line driver is ideal for driving
bus lines or buffering memory address registers.
The device features inputs and outputs on
opposite sides of the package to facilitate
printed-circuit-board layout.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output enable
(OE1 or OE2) input is high, all eight outputs are in
the high-impedance state.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
A2
A1
OE1
VCC
OE2
SN54F541 . . . FK PACKAGE
(TOP VIEW)
The SN54F541 is characterized for operation over
the full military temperature range of – 55°C to
125°C. The SN74F251 is characterized for
operation from 0°C to 70°C.
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
Y1
Y2
Y3
Y4
Y5
A8
GND
Y8
Y7
Y6
A3
A4
A5
A6
A7
FUNCTION TABLE
INPUTS
A
OUTPUT
Y
OE1
OE2
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
Copyright  1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2–1
SN54F541, SN74F541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS021A – D3126, JANUARY 1989 – REVISED OCTOBER 1993
logic symbol†
1
logic diagram (positive logic)
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
EN
19
2
1
OE1
&
19
OE2
18
1
3
17
4
16
5
15
6
14
7
13
8
12
9
11
2
A1
Y1
18
Y1
Y2
Y3
Y4
To Seven Other Channels
Y5
Y6
Y7
Y8
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . – 0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC
Current into any output in the low state: SN54F541 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74F541 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range: SN54F541 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74F541 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
SN54F541
VCC
VIH
Supply voltage
VIL
IIK
Low-level input voltage
High-level input voltage
SN74F541
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
2
2
UNIT
V
V
0.8
0.8
V
Input clamp current
– 18
– 18
mA
IOH
IOL
High-level output current
– 12
– 15
mA
Low-level output current
48
64
mA
TA
Operating free-air temperature
70
°C
2–2
– 55
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
125
0
SN54F541, SN74F541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS021A – D3126, JANUARY 1989 – REVISED OCTOBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V
VCC = 4.75 V,
VOL
VCC = 4
4.5
5V
IOZH
IOZL
VCC = 5.5 V,
VCC = 5.5 V,
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
IIL
IOS‡
VCC = 5.5 V,
VCC = 5.5 V,
ICC
SN54F541
TYP†
MAX
TEST CONDITIONS
VCC = 5.5 V
MIN
II = – 18 mA
IOH = – 3 mA
SN74F541
TYP†
MAX
MIN
– 1.2
IOH = – 12 mA
IOH = – 15 mA
2.4
3.3
2
3.2
IOH = – 3 mA
IOL = 48 mA
– 1.2
2.4
3.3
2
3.1
UNIT
V
V
2.7
0.38
IOL = 64 mA
VO = 2.7 V
0.55
0.42
VO = 0.5 V
VI = 7 V
VI = 2.7 V
VI = 0.5 V
– 100
V
50
50
µA
– 50
– 50
µA
0.1
0.1
mA
20
20
µA
– 0.6
mA
– 225
mA
– 0.6
VO = 0
Outputs high
0.55
– 225
– 100
28
35
28
35
Outputs low
62
75
62
75
Outputs disabled
40
55
40
55
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
switching characteristics (see Note 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
CL = 50 pF,
RL = 500 Ω,
TA = 25°C
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX§
′F541
tPLH
tPHL
Any A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
UNIT
SN54F541
SN74F541
MIN
TYP
MAX
MIN
MAX
MIN
MAX
1.5
3.3
5.5
1
6.5
1.5
6
1.5
2.7
5.5
1
6.5
1.5
6
3
5.8
8
1.7
10
2.5
9.5
3.5
6.1
8.5
2.2
10
3
9.5
1.5
3.4
6
1
7
1.5
6.5
1.5
2.9
5.5
1
7.5
1.5
6
ns
ns
ns
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2–3
SN54F541, SN74F541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS021A – D3126, JANUARY 1989 – REVISED OCTOBER 1993
2–4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9175301M2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9175301MRA
ACTIVE
CDIP
J
20
1
TBD
5962-9175301MSA
ACTIVE
CFP
W
20
1
SN74F541DW
ACTIVE
SOIC
DW
20
25
SN74F541DWE4
ACTIVE
SOIC
DW
20
25
SN74F541DWR
ACTIVE
SOIC
DW
SN74F541DWRE4
ACTIVE
SOIC
SN74F541N
ACTIVE
SN74F541NE4
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
TBD
A42
N / A for Pkg Type
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74F541NSR
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74F541NSRE4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ54F541FK
ACTIVE
LCCC
FK
20
1
TBD
SNJ54F541J
ACTIVE
CDIP
J
20
1
TBD
A42 SNPB
N / A for Pkg Type
SNJ54F541W
ACTIVE
CFP
W
20
1
TBD
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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