HC5520 S E M I C O N D U C T O R CO/PABX Polarity Reversal Subscriber Line Interface Circuit April 1997 Features Description • Normal and Reversed DC Feed The HC5520 is a Monolithic Subscriber Line Interface Circuit (SLIC) for Analog Subscriber Line cards in Central Office and PABX switches. • Current Limited Loop Feed • Ringing, Test-In, and Test-Out Relay Drivers The HC5520 provides a comprehensive set of features for these applications including loop reversal, zero crossing ringing relay operation, long loop drive and a mutually independent setting of the receive and transmit gains, and the two wire impedance synthesis. Advanced power management features combined with a small 44 lead MQFP package allow significant board space to be freed up for additional line circuits. • Thermal Shutdown Protection with Alert Signal • On-Hook Transmission • Selectable Transmit and Receive Gain Setting • Selectable 2-Wire Impedance Matching • Zero Crossing Ring Trip Detection and Ring Relay Release The HC5520 is fabricated in a Harris state-of-the-art Bonded Wafer High Voltage process, providing freedom from traditional JI latch-up phenomena without the use of additional power supply filtering components or substrate tie connections. The very low parasitics and leakages associated with this process provide an exceptionally flat performance over frequency and temperature. • Parallel Digital Control and Status Monitoring • Protection Resistors Inside Feedback Loop Allows the Use of PTC Devices Without Impact on Longitudinal Balance • Thermal Management Features Ordering Information Applications TEMP. PART NUMBER RANGE (oC) • CO/PABX Line Circuits PACKAGE PKG. NO. HC5520CQ 0 to 70 44 Ld MQFP Q44.10x10 HC5520CM 0 to 70 44 Ld PLCC N44.65 Block Diagram RX TX TX4W RN KZO TA TB TEST CONTROL 4-WIRE INTERFACE / Z0 TSDO HC5520 SHDO 2-WIRE INTERFACE PRI PDI TIP LOGIC TIPSEN RINGSEN RING RCI TBI RD TAI RING CONTROL AGND BATTERY REFERENCE BIAS VBAT RPSB POWER MANAGEMENT VCC VEE RDC RPST CDC CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. © Harris Corporation 1997 RPSR RPSG CP Copyright RBL CRTD BGND RGND RBH 1 File Number 4148.2 HC5520 Absolute Maximum Ratings (Note 1) Thermal Information VCC to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V VEE to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V VBAT to BGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80V AGND to BGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3V Digital Pins to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V ESD Withstand (Human Body Model) . . . . . . . . . . . . . . . . . . . 500V Thermal Resistance (Typical, Note 1) θJA (oC/W) MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 PLCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Maximum Power Dissipation MQFP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21W PLCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.74W Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150o Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (Lead tips only) Operating Conditions Temperature Range HC5520CQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC HC5520CM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Recommended Operating Conditions For maximum integrity, nominal operating conditions should be selected so that operation is always within the following ranges: PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Battery Supply VBAT -42 -48 -58 VDC Positive Supply VCC 4.75 5 5.25 VDC Negative Supply VEE -4.75 -5 -5.25 VDC Ringing Supply VRINGING 60 75 90 VRMS Loop Resistance RL 200 - 1800 Ω Ambient Temperature TA 0 25 70 oC Die Temperature TD - - 150 oC Electrical Specifications Unless Otherwise Specified: Typical Parameters are at TA = 25oC, VCC = +5V, VEE = -5V, VBAT = -48V, AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600Ω 2-Wire Terminating Impedance with 0dB transmit and receive gain. CONDITIONS PARAMETER MODE LOAD VBAT OTHER CONDITIONS FREQ/ LEVEL MIN TYP MAX UNITS POWER SUPPLY CURRENTS (Figure 4) ICC normal reverse p’down Open -48V VCC = 5V 5.0 6.0 2.0 8.0 8.9 3.7 11.0 12.0 5.5 mA mA mA IEE normal reverse p’down Open -48V VEE = -5V -6.0 -7.0 -3.0 -3.6 -4.9 -1.7 -2.0 -3.0 -0.7 mA mA mA IBB normal reverse p’down Open -48V VCC = 5V, VEE = -5V -7.0 -7.0 -1.0 -4.2 -4.0 -0.4 -2.0 -2.0 0.0 mA mA mA - 150 - oC -5.50 -46.00 -4.16 -43.60 -2.46 -42.00 V V THERMAL SHUTDOWN Thermal Shutdown Temperature, Die Temperature normal reverse -48V BATTERY FEED CHARACTERISTICS - 2W VOLTAGES (Figure 4) VTIP normal reverse Open -48V 2 HC5520 Unless Otherwise Specified: Typical Parameters are at TA = 25oC, VCC = +5V, VEE = -5V, VBAT = -48V, AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600Ω 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued) Electrical Specifications CONDITIONS PARAMETER MODE LOAD VBAT VRING normal reverse Open VTIP normal reverse VRING normal reverse OTHER CONDITIONS FREQ/ LEVEL MIN TYP MAX UNITS -48V -45.54 -6.00 -43.80 -4.26 -42.50 -2.00 V V Open -42V -5.00 -40.00 -3.68 -38.12 -2.46 -37.00 V V Open -42V -39.54 -5.00 -38.34 -3.78 -37.00 -2.00 V V BATTERY FEED CHARACTERISTICS - LOOP CURRENT (Figure 5) Normal Loop Current normal reverse 1800Ω -42V 14.5 14.5 16.5 16.3 19.0 19.0 mA mA Normal Loop Current normal reverse 1800Ω -48V 18.0 18.0 18.8 18.6 22.0 22.0 mA mA Short Circuit Loop Current Limit normal reverse 100Ω -48V 22.0 22.0 26.4 27.0 42.0 42.0 mA mA 2.4K 4.6K 9K Ω LOOP SUPERVISION - SWITCH HOOK DETECTION (Figure 6) Off-Hook Detection normal reverse -48V LOOP SUPERVISION - DIAL PULSE DISTORTION (Figure 7) Dial Pulse Distortion normal 100Ω -58V 25oC - 0.1 3 % Dial Pulse Distortion normal 1800Ω -42V 25oC - 0.1 3 % LOOP SUPERVISION - RING TRIP DETECTION (Figure 8) Ring Trip Detect Ringing 1800Ω +1REN -42V 60VRMS - - 150 ms Ring Trip Non-Detect Ringing 3REN// 20KΩ -58V 90VRMS 20K - - Ω LOOP SUPERVISION - POLARITY REVERSAL TIME (Figure 9) Polarity Reversal Time normal to reverse 1800Ω -42V - 0.04 10 ms Polarity Reversal Time reverse to normal 1800Ω -42V - 0.04 10 ms LOOP SUPERVISION - DIGITAL INTERFACE Input Low Voltage, VIL All Digital Inputs - - 0.8 V Input High Voltage, VIH All Digital Inputs 2.0 - - V Input Low Current, IIL AGND < VIN < VIL -20 - - µA Input High Current, IIH VIH < VIN < VCC - 0 +10 µA Output Low Voltage, VOL 1 LSTTL Load - - 0.4 V Output High Voltage, VOH 1 LSTTL Load 2.4 - - V Relay Driver Output Low Voltage, VOL VCC = 4.75V, Load = 35mA - 0.4 0.8 V Relay Driver Output High Current, IOH VCC = 5.25V - - 10 µA 3 HC5520 Unless Otherwise Specified: Typical Parameters are at TA = 25oC, VCC = +5V, VEE = -5V, VBAT = -48V, AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600Ω 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued) Electrical Specifications CONDITIONS PARAMETER MODE LOAD OTHER CONDITIONS VBAT FREQ/ LEVEL MIN TYP MAX UNITS -0.2 0 +0.2 dB 0dBm -0.15 0 +0.15 dB 1020Hz -0.12 - 0 0 +0.12 - dB dB 33 - 38 33 - dB dB 73 78 - dBm0P -0.2 -0.07 +0.2 dB 0dBm -0.2 -0.04 +0.2 dB 1020Hz -0.12 - 0 0.02 +0.12 - dB dB 33 - 38 33 - dB dB 73 78 - dB 1020Hz 0dBm 30 45 - dB 1020Hz 0dBm -0.2 -0.02 +0.2 dB 1020Hz 0dBm 30 38 - dB TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE RECEIVE GAIN (Figure 10) Absolute Receive Gain, ARG normal reverse 600Ω -48V 1020Hz 0dBm TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE FREQUENCY RESPONSE (Figure 10) Receive Frequency Response Relative to ARG normal reverse 600Ω -48V 300 to 3.4kHz TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE GAIN TRACKING (Figure 10) Receive Gain Tracking Relative to ARG normal reverse 600Ω -48V +3 to -40dBm0 -40 to -50dBm0 TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE SIGNAL TO DISTORTION (Figure 10) Receive Signal to Distortion and Noise normal reverse 600Ω -48V +3 to -40dBm0 -40 to -50dBm0 1020Hz TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE IDLE CHANNEL NOISE (Figure 10) Idle Channel Noise normal reverse 600Ω -48V P-Message TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE TRANSMIT GAIN (Figure 11) Absolute Transmit Gain, ATG normal reverse 600Ω -48V 1020Hz 0dBm TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE FREQUENCY RESPONSE (Figure 11) Transmit Frequency Response Relative to ATG normal reverse 600Ω -48V 300 to 3.4kHz TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE GAIN TRACKING (Figure 11) Transmit Gain Tracking Relative to ATG normal reverse 600Ω -48V +3 to -40dBm0 -40 to -50dBm0 TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE SIGNAL TO DISTORTION (Figure 11) Transmit Signal to Distortion and Noise normal reverse 600Ω -48V +3 to -40dBm0 -40 to -50dBm0 1020Hz TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE IDLE CHANNEL NOISE (Figure 11) Idle Channel Noise normal reverse 600Ω -48V P Message TRANSMISSION PARAMETERS - 2-WIRE RETURN LOSS (Figure 12) 2-Wire Return Loss normal reverse 600Ω -48V RN = 6490Ω KZO = 15400Ω TRANSMISSION PARAMETERS - 4-WIRE TO 4-WIRE INSERTION LOSS (Figure 13) 4-Wire to 4-Wire Insertion Loss normal reverse 600Ω -48V TRANSMISSION PARAMETERS - TRANSHYBRID BALANCE (Figure 13) Transhybrid Balance normal reverse 600Ω -48V 4 HC5520 Unless Otherwise Specified: Typical Parameters are at TA = 25oC, VCC = +5V, VEE = -5V, VBAT = -48V, AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600Ω 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued) Electrical Specifications CONDITIONS PARAMETER MODE LOAD OTHER CONDITIONS VBAT FREQ/ LEVEL MIN TYP MAX UNITS TRANSMISSION PARAMETERS - 4-WIRE TO 4-WIRE ABSOLUTE DELAY Absolute Delay normal reverse 600Ω -48V 1020Hz 0dBm µs 1.5 TRANSMISSION PARAMETERS - OVER LOAD LEVEL (Figures 14, 15) Receive Over Load Level at 4W and 2W normal reverse 600Ω -42V 1% THD 1020Hz 2.5 - - VPEAK Transmit Over Load Level at 2W and 4W normal reverse 600Ω -42V 1% THD 1020Hz 2.15 - - VPEAK 40Hz to 100Hz - 50 - Ω 40Hz to 100Hz 15 - - mAPEAK TRANSMISSION PARAMETERS - LONGITUDINAL IMPEDANCE (Figure 16) Longitudinal Impedance per Wire normal reverse - -48V TRANSMISSION PARAMETERS - LONGITUDINAL CURRENT CAPABILITY (Figure 17) Longitudinal Current Limit per Wire normal reverse - -42V Triangle Waveform TRANSMISSION PARAMETERS - LONGITUDINAL BALANCE (Figure 18) 2-Wire Longitudinal Balance normal reverse 368Ω + 368Ω -48V 300Hz 1020Hz 3400Hz 42 48 48 62.2 58.7 69.5 - dB dB dB 4-Wire Longitudinal Balance normal reverse 368Ω + 368Ω -48V 300Hz 1020Hz 3400Hz 42 48 48 66.0 67.2 77.0 - dB dB dB POWER SUPPLY REJECTION RATIO (Figure 19) PSRR VBAT To 4-Wire normal reverse 600Ω -48V VBAT = -48V + 100mVRMS 300Hz 30 42 - dBC PSRR VBAT To 2-Wire normal reverse 600Ω -48V VBAT = -48V + 100mVRMS 300Hz 30 42 - dBC PSRR VCC To 4-Wire normal reverse 600Ω -48V VCC = 4.75V + 100mVRMS 300Hz 20 33 - dBC PSRR VCC To 2-Wire normal reverse 600Ω -48V VCC = 4.75V + 100mVRMS 3420Hz 20 24 - dBC PSRR VEE To 4-Wire normal reverse 600Ω -48V VEE = -4.75V + 100mVRMS 2500Hz 20 30 - dBC PSRR VEE To 2-Wire normal reverse 600Ω -48V VEE = -4.75V + 100mVRMS 2500Hz 20 32 - dBC 5 HC5520 Circuit Operation and Design Information the specifications applicable to this mode of operation are provided in the electrical specifications portion of the HC5520 data sheet. The HC5520 is a current feed voltage sense Subscriber Line Interface Circuit (SLIC). It provides extensive digitally controlled supervisory functions, DC loop feed functions, and user selectable 2 wire impedance matching functions. Battery Feed Modes of Operation The HC5520 is designed to provide a 300Ω resistive feed (150Ω per wire) for long loop applications. It will supply a DC loop feed current of 18mA into an 1800Ω loop at the nominal battery supply of -48V. At shorter loop lengths or higher battery supply voltages, the DC feed is current-limited to nominally 26mA in order to conserve power. For internal chip power management purposes, external power sharing resistors are used to provide some of the DC loop current. This allows a substantial amount of the power to be dissipated off the chip, particularly in short loop applications. A typical loop feeding characteristic for Normal and Reverse Loop Feed Modes of operation is shown in Figure 1. The HC5520 has seven possible modes of operation. These modes of operation are either controlled by the digital control inputs to the SLIC or controlled by the loop status output of the SLIC. The modes of operation and the function of the digital control inputs are given in Table 1. TABLE 1. OPERATION MODE SLIC FUNCTION CONTROL INPUTS Normal Loop Feed Normal Normal PRI = High Reverse Loop Feed Reverse Normal PRI = Low Loop Powerdown P’down Loop power down PDI = Low Ringing Ringing Ring trip detection only RCI = Low Test out Test-out Normal TAI = Low Test in Test-in Normal TBI = Low Thermal Shut Down TSD Loop Powerdown ILOOP mA 30 20 10 RLOOP 600 800 1.0K 1.2K 1.4K 1.6K 1.8K 2.0K 2.2K 2.4K Normal Loop Feed Mode FIGURE 1. BATTERY FEED CHARACTERISTICS When PDI = 1, setting the PRI to a logic “1” places the SLIC in the Normal Loop Feed mode. This is the normal operational mode of the SLIC. With a nominal battery supply of 48V and an on-hook condition, the voltage at the Tip terminal will be approximately 8% of the battery supply voltage. In this case the Tip voltage is about -3.8V. Similarly, the voltage at the Ring terminal will be approximately 92% of the battery supply voltage or about -44.2V. Loop Supervision - Switch Hook Detection The Loop Supervision circuit operates in the Normal and Reverse Loop Feed modes. The DC loop current is monitored and the off-hook condition is indicated when the loop resistance is less than 2.4kΩ. When this occurs, the SHDO output will be set to a logic low in order to signal the system that an off-hook condition exists. If the subscriber is using a rotary dial telephone, the system can monitor the dial pulses through the SHDO output. In the Normal mode the Tip voltage is more positive than the Ring voltage; therefore, in an off-hook condition, the DC loop current flows from Tip to Ring. The loop feeding characteristics will be given in the battery feed section. All of the specifications applicable to this mode of operation are provided in the electrical specifications portion of the HC5520 data sheet. Ringing - Ring Trip Detection Mode The ringing voltage is cadenced to a subscriber loop by applying a logic signal to the Rci input. When a logic “0” is received at the RCI input, the HC5520 will set the RD output to low and thus pull current through the ring relay coil and energize the ring relay. This causes the subscriber’s telephone to begin ringing. At this time the ringing current through the ring ballast resistor is monitored to determine whether an off-hook condition is present. Once the subscriber goes off-hook, the ring trip circuit will turn off the ring relay after the next occurrence of a zero net current flow through the ring ballast resistor. At the same time, the SHDO output will be set to a logic low to indicate the ring trip detec- Reverse Loop Feed Mode When PDI = 1, setting the PRI to a logic “0” places the SLIC in the Reverse Loop Feed mode. In this mode, the Ring terminal voltage is more positive than the Tip terminal voltage. Thus, in an off-hook condition, the DC loop current flows from Ring to Tip. The loop feeding characteristics in the Reverse mode are the same as in the Normal mode. All of 6 HC5520 tion. The ring relay can not be reenergized until the system acknowledges that a ring trip has occurred. Acknowledgment is achieved by setting the RCI to a logic high. R SENSE • Z KZO Z O = ------------------------------------------------400 • R N If the subscriber goes off-hook during the silent portion of the ringing cadence, the off-hook condition is detected in the same manner as a switch hook detection. The SHDO output will be set to a logic low in order to indicate that the subscriber has answered the call and that ringing of the line should cease. where RSENSE is constrained to be 100kΩ. 4W to 2W Gain The signal level voltage gain from the 4-wire analog input (RX) to the 2-wire ∆VTR voltage is user programmable using the following equation: Loop Power Down Mode –R SENSE A 4 – 2 = ----------------------------RX Under any condition when PDI is set to a logic “0”, the SLIC will power down the two wire loop. During loop power down, the voltages at Tip and Ring are both collapsed to one-half of the battery voltage and the outputs of the Tip and Ring feed amplifiers are in a high impedance state. Therefore all of the supervisory functions and transmission functions are disabled. The HC5520 will resume normal operation once the loop power down command is removed. where RSENSE is constrained to be 100kΩ. The SLIC has a built-in +6.02dB gain to compensate for the divider effect of matching the load impedance, making it transparent to the user. 2W to 4W Gain Thermal Shutdown Mode The signal level voltage gain from the Tip and Ring terminals (∆VTR) to the output of the 4-wire signal amplifier (R4W) is user programmable using the following equation: The SLIC will power down the loop by itself once the temperature of the SLIC die reaches 150oC. During this thermal shutdown condition, both TSDO and SHDO outputs will be set to a default logic low to indicate the condition. The supervisory functions and transmission functions are disabled. Once the SLIC die temperature drops 10oC lower than the thermal shutdown temperature, the SLIC will resume operation. R 4W A 2 – 4 = -------------------------R SENSE Transhybrid Balance Test-Out and Test-In Modes Functionally, when a voice signal is received at VRX a current which is proportional to the voice signal will pass through the SLIC 4 wire input RX pin. This voice input current will be amplified and inverted to drive the load across the Tip and Ring. The AC voltages at Tip and Ring are fed back to the SLIC and reproduced as the transmit signal at the TX pin. This received voice signal returned from 2 wire side of the SLIC will have the same amplitude as the received AC signal but will be 180 degrees out of phase. This signal needs to be eliminated from transmission to prevent far end echo. Two additional relay drivers are provided for test-out and test-in functions. Unlike the ring relay driver circuit, these relay drivers are operated independently of the rest of the HC5520 circuitry. The designation of test-out and test-in is purely arbitrary. When desired, the subscriber’s loop condition can be interrogated through the test-out relay. Likewise, through the test-in relay, the various SLIC functions and signal integrity can be examined. Hybrid Transmission Model The most common way of implementing the transhybrid balance function is to use the analog voice input amplifier in the Combo as a summing amplifier. The circuit connections are as shown in Figure 3. Notice that the input impedance networks for both received signal and returned signal are bascally the same, if the 62pF capacitor were not added. The addition of the 62pF capacitor to ground is to compensate for the phase shift of the returned signal to achieve 15dB or more improvement in the 2k to 4kHz frequency band as compared to the data collected from the test circuit. Figure 2 shows a simplified model for bidirectional signal transmission and 2-wire impedance synthesis. The term RSENSE used in the equations below refers to the pair of external 100kΩ sense resistors RTPS and RRGS. The HC5520 architecture gives the user the flexibility to set the gains and 2-wire impedance with external resistors and resistor ratios. However, to prevent adversely affecting other SLIC control functions, the value of RSENSE should always be selected to be 100kΩ. 2W Impedance Sensitive Pins The 2W impedance is the AC input impedance synthesized by the SLIC between the Tip and Ring terminals and will be referred to as ZO. The value of ZO is user programmable by varying the value RN and ZKZO. RN is recommended to be less than 7kΩ. ZKZO can be either a real resistance or a complex impedance network. ZO is determined by the following equation: 7 Tipsen, Ringsen Pins - These pins are very low impedance virtual grounds used for providing feedback current to the HC5520 DC, AC, and Longitudinal control loops. Parasitic capacitance on these pins from the PC board layout and external components should be minimized to prevent oscillation. HC5520 HC5520 A = 400 R4W TIP ∆IKZO ∆ITS - ∆VTR A2 - + RTPS ZL + VTX ∆IL ∆IRS ∆ITS ∆IRX RX ∆IRS + + VRX RRGS EG RN A = 400 2x∆IRX RING ∆IRS A1 ∆ITS ∆IKZO + ZKZO - ∆IKZO - FIGURE 2. SIMPLIFIED AC TRANSMISSION CIRCUIT RTPS 100kΩ CVRX 0.47µF TIPSEN RX TIP VRX RX 100kΩ TIP RPT 50Ω 50kΩ 0.47µF 50kΩ 62pF + HC5520 600Ω RPR 50Ω R4W 100kΩ RING RING RINGSEN RRGS 100kΩ 100kΩ 100kΩ TX4W TX CVTX 0.47µF VOICE INPUT AMPLIFIER VTX FIGURE 3. TRANSHYBRID BALANCE CIRCUIT WITH HIGH AND LOW FREQUENCY COMPENSATION CDC Pin - This pin provides a connection to the DC reference nodes that control the DC loop feed current. These internal blocks are referenced to VEE and it is important that the capacitor be referenced to VEE or else the PSRR performance will be degraded. KZO Pin - The 2-wire impedance that is synthesized by the HC5520 is a direct function of the network connected to this pin (see equations). Parasitic capacitance and inductance from the PC board layout and the external components is magnified by the same K factor that is utilized to synthesize the 2-wire impedance. Excessive parasitics can cause insertion loss and return loss degradation, especially at higher voice band frequencies. Good PC board layout techniques and proper component selection can minimize these effects to a negligible level. CP Pin - Capacitor CP connects to this pin to create a lowpass filter for the half-battery internal reference point. It is important that this capacitor be referenced to BGND/AGND to minimize the effect of noise injected into the subscriber loop from the battery supply. RN Pin - This pin connects an external resistor to the input of an internal buffer. The value of this resistor is user specified based upon the impedance desired at the 2-wire interface (see equations). The value chosen must not have a value greater than 7kΩ or the input voltage range of the buffer may be exceeded during transients. RPSG, RPST, RPSR, RPSB Pins - These pins are connected to critical nodes inside the HC5519R3931 feedback control loops. Parasitic capacitance should be minimized in order to prevent oscillations. RD, TB, TA Pins - The pins connect to the driver coils of the Ring and Test relays and activate the relays by pulling down the coil voltage to ground. The driver outputs are internally clamped to VCC by diodes to prevent the inductive voltage transient during relay turn-off from damaging the driver. Relays attached to any voltage other than VCC will not function properly. RDC Pin - An external resistor connected to VCC is required at this pin to provide an accurate reference for the DC currents which feed the subscriber loop. PC board traces should be made to have low resistance and should connect directly to VCC. 8 HC5520 Test Information RTPS 100kΩ RX TIP VTIP 100kΩ TIP 50Ω VRX ICC RPT VCC IEE HC5520 VEE IBB RPR VRING CVRX 0.47µF RX TIPSEN CVTX 0.47µF RING 50Ω RING RINGSEN 100kΩ TX TX4W RRGS VBAT VTX 100kΩ R4W FIGURE 4. POWER SUPPLY CURRENT AND TIP AND RING VOLTAGE TEST CIRCUIT PARAMETER INPUT MEASUREMENT SPECIFICATIONS Power Supply Current, ICC VCC = +4.75 ~ +5.25V ICC Direct Measurement ICC Power Supply Current, IEE VEE = -4.75 ~ -5.25V IEE Direct Measurement IEE Power Supply Current, IBB VBAT = -42 ~ -58V IBB Direct Measurement IBB VTIP VBAT VTIP Direct Measurement VTIP VRING VBAT VRING Direct Measurement VRING RTPS IL 100kΩ TIP 50Ω RX TIPSEN RX TIP CVRX 0.47µF 100kΩ VRX RPT RL VTR HC5520 RPR 50Ω 100kΩ CVTX 0.47µF RING RING RINGSEN TX TX4W RRGS VTX 100kΩ R4W FIGURE 5. LOOP CURRENT TEST CIRCUIT PARAMETER INPUT MEASUREMENT SPECIFICATIONS Loop Current, IL VBAT and RL VTR IL = VTR /RL Short Circuit Loop Current VBAT = -48V and RL = 100Ω VTR IL = VTR /RL 9 HC5520 RTPS TIP RPT 2.4kΩ >9kΩ 100kΩ RX TIP 50Ω CVRX 0.472µF RX TIPSEN 100kΩ VRX SHDO HC5520 RPR SW 50Ω CVTX 0.47µF RING RING VTX TX RINGSEN 100kΩ 100kΩ TX4W RRGS R4W FIGURE 6. SWITCH HOOK DETECTION TEST CIRCUIT PARAMETER INPUT MEASUREMENT SPECIFICATIONS On Hook Condition SW = Left SHDO SHDO = Hi Off Hook Detection SW = Right SHDO SHDO = Lo RTPS 100kΩ TIP RX TIPSEN RX TIP 50Ω RPT RL CVRX 0.47µF 100kΩ VRX SHDO HC5520 RPR SW 50Ω CVTX 0.47µF RING RING 100kΩ RINGSEN RRGS TX TX4W VTX 100kΩ R4W tPERIOD tBREAK ON SW OFF-HOOK ON-HOOK tMAKE OFF-HOOK OFF tMEAS SHDO OFF-HOOK ON-HOOK OFF-HOOK FIGURE 7. DIAL PULSE DISTORTION TEST CIRCUIT AND WAVEFORMS PARAMETER INPUT MEASUREMENT SPECIFICATIONS Percent Break SW = On, Off, . . . tBREAK and tPERIOD (tBREAK /tPERIOD) x 100% Dial Pulse Distortion SW = On, Off, . . . tBREAK and tPERIOD and tMEAS Abs[(tBREAK - tMEAS)/tPERIOD] x 100% 10 HC5520 1kΩ RTPS RBL 100kΩ TIPSEN TIP 50Ω RX VRX SHDO CRTD 1µF HC5520 -5V CVTX 0.47µF CRTD RPR 50Ω CVRX 0.47µF 100kΩ RX TIP 20kΩ RING RING SW RBH RBH RPT 3 REN 1 REN 200Ω 237kΩ 237kΩ RBL 1600Ω RBAL 100kΩ RINGSEN RRGS RD TX VTX TX4W 100kΩ R4W VBAT VRINGING FIGURE 8. RING TRIP DETECTION TEST CIRCUIT PARAMETER INPUT MEASUREMENT SPECIFICATIONS No Ring Trip Detection SW = Up SHDO SHDO = Hi Ring Trip Detection SW = Down SHDO SHDO = Lo RTPS 100kΩ TIP 50Ω VT RX TIPSEN RX TIP RPT CVRX 0.47µF 100kΩ VRX PRI 1800Ω HC5520 VR RPR 50Ω RING 100kΩ CVTX 0.47µF RING RINGSEN RRGS TX TX4W VTX 100kΩ R4W POLARITY REVERSAL COMMAND tREV VT 90% 90% VR FIGURE 9. POLARITY REVERSAL TIME TEST CIRCUIT AND WAVEFORMS PARAMETER INPUT MEASUREMENT SPECIFICATIONS Polarity Reversal Time Reversal Command tREV tREV 11 HC5520 RTPS 100kΩ TIP 50Ω RX TIPSEN RX TIP CVRX 0.47µF 100kΩ VRX RPT 600Ω VTR HC5520 RPR 50Ω CVTX 0.47µF RING RING 100kΩ RINGSEN RRGS TX TX4W VTX 100kΩ R4W FIGURE 10. 4W TO 2W TRANSMISSION TEST CIRCUIT - NORMAL AND REVERSE MODES PARAMETER INPUT AT VRX MEASUREMENT SPECIFICATIONS AT 600Ω Absolute Receive Gain, AGR 0dBm0 at 1020Hz VTR at 1020Hz AGR = 20log(VTR /VRX) Receive Frequency Response 0dBm0 at Freq VTR at Freq 20log(VTR /VRX) - AGR Receive Gain Tracking Level at 1020Hz VTR at 1020Hz 20log(VTR /Level) - AGR Receive Signal to Distortion Level at 1020Hz VTR at 2nd to 5th Harmonics 20log(Level/VTR) Receive Idle Channel Noise 0VRMS VTR 20log(VTR /0.7746VRMS) RTPS 100kΩ TIP 50Ω 600Ω RPT VAC RPR RX TIPSEN RX TIP CVRX 0.47µF 100kΩ VRX HC5520 50Ω CVTX 0.47µF RING RING 100kΩ RINGSEN RRGS TX TX4W VTX 100kΩ R4W FIGURE 11. 2W TO 4W TRANSMISSION TEST CIRCUIT - NORMAL AND REVERSE MODES PARAMETER INPUT AT VAC MEASUREMENT SPECIFICATIONS AT 600Ω Absolute Transmit Gain, AGT 2x(0dBm0) at 1020Hz VTX at 1020Hz AGT = 20log(VTX /0.7746VRMS) Transmit Frequency Response 2x(0dBm0) at Freq VTX at Freq 20log(VTX /0.7746VRMS) - AGT Transmit Gain Tracking 2x(Level) at 1020Hz VTX at 1020Hz 20log(VTX /Level) - AGT Transmit Signal to Distortion 2x(Level) at 1020Hz VTX at 2nd to 5th Harmonics 20log(Level/VTX) Transmit Idle Channel Noise 0VRMS VTX 20log(VTX /0.7746VRMS) 12 HC5520 RTPS TIP ZL 600Ω RX TIP 50Ω CVRX 0.47µF RX TIPSEN 100kΩ 100kΩ VRX RPT ZS VTR VAC HC5520 RPR 50Ω CVTX 0.47µF RING RING RINGSEN 100kΩ RRGS TX TX4W VTX 100kΩ R4W FIGURE 12. 2W RETURN LOSS TEST CIRCUIT - NORMAL AND REVERSE MODES DEFINITION : 2W Return Loss = 20 log[(ZS + ZL) / Abs(ZS - ZL)]. Where ZS is the source impedance and ZL is the load impedance. PARAMETER INPUT AT VAC MEASUREMENT SPECIFICATIONS FOR 600Ω 2W Return Loss 0dBm0 at Freq VTR at Freq 20log[VAC /Abs(2xVTR - VAC)] RTPS 100kΩ TIP 100kΩ RX TIP 50Ω CVRX 0.47µF RX TIPSEN VRX 100kΩ RPT 100kΩ HC5520 50Ω CVTX 0.47µF RING RING 100kΩ RINGSEN RRGS - VTHB + RPR TX VTX TX4W 50kΩ 600Ω 1MΩ 100kΩ R4W FIGURE 13. 4W TO 4W INSERTION LOSS AND TRANSHYBRID BALANCE - NORMAL AND REVERSE MODES PARAMETER INPUT AT VRX MEASUREMENT SPECIFICATIONS FOR 600Ω 4W to 4W Insertion Loss 0dBm0 at Freq VTX at Freq 20log[VRX /VTX] Transhybrid Balance 0dBm0 at Freq VTHB at Freq 20log[VRX /VTHB] + 20dB RTPS 100kΩ TIP 50Ω RX TIPSEN RX TIP CVRX 0.47µF 100kΩ VRX RPT 600Ω VTR HC5520 RPR 50Ω 100kΩ CVTX 0.47µF RING RING RINGSEN RRGS TX TX4W VTX 100kΩ R4W FIGURE 14. RECEIVE OVER LOAD LEVEL AT 4W AND 2W TEST CIRCUIT - NORMAL AND REVERSE MODES INPUT AT VRX AT 1kHz SLIC OUTPUT IMPEDANCE SLIC VOLTAGE GAIN MEASUREMENT SPECIFICATION AT 600Ω VRX = 2.50VPEAK 600Ω 0dB VTR at 2nd to 5th Harmonics 20log(VTR /VRX) 13 HC5520 RTPS IL TIP 100kΩ RX TIP 50Ω CVRX 0.47µF RX TIPSEN 100kΩ VRX RPT 600Ω VTR HC5520 VAC RPR 50Ω CVTX 0.47µF RING RING RINGSEN 100kΩ RRGS TX VTX TX4W 100kΩ R4W FIGURE 15. TRANSMIT OVER LOAD LEVEL AT 2W AND 4W TEST CIRCUIT - NORMAL AND REVERSE MODES INPUT AT VAC AT 1kHz SLIC OUTPUT IMPEDANCE SLIC TRANSMIT GAIN VAC = 2x(2.15VPEAK) 600Ω 0dB MEASUREMENT SPECIFICATION AT 600Ω VTR and VTX at 2nd to 5th Harmonics 20log[VTR /(VAC/2)] and 20log[VTX/(VAC/2)] RTPS 100kΩ ILONG TIP 368Ω 2.16µF VT RPT VR RPR VAC 100kΩ RX TIP 50Ω CVRX 0.47µF RX TIPSEN VRX HC5520 368Ω 50Ω CVTX 0.47µF RING RING ILONG 100kΩ RINGSEN RRGS TX VTX TX4W 100kΩ R4W FIGURE 16. LONGITUDINAL IMPEDANCE TEST CIRCUIT - NORMAL AND REVERSE MODES PARAMETER INPUT MEASUREMENT SPECIFICATIONS Longitudinal Impedance, Tip Side VAC = 0dBm0 at Freq ILONG (rms) and VT (rms) ZLONG = VT /ILONG Longitudinal Impedance, Ring Side VAC = 0dBm0 at Freq ILONG (rms) and VR (rms) ZLONG = VR /ILONG RTPS 100kΩ ILONG TIP 50Ω TRIANGULAR WAVEFORM VAC 2.16µF 20µF RPT 20µF RPR RX TIPSEN RX TIP CVRX 0.47µF 100kΩ VRX SHDO HC5520 50Ω ILONG CVTX 0.47µF RING RING 100kΩ RRGS RINGSEN TX TX4W VTX 100kΩ R4W FIGURE 17. ON-HOOK LONGITUDINAL CURRENT LIMIT TEST CIRCUIT - NORMAL AND REVERSE MODES PARAMETER INPUT MEASUREMENT SPECIFICATIONS Longitudinal Current Limit VAC at Freq, ILONG = 15mAPEAK SHDO SHDO = Hi 14 HC5520 RTPS TIP RX TIP 50Ω 368Ω RX TIPSEN 100kΩ ILONG 100kΩ VRX RPT 2.16µF VAC VR HC5520 RPR 368Ω 50Ω CVTX 0.47µF RING RING ILONG CVRX 0.47µF RINGSEN 100kΩ RRGS TX TX4W VTX 100kΩ R4W FIGURE 18. 2W AND 4W LONGITUDINAL BALANCE TEST CIRCUIT - NORMAL AND REVERSE MODES PARAMETER INPUT MEASUREMENT SPECIFICATIONS 2W Longitudinal Balance VAC = 0dBm0 at Freq VTR at Freq 20log(VAC /VTR) 4W Longitudinal Balance VAC = 0dBm0 at Freq VTX at Freq 20log(VAC /VTX) RTPS 100kΩ TIP 50Ω RX TIPSEN RX TIP 100kΩ RPT 600Ω VTR CVRX 0.47µF VRX VAC VEE HC5520 VBB RPR 50Ω CVTX 0.47µF RING RING 100kΩ VCC RINGSEN RRGS TX TX4W VTX 100kΩ R4W FIGURE 19. OFF HOOK PSRR 4W AND 2W TEST CIRCUIT - NORMAL AND REVERSE MODES PARAMETER INPUT MEASUREMENT SPECIFICATIONS PSRR VBAT to 4W VBAT = -48V + VAC VTX at Freq 20log(VAC /VTX) at Freq PSRR VBAT to 2W VBAT = -48V + VAC VTR at Freq 20log(VAC /VTR) at Freq PSRR VCC to 4W VCC = +5V + VAC VTX at Freq 20log(VAC /VTX) at Freq PSRR VCC to 2W VCC = +5V + VAC VTR at Freq 20log(VAC /VTR) at Freq PSRR VEE to 4W VEE = -5V + VAC VTX at Freq 20log(VAC /VTX) at Freq PSRR VEE to 2W VEE = -5V + VAC VTR at Freq 20log(VAC /VTR) at Freq 15 HC5520 Pin Descriptions MQFP PLCC SYMBOL 1 7 RX 2 8 AGND DESCRIPTION 4W receive input pin, a ground referenced current sense input. Analog ground pin. This pin must be tied to the BGND and RGND pins. 3 9 TX 4 10 TX4W 4W transmit output pin, a ground referenced voltage source. 5 11 KZO 2W impedance setting pin, connecting a network K(ZL) between KZO pin and AGND will program the 2W impedance to be ZL. Resistor divider pin for ZO, in conjunction with KZO it defines the 2W impedance. Transmit gain setting pin - connecting a resistor between TX4W and TX establishes the 2W to 4W gain. 6 12 RN 7 13 RDC DC feed reference pin. 8 14 CDC DC feeding circuit low pass filter capacitor pin. 9 15 CP Half battery voltage reference pin. Negative power supply pin, VEE = -5V at 5%. 10 16 VEE 11 17 TIPSEN 12 18 BGND Battery ground pin. This pin must be tied to the AGND and RGND pins. 13 19 RPSG Power sharing resistor ground side connection pin. 15 20 RPST 16 21 TIP Tip feed pin. 17 22 NC No connect. 18 23 RING Ring feed pin. 19 24 RPSR Power sharing resistor Ring side connection pin. 20 25 NC 21 26 RPSB Power sharing resistor battery side connection pin. Battery power supply pin, VBAT = -42V to -58V. 14 NC Tip sense input pin. No connect. Power sharing resistor Tip side connection pin. No connect. 22 27 VBAT 23 28 RINGSEN 24 29 RBH Ring trip amplifier ground side sense input pin. 25 30 RBL Ring trip amplifier line side sense input pin. 26 31 CRTD 27 32 RD Ring relay driver pin, open collector output. Diode protected internally. 28 33 TB Test access relay driver pin, open collector output. Diode protected internally. 29 34 TA Test access relay driver pin, open collector output. Diode protected internally. 30 35 RGND 31 36 VCC Positive power supply pin, VCC = +5V at 5%. 32 37 NC No connect. 33 38 NC No connect. 34 Ring sense input pin. Ring trip capacitor pin. Relay driver ground current return pin. This pin must be tied to the AGND and BGND pins. 39 NC No connect. 40 NC No connect. 35 41 TAI TA Relay Driver Control Input. 36 42 TBI TB Relay Driver Control Input. 37 43 RCI RD Relay Driver Control Input. 38 44 PRI Loop Feed Polarity Control Input. 39 1 PDI Loop Feed Control Input. 40 2 NC No connect. 41 3 NC 42 4 TSDO Thermal Shutdown Indicator Output. 43 5 SHDO Off Hook Detect Indicator Output. 44 6 NC No connect. No connect. 16 HC5520 Typical Application Circuit Diagram RX RBH RBH 237KΩ RX 0.47µF 100KΩ VRX 1KΩ CVRX RBAL RBL RBL 237KΩ TX4W RTPS 100KΩ R4W TX 100KΩ CVTX VTX 0.47µF TIPSEN TIP TEST ACCESS RELAY RN TIP 50Ω RPT RING RELAY 6.49KΩ KZO 15.4KΩ SURGECTOR RKZO RPR 50Ω RING RCP RING 100KΩ RINGSEN CP 200Ω CP 1µF RRGS RPST CDC -5V CDC 910Ω 910 TO RING GENERATOR RN RPSG RPST RPSR 910Ω 4.7µF HC5520 CRTD CRTD 1µF RPSB RPSR RDC RELAY TA RELAY TB RELAY RD +5V 2.15KΩ +5V RDC SHDO TSDO RGND 0.1µF +5V VCC TAI AGND TBI VEE RCI BGND PDI 0.1µF ±5V GND 0.1µF -5V BATTERY GND 0.1µF -48V VBAT GROUND PLANE PRI EARTH GROUND NOTE: The HC5520 application circuit is configured to provide a receive gain of 0dB, a transmit gain of 0dB, and a synthesized 2W impedance of 593Ω. Note, the value of RTPS, RRGS should always be selected to be 100kΩ. 17 HC5520 External Component List for Application Circuit NAME VALUE TOLERANCE RATING RX, R4W, RTPS, RRGS 100kΩ 1% 1/10W RN 6.49kΩ 1% 1/10W RDC 2.15kΩ 1% 1/10W RBH, RBL 237kΩ 1% 1/10W RPT, RPR 50Ω 5% 2.5W or PTC RBAL 1000Ω 5% 1W RKZ0 15.4kΩ 1% 1/10W RCP 200Ω 5% 1/10W RPST, RPSR 910Ω 5% 2W CVRX, CVTX 0.47µF 20% 10V CDC 4.7µF 10% 10V Tantalum CP 1µF 10% 35V Tantalum CRTD 1µF 10% 10V Tantalum C DECOUPLING 0.1µF 20% 10V except on Vb SURGECTOR TISP1072F3SL Texas Instruments PTC TR250-120u Raychem 18 HC5520 Metric Plastic Quad Flatpack Packages (MQFP/PQFP) Q44.10x10 (JEDEC MO-108AA-2 ISSUE A) D 44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE D1 -D- INCHES SYMBOL -B- -AE E1 e PIN 1 MIN MAX MILLIMETERS MIN MAX A - 0.093 - 2.35 - A1 0.004 0.010 0.10 0.25 - A2 0.077 0.083 1.95 2.10 - B 0.012 0.018 0.30 0.45 6 B1 0.012 0.016 0.30 0.40 - D 0.510 0.530 12.95 13.45 3 D1 0.390 0.398 9.90 10.10 4, 5 E 0.510 0.530 12.95 13.45 3 E1 0.390 0.398 9.90 10.10 4, 5 L 0.026 0.037 0.65 0.95 - N 44 44 7 e 0.032 BSC 0.80 BSC - SEATING A PLANE -H- NOTES Rev. 1 1/94 NOTES: 0.10 0.004 0.40 0.016 MIN -C- 5o-16o 0.20 A-B S 0.008 M C 0o MIN A2 A1 0o-7o L 5o-16o 1. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 2. All dimensions and tolerances per ANSI Y14.5M-1982. D S 3. Dimensions D and E to be determined at seating plane -C- . B 4. Dimensions D1 and E1 to be determined at datum plane -H- . B1 5. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm (0.010 inch) per side. 6. Dimension B does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total. 0.13/0.17 0.005/0.007 7. “N” is the number of terminal positions. BASE METAL WITH PLATING 0.13/0.23 0.005/0.009 19 HC5520 Plastic Leaded Chip Carrier Packages (PLCC) 0.042 (1.07) 0.048 (1.22) 0.042 (1.07) 0.056 (1.42) PIN (1) IDENTIFIER 0.004 (0.10) C N44.65 (JEDEC MS-018AC ISSUE A) 44 LEAD PLASTIC LEADED CHIP CARRIER PACKAGE 0.025 (0.64) R 0.045 (1.14) 0.050 (1.27) TP C L INCHES SYMBOL D2/E2 E1 E C L D2/E2 VIEW “A” D1 D 0.020 (0.51) MAX 3 PLCS 0.020 (0.51) MIN A1 A MIN MILLIMETERS MAX MIN MAX NOTES A 0.165 0.180 4.20 4.57 - A1 0.090 0.120 2.29 3.04 - D 0.685 0.695 17.40 17.65 - D1 0.650 0.656 16.51 16.66 3 D2 0.291 0.319 7.40 8.10 4, 5 E 0.685 0.695 17.40 17.65 - E1 0.650 0.656 16.51 16.66 3 E2 0.291 0.319 7.40 8.10 4, 5 N 44 44 6 Rev. 1 3/95 -C- SEATING PLANE 0.026 (0.66) 0.032 (0.81) 0.045 (1.14) MIN 0.013 (0.33) 0.021 (0.53) 0.025 (0.64) MIN VIEW “A” TYP. NOTES: 1. Controlling dimension: INCH. Converted millimeter dimensions are not necessarily exact. 2. Dimensions and tolerancing per ANSI Y14.5M-1982. 3. Dimensions D1 and E1 do not include mold protrusions. Allowable mold protrusion is 0.010 inch (0.25mm) per side. 4. To be measured at seating plane -C- contact point. 5. Centerline to be determined where center leads exit plastic body. 6. “N” is the number of terminal positions. All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries. Sales Office Headquarters For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS NORTH AMERICA Harris Semiconductor P. O. Box 883, Mail Stop 53-210 Melbourne, FL 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 S E M I C O N D U C TO R 20 ASIA Harris Semiconductor PTE Ltd. No. 1 Tannery Road Cencon 1, #09-01 Singapore 1334 TEL: (65) 748-4200 FAX: (65) 748-0400