HITACHI 2SK1625

2SK1625(L), 2SK1625(S)
Silicon N-Channel MOS FET
Application
High speed power switching
Features
•
•
•
•
•
Low on-resistance
High speed switching
Low drive current
No secondary breakdown
Suitable for switching regulator and DC-DC converter
Outline
LDPAK
4
4
1 2
1
2
3
3
D
G
S
1. Gate
2. Drain
3. Source
4. Drain
2SK1625(L), 2SK1625(S)
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
VDSS
600
V
Gate to source voltage
VGSS
±30
V
Drain current
ID
7
A
28
A
7
A
Drain peak current
I D(pulse)*
Body to drain diode reverse drain current
I DR
2
1
Channel dissipation
Pch*
75
W
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Notes 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at TC = 25°C
2
2SK1625(L), 2SK1625(S)
Electrical Characteristics (Ta = 25°C)
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Drain to source breakdown
voltage
V(BR)DSS
600
—
—
V
I D = 10 mA, VGS = 0
Gate to source breakdown
voltage
V(BR)GSS
±30
—
—
V
I G = ±100 µA, VDS = 0
Gate to source leak current
I GSS
—
—
±10
µA
VGS = ±25 V, VDS = 0
Zero gate voltage drain current I DSS
—
—
250
µA
VDS = 500 V, VGS = 0
Gate to source cutoff voltage
VGS(off)
2.0
—
3.0
V
I D = 1 mA, VDS = 10 V
Static Drain to source on state
resistance
RDS(on)
—
0.9
1.3
Ω
I D = 4 A, VGS = 10 V *1
Forward transfer admittance
|yfs|
4.0
6.5
—
S
I D = 4 A, VDS = 10 V *1
Input capacitance
Ciss
—
1180
—
pF
VDS = 10 V, VGS = 0,
Output capacitance
Coss
—
265
—
pF
f = 1 MHz
Reverse transfer capacitance
Crss
—
50
—
pF
Turn-on delay time
t d(on)
—
15
—
ns
I D = 4 A, VGS = 10 V,
Rise time
tr
—
50
—
ns
RL = 7.5 Ω
Turn-off delay time
t d(off)
—
105
—
ns
Fall time
tf
—
45
—
ns
Body to drain diode forward
voltage
VDF
—
0.9
—
V
I F = 7 A, VGS = 0
Body to drain diode reverse
recovery time
t rr
—
370
—
ns
I F = 7 A, VGS = 0,
diF/dt = 100 A/µs
Note
1. Pulse test
See characteristic curves of 2SK1403.
3
2SK1625(L), 2SK1625(S)
Maximum Safe Operation Area
Power vs. Temperature Derating
40
3
(o
n)
D
S
O
i s pe
lim ra
ite tion
d in
by t
R hi s
80
10
ar
ea
50
30
Drain Current ID (A)
Channel Dissipation Pch (W)
120
D
1
0.3
C
10
10
0
PW
µs
µs
1
=
pe 10 ms
ra m
tio s
n (1
(T Sh
C =
ot
25 )
°C
)
O
Ta = 25°C
0.1
0.05
Normalized Transient Thermal Impedance γS (t)
0
4
50
100
Case Temperature TC (°C)
150
1
3
30
10
100 300 1,000
Drain to Source Voltage VDS (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
1.0
TC = 25°C
D=1
0.5
0.3
0.2
0.1
0.1
0.05
θch–c (t) = γS (t) · θch–c
θch–c = 1.67°C/W, TC = 25°C
PDM
0.02
0.03
se
l
1
0.0 ot Pu
h
1S
0.01
10 µ
T
100 µ
1m
10 m
Pulse Width PW (s)
100 m
PW
1
D = PW
T
10
Unit: mm
2.54 ± 0.5
(1.4)
2.54 ± 0.5
11.3 ± 0.5
10.0
1.27 ± 0.2
0.2
0.86 +– 0.1
0.76 ± 0.1
11.0 ± 0.5
1.2 ± 0.2
1.3 ± 0.2
+ 0.3
– 0.5
8.6 ± 0.3
10.2 ± 0.3
4.44 ± 0.2
2.59 ± 0.2
0.4 ± 0.1
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
LDPAK (L)
—
—
1.4 g
Cautions
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contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
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