TI TS5V330DRG4

TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D – MAY 2004 – REVISED JUNE 2009
QUAD SPDT WIDE-BANDWIDTH VIDEO SWITCH WITH LOW ON-STATE RESISTANCE
FEATURES
1
•
•
•
•
•
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
EN
S1D
S2D
DD
S1C
S2C
DC
RGY PACKAGE
(TOP VIEW)
S1A
S2A
DA
S1B
S2B
DB
VCC
•
•
•
IN
S1A
S2A
DA
S1B
S2B
DB
GND
1
16
15 EN
14 S1D
13 S2D
2
3
4
12 DD
11 S1C
5
6
10 S2C
7
8
9
DC
•
D, DBQ, OR PW PACKAGE
(TOP VIEW)
IN
•
•
•
Low Differential Gain and Phase
(DG = 0.64%, DP = 0.1 Degrees Typ)
Wide Bandwidth (BW = 300 MHz Min)
Low Crosstalk (XTALK = –63 dB Typ)
Low Power Consumption
(ICC = 3 µA Max)
Bidirectional Data Flow With Near-Zero
Propagation Delay
Low ON-State Resistance (ron = 3 Ω Typ)
VCC Operating Range From 4.5 V to 5.5 V
Ioff Supports Partial-Power-Down Mode
Operation
Data and Control Inputs Provide Undershoot
Clamp Diode
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 1000-V Charged-Device Model (C101)
Suitable for Both RGB and Composite-Video
Switching
GND
•
DESCRIPTION/ORDERING INFORMATION
The TS5V330 video switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (EN) input.
When EN is low, the switch is enabled and the D port is connected to the S port. When EN is high, the switch is
disabled and the high-impedance state exists between the D and S ports. The select (IN) input controls the data
path of the multiplexer/demultiplexer.
Low differential gain and phase make this switch ideal for composite and RGB video applications. This device
has wide bandwidth and low crosstalk, making it suitable for high-frequency applications as well.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging
current will not backflow through the device when it is powered down. This switch maintains isolation during
power off.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2009, Texas Instruments Incorporated
TS5V330
SCDS164D – MAY 2004 – REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
ORDERING INFORMATION
PACKAGE (1)
TA
QFN – RGY
SOIC – D
–40°C to 85°C
SSOP (QSOP) – DBQ
TSSOP – PW
(1)
ORDERABLE PART NUMBER
Tape and reel
TS5V330RGYR
Tube
TS5V330D
Tape and reel
TS5V330DR
Tape and reel
TS5V330DBQR
Tube
TS5V330PW
Tape and reel
TS5V330PWR
TOP-SIDE MARKING
TE330
TS5V330
TE330
TE330
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To ensure the high-impedance state during power up or power down, EN should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
INPUTS
EN
IN
INPUT/OUTPUT
D
FUNCTION
L
L
S1
D port = S1 port
L
H
S2
D port = S2 port
H
X
Z
Disconnect
xxxx
PIN DESCRIPTION
PIN
2
DESCRIPTION
S1, S2
Analog video I/Os
D
Analog video I/Os
IN
Select input
EN
Switch-enable input
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D – MAY 2004 – REVISED JUNE 2009
PARAMETER DEFINITIONS
PARAMETER
DESCRIPTION
ron
Resistance between the D and S ports, with the switch in the ON state
IOZ
Output leakage current measured at the D and S ports, with the switch in the OFF state
IOS
Short-circuit current measured at the I/O pins
VIN
Voltage at IN
VEN
Voltage at EN
CIN
Capacitance at the control (EN, IN) inputs
COFF
Capacitance at the analog I/O port when the switch is OFF
CON
Capacitance at the analog I/O port when the switch is ON
VIH
Minimum input voltage for logic high for the control (EN, IN) inputs
VIL
Minimum input voltage for logic low for the control (EN, IN) inputs
Vhys
Hysteresis voltage at the control (EN, IN) inputs
VIK
I/O and control (EN, IN) inputs diode clamp voltage
VI
Voltage applied to the D or S pins when D or S is the switch input
VO
Voltage applied to the D or S pins when D or S is the switch output
IIH
Input high leakage current of the control (EN, IN) inputs
IIL
Input low leakage current of the control (EN, IN) inputs
II
Current into the D or S pins when D or S is the switch input
IO
Current into the D or S pins when D or S is the switch output
Ioff
Output leakage current measured at the D or S ports, with VCC = 0
tON
Propagation delay measured between 50% of the digital input to 90% of the analog output when switch is turned ON
tOFF
Propagation delay measured between 50% of the digital input to 90% of the analog output when switch is turned OFF
BW
Frequency response of the switch in the ON state measured at –3 dB
XTALK
Unwanted signal coupled from channel to channel. Measured in –dB. XTALK = 20 log VO/VI. This is a nonadjacent
crosstalk.
OIRR
Off isolation is the resistance (measured in –dB) between the input and output with the switch OFF.
DG
Magnitude variation between analog input and output pins when the switch is ON and the dc offset of composite-video
signal varies at the analog input pin. In the NTSC standard, the frequency of the video signal is 3.58 MHz, and dc offset
is from 0 to 0.714 V.
DP
Phase variation between analog input and output pins when the switch is ON and the dc offset of composite-video signal
varies at the analog input pin. In the NTSC standard, the frequency of the video signal is 3.58 MHz, and dc offset is from
0 to 0.714 V.
ICC
Static power-supply current
ICCD
Variation of ICC for a change in frequency in the control (EN, IN) inputs
ΔICC
This is the increase in supply current for each control input that is at the specified voltage level, rather than VCC or GND.
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TS5V330
SCDS164D – MAY 2004 – REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
FUNCTIONAL DIAGRAM (POSITIVE LOGIC)
2
4
S1A
DA
3
S2A
7
DB
5
S1B
6
S2B
9
11
DC
10
12
DD
14
13
IN
S1C
S2C
S1D
S2D
1
15
Control
Logic
EN
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
–0.5
7
V
VIN
Control input voltage range
(2) (3)
–0.5
7
V
VI/O
Switch I/O voltage range (2) (3) (4)
–0.5
7
IIK
Control input clamp current
VIN < 0
–50
mA
II/OK
I/O port clamp current
VI/O < 0
–50
mA
±128
mA
±100
mA
VCC
II/O
Supply voltage range
ON-state switch current
(5)
Continuous current through VCC or GND
D package (6)
θJA
Tstg
(1)
(2)
(3)
(4)
(5)
(6)
(7)
4
Package thermal impedance
V
73
DBQ package (6)
90
PW package (6)
108
RGY package (7)
39
Storage temperature range
UNIT
–65
150
°C/W
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
VI and VO are used to denote specific conditions for VI/O.
II and IO are used to denote specific conditions for II/O.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D – MAY 2004 – REVISED JUNE 2009
Recommended Operating Conditions (1)
MIN
MAX
UNIT
VCC
Supply voltage range
4
5.5
V
VIH
High-level control input voltage range (EN, IN)
2
5.5
V
VIL
Low-level control input voltage range (EN, IN)
0
0.8
V
VANALOG
Analog I/O voltage range
0
Vcc
V
TA
Operating free-air temperature range
–40
85
°C
(1)
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Electrical Characteristics
over recommended operating free-air temperature range, VCC = 5 V ±10% (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
VIK
EN, IN
Vhys
EN, IN
VCC = 4.5 V,
IIH
EN, IN
VCC = 5.5 V,
VIN and VEN = VCC
IIL
EN, IN
MIN TYP (2) MAX
IIN = –18 mA
–1.8
VCC = 5.5 V,
VIN and VEN = GND
VCC = 5.5 V,
VO = 0 to 5.5 V,
VI = 0,
Switch OFF
IOS (4)
VCC = 5.5 V,
VO = 0.5 VCC,
VI = 0,
Switch ON
Ioff
VCC = 0 V,
VO = 0 to 5.5 V,
VI = 0
VCC = 5.5 V,
II/O = 0,
Switch ON or OFF
VCC = 5.5 V,
One input at 3.4 V,
Other inputs at VCC or GND
ΔICC
EN, IN
ICCD
CIN
COFF
CON
ron (5)
(1)
(2)
(3)
(4)
(5)
D port
S port
mV
±1
µA
±1
µA
50
mA
µA
1
VIN of VEN = 0,
f = 1 MHz
3
µA
2.5
mA
0.25
mA/MHz
3.5
pF
6
VI = 0,
f = 1 MHz,
Outputs open,
Switch OFF
VI = 0,
f = 1 MHz,
Outputs open,
Switch ON
14
VI = 1 V,
IO = 13 mA,
RL = 75 Ω
3
7
VI = 2 V,
IO = 26 mA,
RL = 75 Ω
7
10
VCC = 4.5 V
µA
±1
VEN = GND, VCC = 5.5 V, D and S ports open, VIN input switching 50% duty cycle
EN, IN
V
150
IOZ (3)
ICC
UNIT
pF
4
pF
Ω
VI, VO, II, and IO refer to I/O pins.
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
For I/O ports, IOZ includes the input leakage current.
The IOS test is applicable to only one ON channel at a time. The duration of this test is less than 1 s.
Measured by the voltage drop between the D and S terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (D or S) terminals.
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TS5V330
SCDS164D – MAY 2004 – REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 10%, RL = 75 Ω, CL = 20 pF
(unless otherwise noted) (see Figure 5)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tON
S
tOFF
S
MIN
TYP
MAX
UNIT
D
2.5
6
ns
D
1.1
6
ns
Dynamic Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 10% (unless otherwise noted)
PARAMETER
6
MIN
TYP (1)
MAX
UNIT
RL = 150 Ω,
f = 3.58 MHz,
See Figure 6
0.64
%
DP (2)
RL = 150 Ω,
f = 3.58 MHz,
See Figure 6
0.1
Deg
DG
(1)
(2)
TEST CONDITIONS
(2)
BW
RL = 150 Ω,
See Figure 7
XTALK
RL = 150 Ω,
f = 10 MHz,
RIN = 10 Ω,
OIRR
RL = 150 Ω,
f = 10 MHz,
See Figure 9
300
See Figure 8
MHz
–63
dB
–60
dB
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
DG and DP are expressed in absolute magnitude.
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D – MAY 2004 – REVISED JUNE 2009
OPERATING CHARACTERISTICS
0
0
−1
−10
Phase
−20
−3
−30
−4
−40
−5
Gain
Phase − Deg
Gain − dB
−2
−50
−6
−7
1
−60
1000
10
100
Frequency − MHz
Phase at −3-dB Frequency, 35 Degrees
Gain −3 dB at 460 MHz
Figure 1. Gain/Phase vs Frequency
0.08
0.0
0.07
Differential Phase
−0.2
0.06
−0.3
0.05
−0.4
0.04
−0.5
0.03
−0.6
0.02
−0.7
Differential Gain
−0.8
0.01
−0.9
0.00
Differential Phase − Deg
Differential Gain − %
−0.1
−0.01
−1.0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VBIAS − V
Differential Phase at 0.714, 0.056 Degrees
Differential Gain at 0.714, −0.63%
Figure 2. Differential Gain/Phase vs VBIAS
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TS5V330
SCDS164D – MAY 2004 – REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
OPERATING CHARACTERISTICS
0
160
−10
140
120
−30
100
Phase
−40
80
−50
60
−60
Off
Isolation
−70
Phase − Deg
Off Isolation − dB
−20
40
20
−80
0
1000
−90
1
10
100
Frequency − MHz
Phase at 10 MHz, 88.5 Degrees
Off Isolation at 10 MHz, −60 dB
Figure 3. Off Isolation vs Frequency
250
0
−10
200
−20
150
−40
−50
Phase
100
−60
Crosstalk
−70
Phase − Deg
Crosstalk − dB
−30
50
−80
−90
1
10
0
1000
100
Frequency − Mhz
Phase at 10 MHz, −90.4 Degrees
Crosstalk at 10 MHz, −63.9 dB
Figure 4. Crosstalk vs Frequency
8
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D – MAY 2004 – REVISED JUNE 2009
PARAMETER MEASUREMENT INFORMATION
VCC
Input Generator
VIN
50 Ω
IN
50 Ω
VG1
S1
DUT
VS1
VO
D
S2
CL
(see Note A)
EN
RL
VS2
TEST
VCC
RL
CL
VS1
VS2
tON
5 V ± 0.5 V
5 V ± 0.5 V
75
75
20
20
GND
3V
3V
GND
tOFF
5 V ± 0.5 V
5 V ± 0.5 V
75
75
20
20
GND
3V
3V
GND
TEST CIRCUIT
3V
Output
Control
(VIN)
50%
50%
0V
tON
Analog Output
Waveform
(VO)
tOFF
90%
90%
VOH
0V
VOLTAGE WAVEFORMS
tON AND tOFF TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
C. The outputs are measured one at a time, with one transition per measurement.
Figure 5. Test Circuit and Voltage Waveforms
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TS5V330
SCDS164D – MAY 2004 – REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
VBIAS
BIAS
Network Analyzer
(HP8753ES)
P1
P2
Sawtooth
Waveform Generator
VCC
S1A
DA
RL = 150 Ω
IN
DUT
VIN
EN
VEN
NOTE A: For additional information on measurement method, refer to the TI application report, Measuring Differential Gain and Phase, literature
number SLOA040.
Figure 6. Test Circuit for Differential Gain/Phase Measurement
Differential gain and phase are measured at the output of the ON channel. For example, when VIN = 0, VEN = 0,
and DA is the input, the output is measured at S1A.
HP8753ES Setup
Average = 20
RBW = 300 Hz
ST = 1.381 s
P1 = –7 dBM
CW frequency = 3.58 MHz
Sawtooth Waveform Generator Setup
VBIAS = 0 to 1 V
Frequency = 0.905 Hz
10
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D – MAY 2004 – REVISED JUNE 2009
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
DA
S1A
RL = 150 Ω
IN
DUT
VIN
EN
VEN
Figure 7. Test Circuit for Frequency Response (BW)
Frequency response is measured at the output of the ON channel. For example, when VIN = 0, VEN = 0, and DA
is the input, the output is measured at S1A. All unused analog I/O ports are left open.
HP8753ES Setup
Average = 4
RBW = 3 Hz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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TS5V330
SCDS164D – MAY 2004 – REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
DA
S1A
RL = 150 Ω
IN
50 Ω(1)
VIN
EN
DUT
VEN
DB
S1B
RIN = 10 Ω
RL = 150 Ω
(1) A 50-Ω termination resistor is needed for the network analyzer.
Figure 8. Test Circuit for Crosstalk (XTALK)
Crosstalk is measured at the output of the nonadjacent ON channel. For example, when VIN = 0, VEN = 0, and DA
is the input, the output is measured at S1B. All unused analog input (D) ports and output (S) ports are connected
to GND through 10-Ω and 50-Ω pulldown resistors, respectively.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
12
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D – MAY 2004 – REVISED JUNE 2009
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
S1A
DA
RL = 150 Ω
IN
DUT
VIN
S2A
EN
RL = 150 Ω
50 Ω(1)
VEN
(1) A 50-Ω termination resistor is needed for the network analyzer.
Figure 9. Test Circuit for Off Isolation (OIRR)
Off isolation is measured at the output of the OFF channel. For example, when VIN = VCC, VEN = 0, and DA is the
input, the output is measured at S1A. All unused analog input (D) ports are left open, and output (S) ports are
connected to GND through 50-Ω pulldown resistors.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TS5V330D
ACTIVE
SOIC
D
16
TS5V330DBQR
ACTIVE
SSOP/
QSOP
DBQ
TS5V330DBQRE4
ACTIVE
SSOP/
QSOP
TS5V330DBQRG4
ACTIVE
TS5V330DE4
40
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330DG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330DR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330DRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330DRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330PW
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330PWE4
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330PWG4
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330PWR
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330PWRE4
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330PWRG4
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS5V330RGYR
ACTIVE
VQFN
RGY
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TS5V330RGYRG4
ACTIVE
VQFN
RGY
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2009
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Dec-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
TS5V330DR
SOIC
TS5V330PWR
TS5V330RGYR
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
TSSOP
PW
16
2000
330.0
12.4
7.0
5.6
1.6
8.0
12.0
Q1
VQFN
RGY
16
3000
180.0
12.4
3.8
4.3
1.5
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Dec-2009
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TS5V330DR
SOIC
D
16
2500
333.2
345.9
28.6
TS5V330PWR
TSSOP
PW
16
2000
346.0
346.0
29.0
TS5V330RGYR
VQFN
RGY
16
3000
190.5
212.7
31.8
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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