HITACHI HA13158A

HA13158A
34 W × 4-Channel BTL Power IC
ADE-207-263A (Z)
2nd Edition
Jul. 1999
Description
The HA13158A is four-channel BTL amplifier IC designed for car audio, featuring high output and low
distortion, and applicable to digital audio equipment. It provides 34 W output per channel, with a 13.7 V
power supply and at Max distortion.
Functions
• 4 ch BTL power amplifiers
• Built-in standby circuit
• Built-in muting circuit
• Built-in protection circuit (surge, T.S.D and ASO)
Features
• Low power dissipation
• Soft thermal limiter
• Requires few external parts (C:3, R:1)
• Popping noise minimized
• Low output noise
• Built-in high reliability protection circuit
• Pin to pin with HA13153A/HA13154A/HA13155/HA13157/HA13158
HA13158A
Block Diagram
C2
0.1 µ/16 V
VCC
13.2 V
C1
4400 µ/16 V
14
STBY
2
IN VCC
18
6
PVCC2
PVCC1
3
IN-1
4
Amp-1
Buffer & Mute-1
1
5
7
IN-2
11
8
Amp-2
Buffer & Mute-2
9
15
IN-3
Amp-3
Buffer & Mute-3
13
16
17
19
IN-4
23
MUTE
10
R1
7.5 k
Amp-4
Buffer & Mute-4
20
21
Protector
(ASO, Surge, TSD)
12
22
TAB
C3
10 µ/10 V
Notes: 1. Standby
Power is turned on when a signal of
3.5 V or 0.05 mA is impressed at pin 2.
When pin 2 is open or connected to
GND, standby is turned on (output off).
2. Muting
Muting is turned off (output on) when
a signal of 3.5 V or 0.2 mA is impressed
at pin 10.
When pin 10 is open or connected to
GND, muting is turned on (output off).
3. TAB (header of IC) connected to GND.
Rev.2, Jul. 1999, page 2 of 15
Unit
5V
2
23.5 k
Q1 ON
↓
BIAS ON
25 k
Q2 ON
↓
MUTE ON
37.5 k
5V
10
R: Ω
C: F
HA13158A
Absolute Maximum Ratings
Item
Symbol
Rating
Unit
VCC
18
V
VCC (DC)
26
V
VCC (PEAK)
50
V
IO (PEAK)
4
A
Power dissipation*
PT
83
W
Junction temperature
Tj
150
°C
Operating supply voltage
1
Supply voltage when no signal*
2
Peak supply voltage*
3
Output current*
4
Operating temperature
Topr
–30 to +85
°C
Storage temperature
Tstg
–55 to +125
°C
Note:
1.
2.
3.
4.
Tolerance within 30 seconds.
Tolerance in surge pulse waveform.
Value per 1 channel.
Value when attached on the infinite heat sink plate at Ta = 25 °C.
The derating carve is as shown in the graph below.
100
A: When heat sink is infinite (θj-a = 1.5°C/W)
B: When θf (thermal resistance of heat sink) = 3°C/W
(θj-a = 4.5°C/W)
Power dissipation PT (W)
83 W
A
50
28 W
B
0
25
50
85
Ambient temperature Ta
100
150
(°C)
Rev.2, Jul. 1999, page 3 of 15
HA13158A
Electrical Characteristics (VCC = 13.2 V, f = 1 kHz, RL = 4 Ω, Rg = 600 Ω, Ta = 25°C)
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Quiescent current
IQ1
—
220
—
mA
Vin = 0
Output offset voltage
∆VQ
–180
0
+180
mV
Gain
GV
30.5
32
33.5
dB
Gain difference between
channels
∆GV
–1.0
0
+1.0
dB
Rated output power
PO
—
20
—
W
VCC = 13.2 V,
THD = 10%, RL = 4 Ω
Max output power
POMAX
—
34
—
W
VCC = 13.7 V, RL = 4 Ω
Total harmonic distortion
T.H.D.
—
0.03
—
%
Po = 3 W
Output noise voltage
WBN
—
0.15
—
mVrms
Rg = 0 Ω,
BW = 20 to 20 kHz
Ripple rejection
SVR
—
55
—
dB
f = 120 Hz
Channel cross talk
C.T.
—
70
—
dB
Vout = 0 dBm
Input impedance
Rin
—
25
—
kΩ
Standby current
IQ2
—
—
10
µA
Standby control voltage (high)
VSTH
3.5
—
VCC
V
Standby control voltage (low)
VSTL
0
—
1.5
V
Muting control voltage (high)
VMH
3.5
—
VCC
V
Muting control voltage (low)
VML
0
—
1.5
V
Muting attenuation
ATTM
—
70
—
dB
Rev.2, Jul. 1999, page 4 of 15
Vout = 0 dBm
HA13158A
Pin Explanation
Pin
No.
Symbol
Functions
Input
Impedance
DC
Voltage
1
IN1
CH1 INPUT
25 kΩ (Typ)
0V
Equivalence Circuit
1
25 k
11
IN2
CH2 INPUT
13
IN3
CH3 INPUT
23
IN4
CH4 INPUT
2
STBY
Standby control
90 kΩ
(at Trs. cutoff)
—
37.5 k
2
23.5 k
3
OUT1 (+)
CH1 OUTPUT
—
VCC/2
3
5
OUT1 (–)
7
OUT2 (+)
9
OUT2 (–)
15
OUT3 (+)
17
OUT3 (–)
19
OUT4 (+)
21
OUT4 (–)
10
MUTE
CH2 OUTPUT
CH3 OUTPUT
CH4 OUTPUT
Muting control
25 kΩ (Typ)
—
10
25 k
22
RIPPLE
Bias stability
—
VCC/2
22
Rev.2, Jul. 1999, page 5 of 15
HA13158A
Pin Explanation (cont)
Pin
No.
Symbol
Functions
Input
Impedance
DC
Voltage
Equivalence Circuit
6
PVCC1
Power of
output stage
—
VCC
—
18
PVCC2
14
INVCC
Power of
input stage
—
VCC
—
4
CH1 GND
CH1 power GND
—
—
—
8
CH2 GND
CH2 power GND
16
CH3 GND
CH3 power GND
20
CH4 GND
CH4 power GND
12
IN GND
Input signal GND
—
—
—
Rev.2, Jul. 1999, page 6 of 15
HA13158A
Point of Application Board Design
1. Notes on Application Board’s Pattern Design
• For increasing stability, the connected line of VCC and OUTGND is better to be made wider and lower
impedance.
• For increasing stability, it is better to place the capacitor between VCC and GND (0.1 µF) close to IC.
• It is better to place the grounding of resistor (Rg), between input line and ground, close to INGND (Pin
12) because if OUTGND is connected to the line between Rg and INGND, THD will become worse due
to current from OUTGND.
0.1 µF
VCC
6
3
1
4
5
Rg
12
Figure 1 Notes on Application Board’s Pattern Design
2. How to Reduce the Popping Noise by Muting Circuit
At normal operating circuit, Muting circuit operates at high speed under 1 µs.
In case popping noise becomes a problem, it is possible to reduce the popping noise by connecting
capacitor, which determines the switching time constant, between pin 10 and GND. (Following figure
2)
We recommend value of capacitor greater then 1 µF.
Also transitional popping noise can be reduced sharply by muting before VCC and Standby are ON/OFF.
5V
0V
7.5 kΩ
10
4.7 µF
Muting
control
Figure 2 How to use Muting Circuit
Table 1
Muting ON/OFF Time
C (µ
µF)
ON Time
OFF Time
nothing
under 1 µs
under 1 µs
0.47
2 ms
2 ms
4.7
19 ms
19 ms
Rev.2, Jul. 1999, page 7 of 15
HA13158A
Characteristic Curves
Quiescent current vs. Supply Voltage
Quiescent current IQ (mA)
400
RL = ∞
300
200
100
0
0
8
10
12
14
16
18
20
18
20
Supply Voltage VCC (V)
Output Power vs. Supply Voltage
Output Power Po, Pomax (W)
60
RL = 4 Ω, f = 1 kHz, 4ch operation
50
s)
m
n
40
ax
i
(V
=
4
Vr
m
Po
30
20
D
(TH
Po
)
0%
=1
10
0
0
8
10
12
14
16
Supply Voltage VCC (V)
Rev.2, Jul. 1999, page 8 of 15
HA13158A
Total Harmonic Distortion vs. Frequency
Total Harmonic Distortion THD (%)
5
VCC = 13.2 V, RL = 4 Ω, 80 kHz L.P.F ON
Po = 1.5 W
Po = 8 W
2
1
0.5
0.2
0.1
0.05
0.02
0.01
20
50
100 200
500
1k
2k
5k
10k 20k
Frequency f (Hz)
Total Harmonic Distortion vs. Output Power
10
VCC = 13.2 V, RL = 4 Ω, 80 kHz L.P.F ON
Total Harmonic Distortion THD (%)
5
2
f = 100 Hz
f = 1 kHz
f = 10 kHz
1
0.5
0.2
0.1
0.05
0.02
0.01
0.01 0.02
0.05 0.1 0.2
0.5
1
2
5
10
20 30
Output Power Po (W)
Rev.2, Jul. 1999, page 9 of 15
HA13158A
Crosstalk vs. Frequency (1)
80
70
Crosstalk CT (dB)
60
50
40
30
20
10
0
20
VCC = 13.2 V, Vout = 0 dBm,
80 kHz L.P.F, Input Ch1
Ch2
Ch3
Ch4
50
100 200
500
1k
2k
5k
10k 20k
5k
10k 20k
Frequency f (Hz)
Crosstalk vs. Frequency (2)
80
70
Crosstalk CT (dB)
60
50
40
30
20
10
0
20
VCC = 13.2 V, Vout = 0 dBm,
80 kHz L.P.F, Input Ch2
Ch1
Ch3
Ch4
50
100 200
500
1k
2k
Frequency f (Hz)
Rev.2, Jul. 1999, page 10 of 15
HA13158A
Crosstalk vs. Frequency (3)
80
70
Crosstalk CT (dB)
60
50
40
30
20
10
0
20
VCC = 13.2 V, Vout = 0 dBm,
80 kHz L.P.F, Input Ch3
Ch1
Ch2
Ch4
50
100 200
500
1k
2k
5k
10k 20k
5k
10k 20k
Frequency f (Hz)
Crosstalk vs. Frequency (4)
80
70
Crosstalk CT (dB)
60
50
40
30
20
10
0
20
VCC = 13.2 V, Vout = 0 dBm,
80 kHz L.P.F, Input Ch4
Ch1
Ch2
Ch3
50
100 200
500
1k
2k
Frequency f (Hz)
Rev.2, Jul. 1999, page 11 of 15
HA13158A
Supply Voltage Rejection Ratio vs. Frequency
Supply Voltage Rejection Ratio SVR (dB)
80
70
60
50
40
30
20
10
VCC = 13.2 V, RL = 4 Ω,
Vripple = 0 dBm, 80 kHz L.P.F ON
Ch1
Ch2
Ch3
Ch4
0
20
50
100 200
500
1k
2k
5k
10k 20k
Frequency f (Hz)
Wide Band Noise vs. Signal Source Resistance
5
Wide Band Noise WBN (mV)
2
VCC = 13.2 V, RL = 4 Ω,
Vin = 0
1
0.5
0.2
Mute OFF (Ch1–Ch4)
0.1
Mute ON (Ch1–Ch4)
0.05
0.02
0.01
20
50
100 200
500
1k
2k
5k
10k 20k
Signal Source Resistance Rg (Ω)
Rev.2, Jul. 1999, page 12 of 15
50k
HA13158A
Power Dissipation vs. Output Power
100
RL = 4 Ω, f = 1 kHz, 1ch operation
VCC = 13.2 V
VCC = 14.4 V
VCC = 16 V
Power Dissipation PT (W)
50
20
10
5
2
1
0.02
0.05 0.1 0.2
0.5
1
2
5
10
20 30
Output Power Po (W)
Power Dissipation vs. Frequency
Power Dissipation PT (W)
15
10
5
VCC = 13.2 V, RL = 4 Ω, Po = 10 W, 1ch operation
0
20
50
100 200
500
1k
2k
5k
10k 20k
Frequency f (Hz)
Rev.2, Jul. 1999, page 13 of 15
HA13158A
Package Dimensions
Unit: mm
30.18 ± 0.25
2.79
0.05
1.55 +– 0.1
2 – R1.84 ± 0.19
23
0.70 +0.09
–0.1
0.25 M
27.94
1.27
0.06
0.40 +– 0.04
5.08 4.29
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
Rev.2, Jul. 1999, page 14 of 15
4.14 ± 0.33
1
17.78 ± 0.25
10.70 ± 0.12
3.80 ± 0.05
17.50 ± 0.13
4.32 ± 0.05
1.12
4.50 ± 0.12
φ 3.80 ± 0.05
19.81
SP-23TE
Conforms
—
8.5 g
HA13158A
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intellectual property rights, in connection with use of the information contained in this document.
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received the latest product standards or specifications before final design, purchase or use.
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contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
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Colophon 2.0
Rev.2, Jul. 1999, page 15 of 15