HD74ALVC1G80 Single Positive Edge-triggered D-type Flip Flop ADE-205-638A (Z) Rev.1 August 2001 Description The HD74ALVC1G80 has D-type flip flop in a 5 pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined up as hitachi uni logic series. • Supplied on emboss taping for high speed automatic mounting. • Supply voltage range : 1.2 to 3.6 V Operating temperature range : −40 to +85°C • All inputs VIH (Max.) = 3.6 V (@VCC = 0 V to 3.6 V) All outputs VO (Max.) = 3.6 V (@VCC = 0 V) • Output current ±2 mA (@VCC = 1.2 V) ±4 mA (@VCC = 1.4 V to 1.6 V) ±6 mA (@VCC = 1.65 V to 1.95 V) ±18 mA (@VCC = 2.3 V to 2.7 V) ±24 mA (@VCC = 3.0 V to 3.6 V) • Package type Package type Package code Package suffix Taping code VSON-5 pin TNP-5D VS E (3,000 pcs / Reel) HD74ALVC1G80 Outline and Article Indication • HD74ALVC1G80 Marking A G = Control code VSON-5 Function Table Inputs CLK D Output Q ↑ H L ↑ L H L X Q0 H: L: X: ↑: Q0: High level Low level Immaterial Low to high transition Level of Q before the indicated steady input conditions were established. Rev.1, Aug. 2001, page 2 of 11 HD74ALVC1G80 Pin Arrangement D 1 CLK 2 GND 3 5 VCC 4 Q (Top view) Absolute Maximum Ratings Item Supply voltage range Input voltage range *1 Output voltage range *1, 2 Symbol Ratings Unit VCC −0.5 to 4.6 V VI −0.5 to 4.6 V VO −0.5 to VCC+0.5 V −0.5 to 4.6 Conditions Output : H or L VCC : OFF Input clamp current IIK −50 mA VI < 0 Output clamp current IOK ±50 mA VO < 0 or VO > VCC Continuous output current IO ±50 mA VO = 0 to VCC Continuous current through VCC or GND ICC or IGND ±100 mA Maximum power dissipation *3 at Ta = 25°C (in still air) PT 200 mW Storage temperature Tstg −65 to 150 °C Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. Rev.1, Aug. 2001, page 3 of 11 HD74ALVC1G80 Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 1.2 3.6 V Input voltage range VI 0 3.6 V Output voltage range VO 0 VCC V Output current IOH −2 mA −4 VCC = 1.4 V −6 VCC = 1.65 V −18 VCC = 2.3 V −24 VCC = 3.0 V 2 VCC = 1.2 V 4 VCC = 1.4 V 6 VCC = 1.65 V 18 VCC = 2.3 V 24 VCC = 3.0 V 0 20 0 10 −40 85 IOL ∆t / ∆v Input transition rise or fall rate Operating free-air temperature Ta ns / V Conditions VCC = 1.2 V VCC = 1.2 to 2.7 V VCC = 3.3±0.3 V °C Note: Unused or floating inputs must be held high or low. Logic Diagram C CLK C C Q TG D C C TG TG TG C C C Rev.1, Aug. 2001, page 4 of 11 C C HD74ALVC1G80 Electrical Characteristics (Ta = −40 to 85°C) Item Symbol VCC (V) Input voltage VIH 1.2 VIL Output voltage VOH VOL * Min Typ Max Unit VCC×0.75 V 1.4 to 1.6 VCC×0.7 1.65 to 1.95 VCC×0.7 2.3 to 2.7 1.7 3.0 to 3.6 2.0 1.2 VCC×0.25 1.4 to 1.6 VCC×0.3 1.65 to 1.95 VCC×0.3 2.3 to 2.7 0.7 3.0 to 3.6 0.8 Min to Max VCC−0.2 1.2 0.9 IOH = −2 mA 1.4 1.1 IOH = −4 mA 1.65 1.2 IOH = −6 mA 2.3 1.7 IOH = −18 mA 3.0 2.2 IOH = −24 mA Min to Max 0.2 IOL = 100 µA 1.2 0.3 IOL = 2 mA 1.4 0.3 IOL = 4 mA 1.65 0.3 IOL = 6 mA 2.3 0.55 IOL = 18 mA 3.0 0.55 IOL = 24 mA V Test conditions IOH = −100 µA Input current IIN 3.6 ±5 µA VIN = 3.6 V or GND Quiescent supply current ICC 3.6 10 µA VIN = VCC or GND, IO = 0 Output leakage current IOFF 0 5 µA VIN or VO = 0 to 3.6 V Input capacitance CIN 3.3 4.0 pF VIN = VCC or GND Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. Rev.1, Aug. 2001, page 5 of 11 HD74ALVC1G80 Switching Characteristics (Ta = −40 to 85°C) • VCC = 1.2 V Item Symbol Min Typ Max Unit Test conditions Maximum clock frequency fmax 200 MHz CL = 15 pF Propagation delay time tPLH tPHL 7.3 ns CL = 15 pF Setup time tsu 4.5 ns Hold time th −4.5 ns Pulse width tw 2.0 ns • TO (Output) CLK Q D CLK “H” or “L” VCC = 1.5±0.1 V Item Symbol Min Typ Max Unit Test conditions Maximum clock frequency fmax 100 350 MHz CL = 15 pF Propagation delay time tPLH tPHL 2.0 8.0 ns CL = 15 pF Setup time tsu 4.5 ns Hold time th 0.0 ns Pulse width tw 3.5 ns • FROM (Input) FROM (Input) TO (Output) CLK Q D CLK “H” or “L” VCC = 1.8±0.15 V Item Symbol Min Typ Max Unit Test conditions Maximum clock frequency fmax 160 350 MHz CL = 30 pF Propagation delay time tPLH tPHL 1.5 7.0 ns CL = 30 pF Setup time tsu 3.5 ns Hold time th 0.0 ns Pulse width tw 2.5 ns Rev.1, Aug. 2001, page 6 of 11 FROM (Input) TO (Output) CLK Q D CLK “H” or “L” HD74ALVC1G80 Switching Characteristics (cont) • VCC = 2.5±0.2 V Item Symbol Min Typ Max Unit Test conditions Maximum clock frequency fmax 160 400 MHz CL = 30 pF Propagation delay time tPLH tPHL 1.0 4.0 ns CL = 30 pF Setup time tsu 2.5 ns Hold time th 0.0 ns Pulse width tw 2.5 ns • FROM (Input) TO (Output) CLK Q D CLK “H” or “L” VCC = 3.3±0.3 V Item Symbol Min Typ Max Unit Test conditions Maximum clock frequency fmax 200 450 MHz CL = 30 pF Propagation delay time tPLH tPHL 1.0 3.0 ns CL = 30 pF Setup time tsu 2.0 ns Hold time th 0.0 ns Pulse width tw 2.0 ns FROM (Input) TO (Output) CLK Q D CLK “H” or “L” Operating Characteristics (Ta = 25°C) Item Symbol VCC (V) Min Typ Max Unit Test conditions Power dissipation CPD 1.5 7.5 pF f = 10 MHz 1.8 7.5 2.5 8.0 3.3 11.0 capacitance Rev.1, Aug. 2001, page 7 of 11 HD74ALVC1G80 Test Circuit VCC Input Pulse Generator Zout = 50 Ω D Input Pulse Generator Zout = 50 Ω Symbol Output Q Q CL CLK RL V CC = 1.2 V, V = 2.5±0.2 V, V = 1.8±0.15 V CC 1.5±0.1 V CC 3.3±0.3 V RL 2.0 kΩ 1.0 kΩ 500 Ω CL 15 pF 30 pF 30 pF Note: CL includes probe and jig capacitance. Rev.1, Aug. 2001, page 8 of 11 HD74ALVC1G80 • Waveform - 1 tr tf 10 % t su VIH 90 % 90 % Timming input Vref 10 % th GND VIH Data input Vref Vref GND tw VIH Input Vref Vref GND • Waveform - 2 tf tr 90 % Input VIH 90 % Vref 10 % 10 % GND t PLH VOH Same-phase output Vref VOL t PHL VOH Vref Opposite-phase output VOL Symbol V CC = 1.2 V, 1.5±0.1 V, V CC = 2.5±0.2 V 1.8±0.15 V V CC = 3.3±0.3 V tr / t f 2.0 ns 2.5 ns 2.5 ns V IH VCC VCC 2.7 V V ref 50% 50% 1.5 V Note: Input waveform : PRR = 10 MHz, duty cycle 50% Rev.1, Aug. 2001, page 9 of 11 HD74ALVC1G80 Package Dimensions As of January, 2001 Unit: mm 0.12 ± 0.05 1.60 ± 0.05 0.50 1.20 ± 0.05 0.50 5 − 0.2 ± 0.05 0.55 ± 0.05 1.6 ± 0.05 Hitachi Code JEDEC EIAJ Mass (reference value) Rev.1, Aug. 2001, page 10 of 11 TNP-5D HD74ALVC1G80 Disclaimer 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Sales Offices Hitachi, Ltd. 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(Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road Hung-Kuo Building Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://semiconductor.hitachi.com.hk Copyright © Hitachi, Ltd., 2001. All rights reserved. Printed in Japan. Colophon 4.0 Rev.1, Aug. 2001, page 11 of 11