HITACHI HD74HC194

HD74HC194
4-bit Bidirectional Universal Shift Register
Description
This bidirectional shift register is designed to incorporate virtually all of the features a system designer may
want in a shift register. It features parallel inputs, parallel outputs, right shift and left shift serial inputs,
operating mode control inputs, and a direct overriding clear line. The register has four distinct modes of
operation: parallel (broadside) load, shift right (in the direction Q A toware QD); shift left; inhibit clock (do
nothing).
Synchronous parallel loading is accomplished by applying the four bits of data and taking both mode
control inputs, S0 and S1, high. The data are loaded into their respective flip-flops and appear at the outputs
after the positive transition of the clock input. During loading, serial data flow is inhibited. Shift right is
accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low. Serial
data for this mode is entered at the shift right data input. When S 0 is low and S1 is high, data shifts left
synchronously and new data is entered at the shift left serial input. Clocking of the flip-flops is inhibited
when both mode control inputs are low. The mode control inputs should be changed only when the clock
input is high.
Features
•
•
•
•
•
High Speed Operation: tpd (Clock to Q) = 12 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max
HD74HC194
Function Table
Inputs
Operating
Mode
Serial
Parallel
Outputs
Mode
Clear S1
S0
Clock
Shift Left
Shift Right
A B C D QA
QB
QC
QD
Clear
L
X
X
X
X
X
X X
X X L
L
L
L
Parallel load
H
H
H
X
X
a
c
b
c
d
Shift right
H
L
H
X
H
X X
X X H
QAn
QBn
QCn
H
L
H
X
L
X X
X X L
QAn
QBn
QCn
H
H
L
H
X
X X
X X QBn
QCn
QDn
H
H
H
L
L
X
X X
X X QBn
QCn
QDn
L
H
L
L
X
X
X
X X
X X QA0
QB0
QC0
QD0
H
X
X
L
X
X
X X
X X QA0
QB0
QC0
QD0
H
X
X
H
X
X
X X
X X QA0
QB0
QC0
QD0
Shift left
Hold
H :
L :
X :
b
d
a
high level (Steady state)
low level (Steady state)
don’t care
:
transition from low to high level.
a, b, c, d : the level of steady-state input at inputs A, B, C or D respectively.
QA0, QB0, QC0, QD0 : the level of QA, QB, QC or QD respectively, before the indicated steady-state input
conditions were established.
QAn, QBn, QCn, QDn
the clock.
2
:
the level of QA, QB, QC or QD respectively before the most recent
transition of
HD74HC194
Pin Arrangement
16 VCC
Clear 1
Shift
Right
Serial-Input
Parallel
Inputs
2
R
A 3
CLR
QA
15 QA
A
QB
14 QB
B 4
B
QC
Parallel
13 QC Outputs
C 5
C
QD
12 QD
D 6
D
CK
11 Clock
S1
10 S1
Shift
Left
Serial-Input
7
L
S0
GND 8
Mode Control
9 S0
(Top view)
Timing Diagram
Clock
Mode
Control
Inputs
S0
S1
Clear
Serial
Data
Inputs
Parallel
Data
Inputs
R
L
A
H
B
L
C
H
D
L
QA
QB
Outputs
QC
QD
Shift Right
Clear
Load
Shift Left
Inhibit
Clear
3
HD74HC194
Logic Diagram
Serial
Shift
Left
D
C
B
Serial
Shift
Right
A
S0
S1
D
C
C Q
CL CL
D
C
C Q
CL CL
D
C
C Q
CL CL
D
C
C Q
CL CL
Clock
Clear
QD
4
QC
QB
QA
HD74HC194
DC Characteristics
Ta = –40 to
+85°C
Ta = 25°C
Item
Symbol
VCC (V) Min Typ Max Min
Max
Unit
Input voltage
VIH
2.0
1.5 —
—
1.5
—
V
4.5
3.15 —
—
3.15
—
6.0
4.2 —
—
4.2
—
2.0
—
—
0.5
—
0.5
4.5
—
—
1.35 —
1.35
6.0
—
—
1.8
—
1.8
2.0
1.9 2.0 —
1.9
—
4.5
4.4 4.5 —
4.4
—
6.0
5.9 6.0 —
5.9
—
4.5
4.18 —
—
4.13
—
I OH = –4 mA
6.0
5.68 —
—
5.63
—
I OH = –5.2 mA
2.0
—
0.0 0.1
—
0.1
4.5
—
0.0 0.1
—
0.1
6.0
—
0.0 0.1
—
0.1
4.5
—
—
0.26 —
0.33
I OL = 4 mA
6.0
—
—
0.26 —
0.33
I OL = 5.2 mA
VIL
Output voltage
VOH
VOL
Test Conditions
V
V
V
Vin = VIH or VIL I OH = –20 µA
Vin = VIH or VIL I OL = 20 µA
Input current
Iin
6.0
—
—
±0.1 —
±1.0
µA
Vin = VCC or GND
Quiescent supply
current
I CC
6.0
—
—
4.0
40
µA
Vin = VCC or GND, Iout = 0 µA
—
5
HD74HC194
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = –40 to
+85°C
Ta = 25°C
Item
Symbol
VCC (V) Min Typ Max Min
Max
Unit
Maximum clock
f max
2.0
—
—
6
—
5
ns
4.5
—
—
30
—
24
6.0
—
—
35
—
28
Propagation delay t PHL
2.0
—
—
140 —
175
time
4.5
—
12
28
—
35
6.0
—
—
24
—
30
2.0
—
—
140 —
175
4.5
—
12
28
—
35
6.0
—
—
24
—
30
2.0
—
—
150 —
190
4.5
—
13
30
—
38
6.0
—
—
26
—
33
2.0
80
—
—
100
—
4.5
16
6
—
20
—
6.0
14
—
—
17
—
2.0
100 —
—
125
—
4.5
20
7
—
25
—
6.0
17
—
—
21
—
2.0
150 —
—
187
—
4.5
30
17
—
37
—
6.0
25
—
—
31
—
2.0
0
—
—
0
—
4.5
0
–4
—
0
—
6.0
0
—
—
0
—
2.0
25
—
—
31
—
4.5
5
1
—
6
—
6.0
4
—
—
5
—
frequency
t PLH
t PHL
Pulse width
Setup time
Hold time
Removal time
tw
t su
th
t rem
Output rise/fall
t TLH
2.0
—
—
75
—
95
time
t THL
4.5
—
5
15
—
19
6.0
—
—
13
—
16
—
—
5
10
—
10
Input capacitance
6
Cin
ns
Test Conditions
Clock to Q
ns
ns
Clear to Q
ns
Clock or Clear
ns
A, B, C or D to Clock
ns
Mode controls to Clock
ns
Any input
ns
Clear inactive to Clock
ns
pF
Unit: mm
19.20
20.00 Max
1
7.40 Max
9
6.30
16
8
1.3
0.48 ± 0.10
2.54 Min 5.06 Max
2.54 ± 0.25
0.51 Min
1.11 Max
7.62
+ 0.13
0.25 – 0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-16
Conforms
Conforms
1.07 g
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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