HT23C040 CMOS 512K´8-Bit Mask ROM Features · · · Operating voltage: 2.7V~5.5V Low power consumption – Operation: 25mA max. (V CC=5V) 10mA max. (VCC=3V) – Standby: 30mA max. (V CC=5V) 10mA max. (VCC=3V) Access time: 120ns max. (VCC=5V) 250ns max. (VCC=3V) · · · · · · 524288´8-bit of mask ROM Mask option: chip enable CE/CE/OE1/OE1, and output enable OE/OE/NC TTL compatible inputs and outputs Tristate outputs Fully static operation Package type: 32-pin DIP/SOP General Description tiple bus microprocessor systems. An additional feature of the HT23C040 is its ability to enter the standby mode whenever the chip enable (CE/CE) is inactive, thus reducing current consumption to below 30mA. The combination of these functions makes the chip suitable for high density low power memory applications. The HT23C040 is a read-only memory with high performance CMOS storage device whose 4096K of memory is arranged into 524288 word by 8 bits. For application flexibility, the chip enable and output enable control pins can be selected as active high or active low. This flexibility not only allows easy interface with most microprocessors, but also eliminates bus contention in mul- 1 January 20, 2000 HT23C040 Block Diagram P re -c h a rg e C K T A 0 X Y P re -d e c o d e r A d d re s s B u ffe rs A T D A 1 8 P u ll- h ig h N M O S Y -D e c R O M C e ll A rra y ( 5 1 2 K ´ 8 - B its ) Z -D e c Z - s e le c to r X -D e c S e n s e A m p lifie r s M u x C E /C E /O E 1 /O E 1 M u x C T R L O E /O E /N C L a tc h O u tp u t B u ffe rs V S S V C C D 0 D 7 Pin Assignment N C 1 3 2 V C C A 1 6 2 3 1 A 1 8 A 1 5 3 3 0 A 1 7 A 1 2 4 2 9 A 1 4 A 7 5 2 8 A 1 3 A 6 6 2 7 A 8 A 5 7 2 6 A 9 A 4 8 2 5 A 1 1 A 3 9 2 4 O E /O E /N C A 2 1 0 2 3 A 1 0 A 1 1 1 2 2 C E /C E /O E 1 /O E 1 A 0 1 2 2 1 D 7 D 0 1 3 2 0 D 6 D 1 1 4 1 9 D 5 D 2 1 5 1 8 D 4 V S S 1 6 1 7 D 3 H T 2 3 C 0 4 0 3 2 D IP /S O P 2 January 20, 2000 HT23C040 Pin Description Pin Name I/O Description NC ¾ No connection A0~A18 I Address inputs D0~D7 O Data outputs VSS ¾ Negative power supply CE/CE/OE1/OE1 I Chip enable/Output enable input OE/OE/NC I Output enable input VCC ¾ Positive power supply Operation Truth Table Mode CE/CE OE/OE A0~A18 D0~D7 Read H/L H/L Valid Deselect H/L L/H X High Z Standby L/H X X High Z Data Out Note: H=VIH, L=VIL, X=VIH or VIL Absolute Maximum Ratings Supply Voltage.................................-0.3V to 6V Storage Temperature.................-50°C to 125°C Input Voltage .......................-0.3V to VCC+0.3V Operating Temperature ..............-40°C to 85°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. 3 January 20, 2000 HT23C040 D.C. Characteristics Supply voltage: 4.5V~5.5V Symbol Parameter Ta=-40°C to 85°C Test Conditions VCC Conditions ¾ Min. Typ. Max. Unit 4.5 ¾ 5.5 V ¾ ¾ 25 mA VCC Operating Voltage ¾ ICC1 Operating Current 5V VIL1 Input Low Voltage 5V ¾ VSS ¾ 0.8 V VIH1 Input High Voltage 5V ¾ 2.2 ¾ VCC V VOL1 Output Low Voltage 5V IOL=3.2mA ¾ ¾ 0.4 V VOH1 Output High Voltage 5V IOH=-1mA 2.4 ¾ VCC V ILI Input Leakage Current 5V VIN=0 to VCC ¾ ¾ 10 mA ILO Output Leakage Current 5V VOUT=0 to VCC ¾ ¾ 10 mA ISTB1 Standby Current 5V CE=VIL CE=VIH ¾ ¾ 1.5 mA ISTB2 Standby Current 5V CE£0.2V CE³VCC-0.2V ¾ ¾ 30 mA CIN Input Capacitance (See note) ¾ f=1MHz ¾ ¾ 10 pF COUT Output Capacitance (See note) ¾ f=1MHz ¾ ¾ 10 pF O/P Unload, f=5MHz 4 January 20, 2000 HT23C040 Supply voltage: 2.7V~3.3V Symbol Ta=-40°C to 85°C Parameter Test Conditions VCC Conditions ¾ Min. Typ. Max. Unit 2.7 ¾ 3.3 V ¾ ¾ 10 mA VCC Operating Voltage ¾ ICC2 Operating Current 3V VIL2 Input Low Voltage 3V ¾ VSS ¾ 0.4 V VIH2 Input High Voltage 3V ¾ 1.5 ¾ VCC V VOL2 Output Low Voltage 3V IOL=2mA ¾ ¾ 0.4 V VOH2 Output High Voltage 3V IOH=-0.6mA 1.5 ¾ VCC V ILI Input Leakage Current 3V VIN=0 to VCC ¾ ¾ 10 mA ILO Output Leakage Current 3V VOUT=0 to VCC ¾ ¾ 10 mA CIN Input Capacitance (See Note) ¾ f=1MHz ¾ ¾ 10 pF COUT Output Capacitance (See Note) ¾ f=1MHz ¾ ¾ 10 pF O/P Unload, f=5MHz Note: These parameters are periodically sampled but not 100% tested. A.C. Characteristics Symbol Ta=-40°C to 85°C 3V±10% Parameter 5V±10% Unit Min. Max. Min. Max. 200 ¾ 120 ¾ ns tCYC Cycle Time tAA Address Access Time ¾ 250 ¾ 120 ns tACE Chip Enable Access Time ¾ 250 ¾ 120 ns tAOE Output Enable Access Time ¾ 150 ¾ 80 ns tOH Output Hold Time ¾ ¾ 10 ¾ ns tOD Output Disable Time (See Note) ¾ ¾ ¾ 70 ns tOE Output Enable Time (See Note) ¾ ¾ 10 ¾ ns Note: These parameters are periodically sampled but not 100% tested. 5 January 20, 2000 HT23C040 V A.C. test condition Output load: see figure right C C 1 2 5 0 W Input rise and fall time: 10ns O u tp u t Input pulse levels: 0.4V to 2.4V 7 7 5 W Input and output timing reference levels: 0.8V and 2.0V (VCC=5V) 1.5V (VCC=3V) 1 0 0 p F * * In c lu d in g s c o p e a n d jig Output load circuit Functional Description · Data read mode The HT23C040 has two modes, namely data read mode and standby mode, controlled by CE/CE/OE1/OE1 and OE/OE/NC inputs. When both the chip enable (CE/CE/OE1/OE1) and the output enable (OE/OE/NC) are active, the chip is in data read mode. Otherwise, active CE/CE and inactive OE/OE/NC result in deselect mode. The output will remain in Hi-Z state. · Standby mode The HT23C040 has lower current consumption, controlled by the chip enable input (CE/CE). When a low/high level is applied to the CE/CE input regardless of the output enable (OE/OE/NC) states, the chip will enter the standby mode. Timing Diagrams · Propagation delay due to address (CE/CE/OE1/OE1 and OE/OE are active) tC Y C V a lid A d d re s s tA tO A H V a lid D o u t · Propagation delay due to chip and output enable (address valid) tA C E C E C E tA O E O E O E tO tO E D o u t D V a lid 6 January 20, 2000 HT23C040 Characteristic Curves 1 .5 O p e r a tin g C u r r e n t IC (N o r m a liz e d ) O p e r a tin g C u r r e n t IC (N o r m a liz e d ) C C 1 .2 1 .2 5 1 0 .7 5 0 .5 T a = 2 5 4 .5 5 5 .5 O p e r a tin g V o lta g e V C C (V ) C V C C T B 2 T B 2 S ta n d b y C u r r e n t IS (N o r m a liz e d ) S ta n d b y C u r r e n t IS (N o r m a liz e d ) 1 0 .7 5 5 -5 0 -2 5 0 2 5 5 0 7 5 5 0 7 5 5 0 7 5 T e m p e ra tu re ( C ) 1 .2 5 1 .1 0 .9 5 C C (V ) V C C = 5 V 1 .1 1 .2 5 A 1 .5 1 0 .9 5 O p e r a tin g V o lta g e V (V ) V 7 C C = 5 V 0 2 5 1 0 .7 5 0 .5 5 .5 C C -2 5 T e m p e ra tu re ( C ) 1 .2 4 .5 -5 0 5 .5 A c c e s s T im e T A (N o r m a liz e d ) A c c e s s T im e T (N o r m a liz e d ) A A C C 0 .8 0 .8 4 .5 O p e r a tin g V o lta g e V 0 .8 T a = 2 5 0 .9 1 .4 1 .2 5 T a = 2 5 1 = 5 V 1 .5 0 .5 1 .1 -5 0 -2 5 0 2 5 T e m p e ra tu re ( C ) January 20, 2000 1 .5 1 .1 1 .2 5 C E 1 .2 A c c e s s T im e T A (N o r m a liz e d ) A c c e s s T im e T A (N o r m a liz e d ) C E HT23C040 1 0 .9 4 .5 5 5 .5 O p e r a tin g V o lta g e V C C (V ) V -2 5 = 5 V 1 .1 1 .2 5 O E 1 .5 0 .9 -5 0 0 2 5 5 0 7 5 T e m p e ra tu re ( C ) 1 .2 1 C C C A c c e s s T im e T A (N o r m a liz e d ) A c c e s s T im e T (N o r m a liz e d ) A O E C 0 .8 T a = 2 5 0 .7 5 0 .5 0 .8 T a = 2 5 1 1 0 .7 5 0 .5 4 .5 5 O p e r a tin g V o lta g e V -5 0 5 .5 C C (V ) V 8 C C = 5 V -2 5 0 2 5 5 0 7 5 1 0 0 T e m p e ra tu re ( C ) January 20, 2000 HT23C040 HT23C040 MASK ROM ORDERING SHEET Custom: Input Medium: EPROM DISK File (Mail Address: [email protected]) User No. Type/Ref. Name Q¢ty Check Sum OTHER Memory Address Start End Control Pin and Package Form Option: (1) CE (2) CE (3) OE1 (4) OE1 (a) 32 Pin Type Pin 22: Pin 24: (1) OE (2) OE (3) NC (1) Chip Form (2) 32 DIP (3) 32 SOP (b) Package Form: Companion User No. Package Marking : Delivery Date : Q¢ty: CUSTOM CONFIRMED BY: (NAME, DATE, POSITION & CO. CHOP) HOLTEK CONFIRMED BY: (SALES) (SALES MANAGER) 9 January 20, 2000 HT23C040 Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Semiconductor (Hong Kong) Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright ã 2000 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. 10 January 20, 2000