HOLTEK HT6030

312 Series of Decoders
Features
·
·
·
·
·
·
·
·
Operating voltage: 2.4V~12V
Low power and high noise immunity CMOS
technology
Low standby current
Capable of decoding 12 bits of information
Pair with Holtek¢s 312 series of encoders
8~12 address pins
0~4 data pins
Trinary address setting
·
·
·
·
·
·
Received data are checked two times
Built-in oscillator needs only 5% resistor
VT goes high during a valid transmission
Easy interface with an RF or an infrared
transmission medium
Minimal external components
Package information: refer to Selection
Table
Applications
·
·
·
·
Burglar alarm system
Smoke and fire alarm system
Garage door controllers
Car door controllers
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·
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Car alarm system
Security system
Cordless telephones
Other remote control systems
General Description
The 312decoders are a series of CMOS LSIs for
remote control system applications. They are
paired with 312series of encoders. For proper
operation a pair of encoder/decoder with the
same number of address and data format
should be selected (refer to the encoder/decoder
cross reference tables).
or unmatched codes are encountered, the input
data codes are decoded and transferred to the
output pins. The VT pin also goes high to indicate a valid transmission.
The 312 series of decoders are capable of decoding 12 bits of information that consists of N bits
of address and 12-N bits of data. To meet various applications they are arranged to provide a
number of data pins ranging from 0 to 4 and an
address pin ranging from 8 to 12. Thus, various
combinations of address/data number are
available in different packages.
The 312 series of decoders receive serial address
and data from its corredponding series of
encoders that are transmitted by a carrier using an RF or an IR transmission medium. Then
it compares the serial input information twice
continuously with its local address. If no errors
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December 13, 1999
312 Series of Decoders
Selection Table
Function Address
No.
Part No.
Data
No.
Type
VT
Oscillator
Trigger
Package
HT6030
12
0
¾
Ö
RC oscillator DIN active ²Hi² 18 DIP/20 SOP
HT6032
10
2
L
Ö
RC oscillator DIN active ²Hi² 18 DIP/20 SOP
HT6034
8
4
L
Ö
RC oscillator DIN active ²Hi² 18 DIP/20 SOP
Note: Data type: L stands for latch type data output.
VT can be used as a momentary data output.
Block Diagram
O S C 1
O S C 2
D IN
O s c illa to r
B u ffe r
D iv id e r
D a ta S h ift
R e g is te r
L a tc h C ir c u it
C o m p a ra to r
C o n tr o l L o g ic
D a ta
D a ta D e te c to r
S y n c . D e te c to r
C o m p a ra to r
T r a n s m is s io n G a te C ir c u it
A d d re s s
B u ffe r
V D D
V T
V S S
Note: The address/data pins are available in various combinations (refer to the address/data table).
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312 Series of Decoders
Pin Assignment
1 2 -A d d re s s
0 -D a ta
1 2 -A d d re s s
0 -D a ta
1 0 -A d d re s s
2 -D a ta
N C
1
2 0
N C
A 0
1
1 8
V D D
A 0
2
1 9
V D D
A 0
1
1 8
V D D
A 1
2
1 7
V T
A 1
3
1 8
V T
A 1
2
1 7
V T
A 2
3
1 6
O S C 2
A 2
4
1 7
O S C 2
A 2
3
1 6
O S C 2
A 3
4
1 5
O S C 1
A 3
5
1 6
O S C 1
A 3
4
1 5
O S C 1
A 4
5
1 4
D IN
A 4
6
1 5
D IN
A 4
5
1 4
D IN
A 5
6
1 3
A 1 1
A 5
7
1 4
A 1 1
A 5
6
1 3
D 1 1
A 6
7
1 2
A 1 0
A 6
8
1 3
A 1 0
A 6
7
1 2
D 1 0
A 7
8
1 1
A 9
A 7
9
1 2
A 9
A 7
8
1 1
A 9
V S S
9
1 0
A 8
V S S
1 0
1 1
A 8
V S S
9
1 0
A 8
H T 6 0 3 0
1 8 D IP
H T 6 0 3 0
2 0 S O P
1 0 -A d d re s s
2 -D a ta
H T 6 0 3 2
1 8 D IP
8 -A d d re s s
4 -D a ta
8 -A d d re s s
4 -D a ta
N C
1
2 0
N C
N C
1
2 0
N C
A 0
2
1 9
V D D
A 0
1
1 8
V D D
A 0
2
1 9
V D D
A 1
3
1 8
V T
A 1
2
1 7
V T
A 1
3
1 8
V T
A 2
4
1 7
O S C 2
A 2
3
1 6
O S C 2
A 2
4
1 7
O S C 2
A 3
5
1 6
O S C 1
A 3
4
1 5
O S C 1
A 3
5
1 6
O S C 1
A 4
6
1 5
D IN
A 4
5
1 4
D IN
A 4
6
1 5
D IN
A 5
7
1 4
D 1 1
A 5
6
1 3
D 1 1
A 5
7
1 4
D 1 1
A 6
8
1 3
D 1 0
A 6
7
1 2
D 1 0
A 6
8
1 3
D 1 0
A 7
9
1 2
A 9
A 7
8
1 1
D 9
A 7
9
1 2
D 9
1 0
1 1
A 8
V S S
9
1 0
D 8
V S S
1 0
1 1
D 8
V S S
H T 6 0 3 2
2 0 S O P
H T 6 0 3 4
1 8 D IP
H T 6 0 3 4
2 0 S O P
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December 13, 1999
312 Series of Decoders
Pin Description
Pin Name
I/O
Internal
Connection
Description
TRANSMISSION Input pins for address A0~A11 setting
GATE
They can be externally set to VDD, VSS, or left open.
A0~A11
I
D8~D11
O
CMOS OUT
DIN
I
CMOS IN
VT
O
CMOS OUT
OSC1
I
OSCILLATOR
Oscillator input pin
OSC2
O
OSCILLATOR
Oscillator output pin
VSS
¾
¾
Negative power supply, ground
VDD
¾
¾
Positive power supply
Output data pins
Serial data input pin
Valid transmission, active high
Approximate internal connections
T R A N S M IS S IO N
G A T E
C M O S O U T
C M O S IN
O S C IL L A T O R
E N
O S C 1
O S C 2
Absolute Maximum Ratings
Supply Voltage...............................-0.3V to 13V
Storage Temperature.................-50°C to 125°C
Input Voltage....................VSS-0.3 to VDD+0.3V
Operating Temperature ..............-20°C to 75°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device
at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
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December 13, 1999
312 Series of Decoders
Electrical Characteristics
Symbol
Parameter
Ta=25°C
Test Conditions
VDD
Conditions
¾
¾
Min.
Typ.
Max.
Unit
2.4
5
12
V
¾
0.1
1
mA
¾
2
4
mA
¾
250
500
mA
VDD
Operating Voltage
ISTB
Standby Current
IDD
Operating Current
5V
No load
fOSC=100kHz
Data Output Source
Current (D8~D11)
5V
VOH=4.5V
-0.5
-1
¾
mA
Data Output Sink
Current (D8~D11)
5V
VOL=0.5V
0.5
1
¾
mA
-2
-4
¾
-0.35
-0.6
¾
1
2
¾
0.35
0.6
¾
IO
5V
12V
Oscillator stops
VT Output Source Current
IVT
VT Output Source Current
Only For HT6033/35/45
VT Output Sink Current
VOH=4.5V
5V
VOL=0.5V
VT Output Sink Current
Only For HT6033/35/45
mA
VIH
²H² Input Voltage
5V
¾
3.5
¾
5
V
VIL
²L² Input Voltage
5V
¾
0
¾
1
V
fOSC
Oscillator Frequency
5V
¾
100
¾
kHz
ROSC=91kW
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December 13, 1999
312 Series of Decoders
Functional Description
Flowchart
Operation
12
The 3 series of decoders provide various combinations of address and data pins in different
packages. They are paired with 312series of
encoders. The decoders receive data transmitted by the encoders and interpret the first N
bits of the code period as addresses and the last
12-N bits as data (where N is the address code
number). A signal on the DIN pin then activates the oscillator which in turn decodes the
incoming address and data. The decoders check
the received address twice continuously. If all
the received address codes match the contents
of the decoder¢s local address, the 12-N bits of
data are decoded to activate the output pins
and the VT pin is set high indicating a valid
transmission. That will last until the address
code is incorrect or no signal is received.
P o w e r o n
S ta n d b y m o d e
N o
D is a b le V T &
ig n o r e th e r e s t o f
th is w o r d
A re
C o d e in ?
Y e s
A d d r e s s b its
m a tc h e d ?
N o
Y e s
S to re d a ta
M a tc h
p r e v io u s ly s to r e d
d a ta ?
The output of the VT pin is high only when the
transmission is valid. Otherwise it is always low.
N o
Y e s
Output type
N o
The data outputs follow the encoders during a
valid transmission and are then latched in
this state until the next valid transmission
occurs.
2 tim e s
o f c h e c k in g
c o m p le te d ?
Y e s
L a tc h /M o m e n ta ry
d a ta to o u tp u t &
a c tiv a te V T
N o
A d d re s s o r
d a ta e rro r ?
Y e s
The oscillator is disabled in the standby state
and activated as long as a logic ²high² signal is
applied to the DIN pin. i.e., the DIN pin should
be kept ²low² if there is no signal input.
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December 13, 1999
312 Series of Decoders
Decoder timing
E n c o d e r
T r a n s m is s io n
E n a b le
< 1 w o rd
E n c o d e r
D a ta O u t
T r a n s m itte d
C o n tin u o u s ly
3 w o rd s
3 w o rd s
2 w o rd s
D e c o d e r V T
c h e c k
c h e c k
2
M o m e n ta ry
D a ta O u t
1 4
c lo c k s
1 4
2
1 /2 c lo c k p e r io d
c lo c k s
1 /2 c lo c k p e r io d
L a tc h e d
D a ta O u t
Encoder/Decoder cross reference tables
Package
Part No.
Data Pins
Address Pins
VT
HT6030
0
12
Ö
HT6032
2
10
Ö
HT6034
4
8
Ö
Pair Encoder
Encoder
Decoder
DIP
SOP
DIP
SOP
HT6010
18, 20
20
18
20
HT6010
18, 20
20
18
20
HT6012
18
20
18
20
HT6010
18, 20
20
HT6014
18
20
18
20
Address/Data sequence
The following table describes the position of the address/data sequence for various models of the 312 series of decoders. A correct device should be selected according to the requirements of individual address
and data.
Part No.
Address/Data Bits
0
1
2
3
4
5
6
7
8
9
10
11
HT6030
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
HT6032
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
D10
D11
HT6034
A0
A1
A2
A3
A4
A5
A6
A7
D8
D9
D10
D11
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December 13, 1999
312 Series of Decoders
Oscillator frequency vs supply voltage
fO S C
(S c a le )
R
2 .0 0
1 .7 5
O S C
(9 )
6 2 k
1 .5 0
1 .2 5
9 1 k
(1 0 0 k H z ) 1 .0 0
0 .7 5
1 8 0 k
0 .5
2 7 0 k
3 9 0 k
5 6 0 k
8 2 0 k
2 M
0 .2 5
2 .4
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
V
D D
(V D C )
The recommended oscillator frequency is fOSCD (decoder) @ 33 fOSCE (encoder)
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December 13, 1999
312 Series of Decoders
Application Circuits
R e c e iv e r C ir c u it
R e c e iv e r C ir c u it
V
1
2
3
4
5
A 0
V D D
A 1
V T
A 2
O S C 2
A 3
O S C 1
A 4
D IN
1 8
1
1 7
2
1 6
3
1 5
R
O S C
4
A 0
V D D
A 1
V T
A 2
O S C 2
A 3
O S C 1
A 4
D IN
A 5
D 1 1
A 6
D 1 0
1 7
1 6
1 5
A 1 1
6
A 6
A 1 0
1 2
7
A 7
A 9
1 1
8
A 7
D 9 1 1
A 8
1 0
9
V S S
D 8 1 0
7
8
V S S
H T 6 0 3 0
R
O S C
1 4
5
1 3
A 5
D D
1 8
1 4
6
9
V
D D
1 3
1 2
H T 6 0 3 4
Note: Typical infrared receiver: PIC-12043T/PIC-12043S (KODESHI CORP.)
or LTM9052 (LITEON CORP.)
Typical RF receiver: JR-200 (JUWA CORP.)
RE-99 (MING MICROSYSTEM, U.S.A.)
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December 13, 1999
312 Series of Decoders
Holtek Semiconductor Inc. (Headquarters)
No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C.
Tel: 886-3-563-1999
Fax: 886-3-563-1189
Holtek Semiconductor Inc. (Taipei Office)
5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C.
Tel: 886-2-2782-9635
Fax: 886-2-2782-9636
Fax: 886-2-2782-7128 (International sales hotline)
Holtek Semiconductor (Hong Kong) Ltd.
RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong
Tel: 852-2-745-8288
Fax: 852-2-742-8657
Copyright Ó 1999 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek
assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are
used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications
will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior
notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
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December 13, 1999