TI SNJ54LVC14AFK

SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCAS285X – MARCH 1993 – REVISED JULY 2005
FEATURES
2
14
13
3
12
4
11
5
10
6
9
7
8
SN74LVC14A . . . RGY PACKAGE
(TOP VIEW)
VCC
6A
6Y
5A
5Y
4A
4Y
1Y
2A
2Y
3A
3Y
14
1Y
1A
NC
VCC
6A
1
SN54LVC14A . . . FK PACKAGE
(TOP VIEW)
2
13 6A
3
4
12 6Y
2A
NC
2Y
NC
3A
11 5A
10 5Y
5
6
9 4A
7
8
4
3
2 1 20 19
18
5
6
17
16
7
8
15
14
9 10 11 12 13
6Y
NC
5A
NC
5Y
3Y
GND
NC
4Y
4A
1
•
VCC
1A
1Y
2A
2Y
3A
3Y
GND
•
4Y
SN54LVC14A . . . J OR W PACKAGE
SN74LVC14A . . . D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)
Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
1A
•
•
•
•
Operate From 1.65 V to 3.6 V
Specified From –40°C to 85°C,
–40°C to 125°C, and –55°C to 125°C
Inputs Accept Voltages to 5.5 V
Max tpd of 6.4 ns at 3.3 V
Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
GND
•
•
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
The SN54LVC14A hex Schmitt-trigger inverter is designed for 2.7-V to 3.6-V VCC operation, and the
SN74LVC14A hex Schmitt-trigger inverter is designed for 1.65-V to 3.6-V VCC operation.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
QFN – RGY
SOIC – D
–40°C to 125°C
(1)
Reel of 1000
SN74LVC14ARGYR
Tube of 50
SN74LVC14AD
Reel of 2500
SN74LVC14ADR
TOP-SIDE
MARKING
LC14A
LVC14A
Reel of 250
SN74LVC14ADT
SOP – NS
Reel of 2000
SN74LVC14ANSR
LVC14A
SSOP – DB
Reel of 2000
SN74LVC14ADBR
LC14A
Tube of 90
SN74LVC14APW
Reel of 2000
SN74LVC14APWR
Reel of 250
SN74LVC14APWT
TVSOP – DGV
Reel of 2000
SN74LVC14ADGVR
LC14A
CDIP – J
Tube of 25
SNJ54LVC14AJ
SNJ54LVC14AJ
CFP – W
Tube of 150
SNJ54LVC14AW
SNJ54LVC14AW
LCCC – FK
Tube of 55
SNJ54LVC14AFK
SNJ54LVC14AFK
TSSOP – PW
–55°C to 125°C
ORDERABLE
PART NUMBER
LC14A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1993–2005, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCAS285X – MARCH 1993 – REVISED JULY 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The devices contain six independent inverters and perform the Boolean function Y = A.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
FUNCTION TABLE
(EACH INVERTER)
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram, each inverter (positive logic)
A
Absolute Maximum Ratings
Y
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range (2)
–0.5
6.5
V
–0.5
VCC + 0.5
range (2) (3)
UNIT
VO
Output voltage
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
Continuous current through VCC or GND
D package
(4)
86
DB package (4)
θJA
Package thermal impedance
DGV
Storage temperature range
Ptot
Power dissipation
(1)
(2)
(3)
(4)
(5)
(6)
(7)
2
96
package (4)
127
NS package (4)
76
PW package (4)
113
RGY
Tstg
package (5)
°C/W
47
–65
TA = –40°C to 125°C (6) (7)
V
150
°C
500
mW
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCC is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K.
For the DB, DGV, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K.
SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCAS285X – MARCH 1993 – REVISED JULY 2005
Recommended Operating Oonditions
(1)
SN54LVC14A
–55 TO 125°C
Operating
MIN
MAX
2
3.6
UNIT
VCC
Supply voltage
VI
Input voltage
0
5.5
V
VO
Output voltage
0
VCC
V
IOH
High-level output current
IOL
Low-level output current
(1)
Data retention only
1.5
VCC = 2.7 V
–12
VCC = 3 V
–24
VCC = 2.7 V
12
VCC = 3 V
24
V
mA
mA
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Recommended Operating Conditions (1)
SN74LVC14A
TA = 25°C
Operating
–40 TO 85°C
–40 TO 125°C
MIN
MAX
MIN
MAX
MIN
MAX
1.65
3.6
1.65
3.6
1.65
3.6
UNIT
VCC
Supply voltage
VI
Input voltage
0
5.5
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
IOH
IOL
(1)
High-level output current
Low-level output current
Data retention only
1.5
1.5
1.5
VCC = 1.65 V
–4
–4
VCC = 2.3 V
–8
–8
–8
VCC = 2.7 V
–12
–12
–12
VCC = 3 V
V
–4
–24
–24
–24
VCC = 1.65 V
4
4
4
VCC = 2.3 V
8
8
8
VCC = 2.7 V
12
12
12
VCC = 3 V
24
24
24
mA
mA
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCAS285X – MARCH 1993 – REVISED JULY 2005
Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
SN54LVC14A
PARAMETER
TEST CONDITIONS
VT+
Positive-going
threshold
VT–
Negative-going
threshold
∆VT
Hysteresis
(VT+– VT-)
IOH = –100 µA
VOH
VOL
II
ICC
∆ICC
Ci
(1)
4
TA = 25°C
VCC
–55 TO 125°C
UNIT
MIN
TYP MAX
2.7 V
0.8
2
3V
0.9
2
3.6 V
1.1
2
2.7 V
0.4
1.4
3V
0.6
1.5
3.6 V
0.8
1.7
2.7 V
0.3
1.1
3V
0.3
1.2
3.6 V
0.3
1.2
2.7 V to 3.6 V
V
V
VCC – 0.2
2.7 V
2.2
3V
2.4
IOH = –24 mA
3V
2.2
IOL = 100 µA
2.7 V to 3.6 V
IOL = 12 mA
2.7 V
0.4
IOL = 24 mA
3V
0.55
IOH = –12 mA
V
V
0.2
V
VI = 5.5 V or GND
3.6 V
±5
µA
VI = VCC or GND, IO = 0
3.6 V
10
µA
2.7 V to 3.6 V
500
µA
One input at VCC – 0.6 V, Other inputs at VCC or GND
VI = VCC or GND
3.3 V
5 (1)
pF
SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCAS285X – MARCH 1993 – REVISED JULY 2005
Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
SN74LVC14A
PARAMETER
TEST CONDITIONS
VT+
Positive-going
threshold
VT–
Negative-going
threshold
∆VT
Hysteresis
(VT+– VT-)
VCC
VOH
–40 TO 125°C
TYP MAX
MIN MAX
1.65 V
0.4
1.3
0.4
1.3
0.4
1.3
1.95 V
0.6
1.5
0.6
1.5
0.6
1.5
2.3 V
0.8
1.7
0.8
1.7
0.8
1.7
2.5 V
0.8
1.7
0.8
1.7
0.8
1.7
2.7 V
0.8
2
0.8
2
0.8
2
3V
0.9
2
0.9
2
0.9
2
3.6 V
1.1
2
1.1
2
1.1
2
1.65 V
0.15
0.85
0.15
0.85
0.15
0.85
1.95 V
0.25
0.95
0.25
0.95
0.25
0.95
2.3 V
0.4
1.2
0.4
1.2
0.4
1.2
2.5 V
0.4
1.2
0.4
1.2
0.4
1.2
2.7 V
0.4
1.4
0.4
1.4
0.4
1.4
3V
0.6
1.5
0.6
1.5
0.6
1.5
3.6 V
0.8
1.7
0.8
1.7
0.8
1.7
1.65 V
0.1
1.15
0.1
1.15
0.1
1.15
1.95 V
0.15
1.25
0.15
1.25
0.15
1.25
2.3 V
0.25
1.3
0.25
1.3
0.25
1.3
2.5 V
0.25
1.3
0.25
1.3
0.25
1.3
2.7 V
0.3
1.1
0.3
1.1
0.3
1.1
3V
0.3
1.2
0.3
1.2
0.3
1.2
0.3
1.2
0.3
1.2
0.3
1.2
1.65 V to 3.6 V
VCC – 0.2
VCC – 0.2
VCC – 0.3
1.65 V
1.29
1.2
1.05
IOH = –8 mA
2.3 V
1.9
1.7
1.65
2.7 V
2.2
2.2
2.05
3V
2.4
2.4
2.25
IOH = –24 mA
3V
2.3
IOL = 100 µA
1.65 V to 3.6 V
0.1
0.2
IOL = 4 mA
1.65 V
0.24
0.45
0.6
IOL = 8 mA
2.3 V
0.3
0.7
0.75
IOL = 12 mA
2.7 V
0.4
0.4
0.6
IOL = 24 mA
3V
0.55
0.55
0.8
2.2
UNIT
MIN MAX
IOH = –4 mA
IOH = –12 mA
VOL
–40 TO 85°C
MIN
3.6 V
IOH = –100 µA
TA = 25°C
V
V
V
V
2
0.3
V
VI = 5.5 V or GND
3.6 V
±1
±5
±20
µA
ICC
VI = VCC or GND, IO = 0
3.6 V
1
10
40
µA
∆ICC
One input at
VCC – 0.6 V,
Other inputs at
VCC or GND
500
500
5000
µA
II
Ci
VI = VCC or GND
2.7 V to 3.6 V
3.3 V
5
pF
5
SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCAS285X – MARCH 1993 – REVISED JULY 2005
Switching Characteristics
over operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN54LVC14A
FROM
(INPUT)
PARAMETER
TO
(OUTPUT)
VCC
–55 TO 125°C
MIN
tpd
A
2.7 V
Y
7.5
3.3 V ± 0.3 V
1
UNIT
MAX
6.4
ns
Switching Characteristics
over operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN74LVC14A
PARAMETER
tpd
FROM
(INPUT)
A
TO
(OUTPUT)
Y
VCC
–40 TO 85°C
–40 TO 125°C
TYP
MAX
MIN
MAX
MIN
MAX
1.8 V ± 0.15 V
1
5
10.5
1
11
1
13
2.5 V ± 0.2 V
1
3.4
7.3
1
7.8
1
10
2.7 V
1
3.6
7.3
1
7.5
1
9.5
3.3 V ± 0.3 V
1
3.2
6.2
1
6.4
1
8
3.3 V ± 0.3 V
tsk(o)
TA = 25°C
MIN
1
1
1.5
UNIT
ns
ns
Operating Characteristics
TA = 25°C
PARAMETER
Cpd
6
Power dissipation capacitance per inverter
TEST
CONDITIONS
f = 10 MHz
VCC
TYP
1.8 V
11
2.5 V
12
3.3 V
15
UNIT
pF
SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS
www.ti.com
SCAS285X – MARCH 1993 – REVISED JULY 2005
Parameter Measurement Information
VLOAD
S1
RL
From Output
Under Test
CL
(see Note A)
Open
GND
RL
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
VI
tr/tf
VCC
VCC
2.7 V
2.7 V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
VM
VLOAD
CL
RL
V∆
VCC/2
VCC/2
1.5 V
1.5 V
2 × VCC
2 × VCC
6V
6V
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tw
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
VOH
Output
VM
VOL
tPHL
VM
VM
0V
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VM
tPZL
tPHL
VM
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
VM
VOH - V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
15-May-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
5962-9761501Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9761501QCA
ACTIVE
CDIP
J
14
1
TBD
5962-9761501QDA
ACTIVE
CFP
W
14
1
TBD
5962-9761501V2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9761501VCA
ACTIVE
CDIP
J
14
1
TBD
5962-9761501VDA
ACTIVE
CFP
W
14
1
SN74LVC14AD
ACTIVE
SOIC
D
14
50
SN74LVC14ADBLE
OBSOLETE
SSOP
DB
14
SN74LVC14ADBR
ACTIVE
SSOP
DB
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADBRE4
ACTIVE
SSOP
DB
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADBRG4
ACTIVE
SSOP
DB
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADGVR
ACTIVE
TVSOP
DGV
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADGVRE4
ACTIVE
TVSOP
DGV
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADGVRG4
ACTIVE
TVSOP
DGV
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADRG3
PREVIEW
SOIC
D
14
2500
SN74LVC14ADRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADT
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADTE4
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ADTG4
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ANSR
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ANSRG4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14APW
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14APWE4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14APWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
A42
N / A for Pkg Type
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
TBD
A42
N / A for Pkg Type
Green (RoHS &
no Sb/Br)
CU NIPDAU
TBD
Addendum-Page 1
POST-PLATE N / A for Pkg Type
TBD
Call TI
Call TI
Level-1-260C-UNLIM
Call TI
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
15-May-2010
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74LVC14APWLE
OBSOLETE
TSSOP
PW
14
SN74LVC14APWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14APWRE4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14APWRG3
PREVIEW
TSSOP
PW
14
2000
SN74LVC14APWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14APWT
ACTIVE
TSSOP
PW
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14APWTE4
ACTIVE
TSSOP
PW
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14APWTG4
ACTIVE
TSSOP
PW
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVC14ARGYR
ACTIVE
VQFN
RGY
14
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN74LVC14ARGYRG4
ACTIVE
VQFN
RGY
14
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SNJ54LVC14AFK
ACTIVE
LCCC
FK
20
1
TBD
SNJ54LVC14AJ
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
SNJ54LVC14AW
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
TBD
TBD
Lead/Ball Finish
Call TI
Call TI
MSL Peak Temp (3)
Call TI
Call TI
POST-PLATE N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
15-May-2010
OTHER QUALIFIED VERSIONS OF SN54LVC14A, SN54LVC14A-SP, SN74LVC14A :
SN74LVC14A-Q1
• Automotive:
• Enhanced Product: SN74LVC14A-EP
NOTE: Qualified Version Definitions:
- Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Automotive
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Dec-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74LVC14ADBR
SSOP
DB
14
2000
330.0
16.4
8.2
6.6
2.5
12.0
16.0
Q1
SN74LVC14ADGVR
TVSOP
DGV
14
2000
330.0
12.4
6.8
4.0
1.6
8.0
12.0
Q1
SN74LVC14ADR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
SN74LVC14ADR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
SN74LVC14ANSR
SO
NS
14
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
SN74LVC14ARGYR
VQFN
RGY
14
3000
180.0
12.4
3.75
3.75
1.15
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Dec-2009
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74LVC14ADBR
SSOP
DB
14
2000
346.0
346.0
33.0
SN74LVC14ADGVR
TVSOP
DGV
14
2000
346.0
346.0
29.0
SN74LVC14ADR
SOIC
D
14
2500
346.0
346.0
33.0
SN74LVC14ADR
SOIC
D
14
2500
333.2
345.9
28.6
SN74LVC14ANSR
SO
NS
14
2000
346.0
346.0
33.0
SN74LVC14ARGYR
VQFN
RGY
14
3000
190.5
212.7
31.8
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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