TRS3253E www.ti.com SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 RS-232 TRANSCEIVER WITH SPLIT SUPPLY PIN FOR LOGIC SIDE Check for Samples: TRS3253E FEATURES 1 • • • • VL Pin for Compatibility With Mixed-Voltage Systems Down to 1.8 V on Logic Side Enhanced ESD Protection on RIN Inputs and DOUT Outputs – ±8 kV IEC 61000-4-2 Air-Gap Discharge – ±8 kV IEC 61000-4-2 Contact Discharge – ±15 kV Human-Body Model Low 300-μA Supply Current Specified 1000-kbps Data Rate Auto Powerdown Plus Feature APPLICATIONS Hand-Held Equipment PDAs Cell Phones Battery-Powered Equipment Data Cables 32 31 30 29 28 27 26 25 C2+ C2– V– DIN1 DIN2 INVALID DIN3 NC 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 NC DOUT2 DOUT3 RIN1 RIN2 RIN3 RIN4 RIN5 9 10 11 12 13 14 15 16 FORCEON ROUT5 ROUT4 ROUT3 ROUT2 ROUT1 VL NC • • • • • RSM PACKAGE (TOP VIEW) NC C1– V+ C1+ FORCEOFF VCC GND DOUT1 • NC – No internal connection DESCRIPTION/ORDERING INFORMATION The TRS3253E is a three-driver and five-receiver RS-232 interface device, with split supply pins for mixed-signal operations. All RS-232 inputs and outputs are protected to ±8 kV using the IEC 61000-4-2 Air-Gap Discharge method, ±8 kV using the IEC 61000-4-2 Contact Discharge method, and ±15 kV using the Human-Body Model. The charge pump requires only four small 0.1-μF capacitors for operation from a 3.3-V supply. The TRS3253E is capable of running at data rates up to 1000 kbps, while maintaining RS-232-compliant output levels. The TRS3253E has a unique VL pin that allows operation in mixed-logic voltage systems. Both driver in (DIN) and receiver out (ROUT) logic levels are pin programmable through the VL pin. This eliminates the need for additional voltage level shifter while interfacing with low-voltage microcontroller or UARTs. The TRS3253E is available in a space-saving QFN package (4 mm × 4 mm RSM). Auto-powerdown plus can be disabled when FORCEON and FORCEOFF are high. With auto-powerdown plus enabled, the device activates automatically when a valid signal is applied to any receiver or driver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V, or has been between –0.3 V and 0.3 V for less than 30 μs. INVALID is low (invalid data) if all receiver input voltages are between –0.3 V and 0.3 V for more than 30 μs. Refer to Figure 5 for receiver input levels. ORDERING INFORMATION TA –40°C to 85°C (1) (2) PACKAGE (1) (2) QFN – RSM ORDERABLE PART NUMBER TRS3253EIRSMR TOP-SIDE MARKING RS53EI Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008–2009, Texas Instruments Incorporated TRS3253E SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 www.ti.com FUNCTION TABLES abc Each Driver (1) INPUTS (1) OUTPUT DOUT DRIVER STATUS X Z Powered off Normal operation with auto-powerdown plus disabled DIN FORCEON FORCEOFF TIME ELAPSED SINCE LAST RIN OR DIN TRANSITION X X L L H H X H H H H X L L L H <30 s H H L H <30 s L L L H >30 s Z H L H >30 s Z Normal operation with auto-powerdown plus enabled Powered off by auto-powerdown plus feature H = high level, L = low level, X = irrelevant, Z = high impedance Each Receiver (1) INPUTS (1) 2 OUTPUTS RIN1–RIN5 FORCEOFF TIME ELAPSED SINCE LAST RIN OR DIN TRANSITION ROUT1-ROUT5 X L X Z L H <30 s H H H <30 s L Open H <30 s H RECEIVER STATUS Powered off Normal operation with auto-powerdown plus disabled/enabled H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E TRS3253E www.ti.com SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 FUNCTIONAL BLOCK DIAGRAM DIN1 DIN2 DIN3 FORCEOFF 4 25 DOUT1 5 23 DOUT2 7 22 DOUT3 28 6 Auto-Powerdown Plus INVALID 9 FORCEON ROUT1 ROUT2 14 21 RIN1 13 20 RIN2 12 19 ROUT3 ROUT4 ROUT5 RIN3 18 11 RIN4 10 17 RIN5 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E 3 TRS3253E SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 www.ti.com TERMINAL FUNCTIONS TERMINAL NAME RSM C1+, C2+ 29, 1 V+ 30 DESCRIPTION Positive terminal of the voltage-doubler charge-pump capacitor 5.5-V supply generated by the charge pump C1–, C2- 31, 2 INVALID 6 Invalid Output Pin V– 3 –5.5-V supply generated by the charge pump DIN1 DIN2 DIN3 4 5 7 Driver inputs ROUT5 ROUT1 10, 11, 12, 13, 14 VL 15 Negative terminal of the voltage-doubler charge-pump capacitor Receiver outputs. Swing between 0 and VL. Logic-level supply. All CMOS inputs and outputs are referenced to this supply. 17, 18, 19, 20, 21 RS-232 receiver inputs DOUT3 DOUT2 DOUT1 22 23 25 RS-232 driver outputs GND 26 Ground VCC 27 3-V to 5.5-V supply voltage FORCEOFF 28 Powerdown Control input (Refer to Truth Table) FORCEON 9 Powerdown Control input (Refer to Truth Table) RIN5-RIN1 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC to GND –0.3 6 V VL to GND –0.3 VCC + 0.3 V V+ to GND –0.3 7 V V– to GND 0.3 –7 V 13 V V+ + |V–| (2) VI Input voltage VO Output voltage Continuous power dissipation TJ Junction temperature Tstg Storage temperature range (1) (2) 4 DIN, FORCEOFF to GND, FORCEON to GND –0.3 RIN to GND 6 ±25 DOUT to GND ±13.2 ROUT –0.3 TA = 70°C, 32-pin RSM (derate 7 mW/°C above 70°C) –65 VL + 0.3 UNIT V V TBD mW 150 °C 150 °C Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. V+ and V– can have maximum magnitudes of 7 V, but their absolute difference cannot exceed 13 V. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E TRS3253E www.ti.com SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 RECOMMENDED OPERATING CONDITIONS MIN MAX VCC Supply voltage 3 5.5 V VL Supply voltage 1.65 VCC V Input logic threshold low Input logic threshold high DIN, FORCEOFF, FORCEON DIN, FORCEOFF, FORCEON Operating temperature VL = 3 V or 5.5 V 0.8 VL = 2.3 V 0.6 VL = 1.65 V 0.5 UNIT V VL = 5.5 V 2.4 VL = 3 V 2.0 VL = 2.7 V 1.4 VL = 1.95 V 1.25 TRS3253EIRSMR –40 85 °C –25 25 V Receiver input voltage V ELECTRICAL CHARACTERISTICS (1) over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%) (unless otherwise noted) PARAMETER II ICC (1) (2) Input leakage current Supply current (TA = 25°C) TEST CONDITIONS FORCEOFF, FORCEON MIN TYP (2) MAX ±0.01 ±1 μA 0.5 1 mA Auto-powerdown plus disabled No load, FORCEOFF and FORCEON at VCC Powered off No load, FORCEOFF at GND 1 10 Auto-powerdown plus enabled No load, FORCEOFF at VCC, FORCEON at GND, All RIN are open or grounded 1 10 UNIT μA Testing supply conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.15 V; C1–C4 = 0.22 μF at VCC = 3.3 V ± 0.3 V; and C1 = 0.047 μF and C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. ESD PROTECTION PARAMETER TEST CONDITIONS Human-Body Model RIN, DOUT TYP UNIT ±15 IEC 61000-4-2 Air-Gap Discharge ±8 IEC 61000-4-2 Contact Discharge ±8 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E kV 5 TRS3253E SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 www.ti.com RECEIVER SECTION Electrical Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER TEST CONDITIONS Ioff Output leakage current ROUT, receivers disabled VOL Output voltage low IOUT = 1.6 mA VOH Output voltage high IOUT = –1 mA VIT– Input threshold low TA = 25°C VIT+ Input threshold high TA = 25°C Vhys Input hysteresis Input resistance (1) MIN TYP (1) MAX UNIT ±0.05 ±10 μA 0.4 V VL – 0.6 VL – 0.1 VL = 5 V 0.8 1.2 VL = 3.3 V 0.6 1.5 V V VL = 5 V 1.8 2.4 VL = 3.3 V 1.5 2.4 0.5 TA = 25°C 3 5 V V 7 kΩ Typical values are at VCC = VL = 3.3 V, TA = 25°C Switching Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER tPHL Receiver propagation delay tPLH TEST CONDITIONS Receiver input to receiver output, CL = 150 pF TYP (1) 0.15 0.15 UNIT μs tPHL – tPLH Receiver skew 50 ns ten Receiver output enable time From FORCEOFF 200 ns tdis Receiver output disable time From FORCEOFF 200 ns (1) 6 Typical values are at VCC = VL = 3.3 V, TA = 25°C. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E TRS3253E www.ti.com SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 DRIVER SECTION Electrical Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER TEST CONDITIONS VOH Output voltage swing All driver outputs loaded with 3 kΩ to ground, VCC= 3.1V to 5.5V rO Output resistance VCC = V+ = V– = 0, Driver output = ±2 V IOS Output short-circuit current VT_OUT = 0 IOZ Output leakage current MIN TYP (1) ±5 ±5.4 V 300 10M Ω VT_OUT = ±12 V, FORCEOFF = GND, VCC = 3 V to 3.6 V VT_OUT = ±12 V, FORCEOFF = GND, VCC = 4.5 V to 5.5 V Driver input hysteresis Input leakage current (1) DIN, FORCEOFF, FORCEON ±0.01 MAX UNIT ±60 mA ±25 μA 0.5 V ±1 μA Typical values are at VCC = VL = 3.3 V, TA = 25°C Timing Requirements over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER |tPHL – tPLH| Maximum data rate RL = 3 kΩ, CL = 200 pF, One driver switching Time-to-exit powerdown |VT_OUT| > 3.7 V TYP (1) MAX 1000 μs 100 VCC = 3.3 V, TA = 25°C, RL = 3 kΩ to 7 kΩ, Measured from 3 V to –3 V or –3 V to 3 V CL = 150 pF to 1000 pF 15 UNIT kbps 100 Driver skew (2) Transition-region slew rate (1) (2) MIN ns 150 V/μs Typical values are at VCC = VL = 3.3 V, TA = 25°C. Driver skew is measured at the driver zero crosspoint. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E 7 TRS3253E SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 www.ti.com AUTO-POWERDOWN SECTION Electrical Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6) PARAMETER TEST CONDITIONS MIN VIT+(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VL VIT–(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VL –2.7 VT(invalid) Receiver input threshold for INVALID low-level output voltage FORCEON = GND, FORCEOFF = VL –0.3 VOH INVALID high-level output voltage IOH = -1 mA, FORCEON = GND, FORCEOFF = VL VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEON = GND, FORCEOFF = VL MAX UNIT 2.7 V V 0.3 V VL – 0.6 V 0.4 V Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6) PARAMETER MIN TYP (1) MAX UNIT tvalid Propagation delay time, low- to high-level output 0.1 μs tinvalid Propagation delay time, high- to low-level output 50 μs ten Supply enable time 25 μs tdis Receiver or driver edge to auto-powerdown plus (1) 8 15 30 60 s All typical values are at VCC = VL = 3.3 V and TA = 25°C. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E TRS3253E www.ti.com SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 APPLICATION INFORMATION C1+ + C2 C4 - V+ C2+ C2- VCC V- - GND + C3† + - + CBYPASS - = 0.1 μF C1 C1RIN1 FORCEON AutoPowerdown Plus RIN2 RS-232 Inputs + RIN3 RIN4 FORCEOFF RIN5 INVALID DOUT1 RS-232 Outputs DOUT2 ROUT1 5 kΩ ROUT2 DOUT3 5 kΩ DIN3 ROUT3 Logic Outputs 5 kΩ Logic Inputs DIN2 ROUT4 5 kΩ ROUT5 DIN1 5 kΩ † C3 can be connected to VCC or GND. NOTES: A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. VCC vs CAPACITOR VALUES VCC C1 C2, C3, and C4 3.3 V ± 0.3 V 5 V ± 0.5 V 3 V to 5.5 V 0.1 μF 0.047 μF 0.1 μF 0.1 μF 0.33 μF 0.47 μF Figure 1. Typical Operating Circuit and Capacitor Values Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E 9 TRS3253E SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 www.ti.com PARAMETER MEASUREMENT INFORMATION A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. 3V Generator (see Note B) Input RS-232 Output 50 Ω RL tTHL CL (see Note A) 3V FORCEOFF TEST CIRCUIT 0V tTLH 3V 3V Output −3 V −3 V 6V SR(tr) + t THL or tTLH VOH VOL VOLTAGE WAVEFORMS Figure 2. Driver Slew Rate C. CL includes probe and jig capacitance. D. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 1.5 V 1.5 V 0V CL (see Note A) tPLH tPHL VOH 3V FORCEOFF 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS Figure 3. Driver Pulse Skew E. CL includes probe and jig capacitance. F. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. 3 V or 0 V FORCEON Input 1.5 V 1.5 V 3V −3 V Output Generator (see Note B) tPHL 50 Ω 3V FORCEOFF tPLH CL (see Note A) VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS Figure 4. Receiver Propagation Delay Times G. 10 CL includes probe and jig capacitance. H. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. I. tPLZ and tPHZ are the same as tdis. J. tPZL and tPZH are the same as ten. Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E TRS3253E www.ti.com SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 PARAMETER MEASUREMENT INFORMATION (continued) 3V Input VCC 3 V or 0 V FORCEON GND 1.5 V 0V S1 tPHZ (S1 at GND) RL 3 V or 0 V 1.5 V tPZH VOH Output 50% Output CL (see Note A) FORCEOFF Generator (see Note B) 0.3 V tPZL (S1 at VCC) tPLZ (S1 at VCC) 50 Ω 0.3 V Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS Figure 5. Receiver Enable and Disable Times Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E 11 TRS3253E SLLS850B – JANUARY 2008 – REVISED NOVEMBER 2009 www.ti.com ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ PARAMETER MEASUREMENT INFORMATION (continued) Valid RS-232 Level, INVALID High ROUT Generator (see Note B) 2.7 V 50 Ω Indeterminate 0.3 V 0V −0.3 V Indeterminate Autopowerdown Plus INVALID −2.7 V CL = 30 pF (see Note A) Valid RS-232 Level, INVALID High † FORCEOFF FORCEON If Signal Remains Within This Region For More Than 30 µs, INVALID Is Low† DIN DOUT Auto-powerdown plus disables drivers and reduces supply current to 1 µA. TEST CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 5 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Receiver Input 3V 2.7 V 0V 0V −2.7 V −3 V tinvalid tvalid INVALID Output 50% VCC 50% 0V 3 V to 5 V Driver Input 50% 50% 0V ≈5.5 V Driver Output ≈ −5.5 V tdis tdis ten ten V+ Supply Voltages V+ V+ −0.3 V V− +0.3 V V− V− Voltage Waveforms and Timing Diagrams Figure 6. INVALID Propagation-Delay Times and Supply-Enabling Time 12 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated Product Folder Link(s): TRS3253E PACKAGE OPTION ADDENDUM www.ti.com 8-Dec-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing TRS3253EIRSMR ACTIVE VQFN RSM Pins Package Eco Plan (2) Qty 32 3000 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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