Advanced Analog Technology, Inc. AAT1100 Product information presented is current as of publication date. Details are subject to change without notice TRIPLE-CHANNEL PWM CONTROLLER Features General Description z Complete PWM Power Control Circuitry z Precision Reference：1.25V±1% (25 oC) z Low Operating Voltage：2.5V to 7.0V z Under-Voltage Lockout Protection z Totem Pole Output z Output Short Circuit Protection z Low Dissipation Current： The AAT1100 provides an integrated triple-channel pulse-width-modulation (PWM) solution for the power supply of DC-DC system; this device offers system engineer the flexibility to custom-make the power supply circuitry to a specific application. Each channel contains its own error amplifier, PWM comparator, dead–time control (DTC) and output driver. The under-voltage protection, oscillator, short circuit protection and voltage reference circuit are common features of the three channels. The AAT1100 contains two boost circuits (CH1, CH3) and a buck-boost circuit (CH2). DTC can be set to provide 0% to 100% dead-time through a divider network. Soft-Start can be implemented by paralleling the DTC resistor with a capacitor. Two DTC inputs are assigned for CH1, CH3 pair and CH2 individually, and DTC inputs can be used to control on / off operation. In addition, this device can operate from 2.5V to 7.0V supply voltages to achieve efficient operation in low power system. With a minimal number of external components, the AAT1100 offers a simple and cost effective solution. 2.5mA at 500 kHz and 50% Duty Cycle z Separate On / Off Control for CH1, CH3 Pair and CH2 (Refer to Function Table) z Dead Time Control：0 to 100% z Wide Operating Frequency：50 kHz to 1MHz z Minimized External Components Pin Configuration TOP VIEW IE2 1 16 OE3 OE 2 2 15 IE3 VDD 3 14 IE1 OUT2 4 13 OE 1 OUT3 5 12 OSC OUT1 6 11 DTC2 GND 7 10 DTC13 SCP 8 9 VREF (TSSOP-16 PACKAGE) – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 1 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Function Table Output Condition CH1 CH2 CH3 DTC13 > 0.3V, DTC2 > 0.3V ON ”High” ON ”Low” ON ”High” DTC13 > 0.3V, DTC2 < 0.2V ON ”High” OFF ”High” ON ”High” DTC13 < 0.2V, DTC2 > 0.3V OFF ”Low” ON ”Low” OFF ”Low” DTC13 < 0.2V, DTC2 < 0.2V OFF ”Low” OFF ”High” OFF ”Low” Pin Description Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name IE2 OE2 VDD OUT2 OUT3 OUT1 GND SCP VREF DTC13 DTC2 OSC OE1 IE1 IE3 OE3 I/O I I/O I O O O Description Inverting Input Terminal of Error Amplifier 2 (EA2) Output of Error Amplifier 2 (EA2) Supply Voltage Channel 2 Output Channel 3 Output Channel 1 Output Ground I Short Circuit Protection O Reference Voltage Output I Dead-Time Control of Channel 1, 3 (CH1, CH3) I Dead-Time Control of Channel 2 (CH2) I Frequency Setting Capacitor & Resistor Input I/O Output of Error Amplifier 1 (EA1) I Inverting Input Terminal of Error Amplifier 1 (EA1) I Inverting Input Terminal of Error Amplifier 3 (EA3) I/O Output of Error Amplifier 3 (EA3) – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 2 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Absolute Maximum Ratings Characteristics Supply Voltage Input Voltage (IE1, IE2, IE3, DTC13, DTC2) Output Voltage Symbol VDD VI VO VDD +0.3 IO − 41 / + 21 − 21 / + 41 CH1, CH3 CH2 Output Current Sink ( t w ≦ 2µs , Duty≦10%) Value 8 Unit V V VDD V mA mA +200 Output Peak Current Source ( t ≦ 2µs , Duty≦10%) w Iopeak − 200 Operating Temperature Range TC − 20 to + 85 o Tstorage − 45 to + 125 o Symbol VDD VI13 Min 2.5 Max 7.0 Unit V 0.95 1.55 V VI 2 VO 0.4 V 0 1.0 VDD Oscillator (OSC) Capacitance C OSC 10 1,800 pF Oscillator (OSC) Resistance (Note 1) R OSC 6 8 kΩ Oscillator (OSC) Frequency f OSC 50 1,000 kHz Output Current (CH1, CH3) I O13 − 40 / + 20 mA Output Current, (CHl, CH2) I O2 − 20 / + 40 mA Output Current of Error Amplifier 1, 2 and 3 (EA1, EA1, EA3) Operating Temperature I OE 60 µA 85 o Storage Temperature Range mA C C Recommended Operating Conditions Supply Voltage, VDD Input Voltage, IE1, IE3 Input Voltage, IE2 Output Voltage TC − 20 V C Note 1: The rise and fall times of oscillator wave form will be equal at OSC resistor ( R OSC ) =7 kΩ theoretically. – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 3 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Electrical Characteristics, VDD = 3.3V ; TC = 25 oC (Unless Otherwise Specified) Oscillator Parameter f OSC Oscillator Frequency Test Condition C OSC = 130pF, R OSC = 7 kΩ Min Typ Max Unit 400 500 600 kHz Oscillator Output Voltage at High VOSCH C OSC = 130pF, R OSC = 7 kΩ 0.95 1.00 1.05 V Oscillator Output Voltage at Low VOSCL C OSC = 130pF, R OSC = 7 kΩ 0.35 0.40 0.45 V f ∆V VDD = 2.5V to 7V, C OSC = 130pF, R OSC = 7 kΩ 1 2 % f ∆T (Note 2) 5 10 % Frequency Change with VDD Frequency Change with Temperature Oscillator Output Current I OSC − 180 − 200 − 220 Typ 2.3 µA Under-Voltage Protection Parameter Upper Threshold Voltage VUPH Min 2.2 Lower Threshold Voltage VUPL 2.0 2.1 2.2 V Hysteresis ( VUPH – VUPL ) VHYS 0.1 0.2 0.3 V Min 1.10 0.20 Typ 1.15 0.25 VR 0.8 1.5 1.8 V Vr 3 1.20 1.25 1.30 V I SCP − 1.4 − 2.0 − 2.6 µA Test Condition Short Circuit Protection Control Parameter Input Threshold Voltage Latch Reset Threshold Voltage Short Circuit Detect Threshold Voltage SCP Terminal Source Current Vr1 Vr 2 Test Condition CH1, CH3 CH2 Max Unit 2.4 V Max Unit 1.20 V 0.30 Note 2: The deviation is defined as the difference between the maximum and minimum values obtained over the recommended temperature range (-20 oC to 85 oC). – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 4 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Electrical Characteristics, VDD = 3.3V; TC = 25 oC (Unless Otherwise Specified) (Cont.) Reference Voltage Parameter Reference Voltage Short Circuit Output Current VREF I OS Input Voltage Regulation VRI Output Regulation Reference Voltage Change with Temperature − 30 mA I REF = −1mA , VDD = 2.5V to 7V 2 5 mV VRO I REF = −0.1mA to − 1mA 1 5 mV VR∆ I REF = −1mA (Note 3) 15 25 mV Typ Max Unit VIO Test Condition CH1,CH3, Unity Gain 15 mV I IB Input Bias Current VIR Input Voltage Range VREF = 0 Min Typ Max Unit 1.237 1.250 1.263 V − 10 EA (Error Amplifier) Parameter Input Offset Voltage Test Conditions I REF = −1mA Open-Loop Voltage Gain A VO Unity-Gain Bandwidth BW1 −2 CH1,CH3, VI13 = 0.95V to 1.55V CH2, VI 2 = 0.4V to 1.0V CH1, CH3 CH2 R OE = 200 kΩ Min ±10 ±20 ±10 ±20 1.55 1.0 0.95 0.4 nA V 60 dB 1 MHz VOS + ∆VI = +0.1V , I O = −60µA VOS − ∆VI = −0.1V , I O = 0.2mA Output Sink Current I OS + ∆VI = −0.1V , VO = 0.2V 0.2 1.0 mA Output Source Current I OS − ∆VI = +0.1V , VO = 1.2V − 60 − 100 µA CH2, Unity Gain, TC = 25 oC 678 700 722 CH2, Unity Gain 665 700 735 Output Voltage Swing Input Bias Voltage Vr 5 1.2 V 0.2 mV Note 3: The parameter VR∆ is defined as the difference between the maximum and minimum values obtained over the recommended temperature range (-20 oC to 85 oC). – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 5 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Electrical Characteristics, VDD = 3.3V; TC = 25 oC (Unless Otherwise Specified) (Cont.) Dead-Time Control Parameter Input Bias Current Input Threshold Voltage (DTC 13) Input Threshold Voltage (DTC2) Channel On / Off Threshold Voltage I BDT1/ 3 Test Condition VDTC13 = 0.35V to 1.05V I BDT 2 VDTC 2 = 0.35V to 1.05V Max Unit 200 nA ±2 ±20 nA 0.3 0.4 0.5 Duty = 100%, f OSC = 500kHz 0.9 1.0 1.1 V2 d 0 Duty = 0%, f OSC = 500kHz 0.3 0.4 0.5 V2 d100 Duty = 100%, f OSC = 500kHz 0.9 1.0 1.1 0.2 0.25 0.3 V13d 0 Duty = 0%, f OSC = 500kHz V13d100 Vr 4 Output Stage Parameter High-Level Output Voltage VOH Low-Level Output Voltage VOL Rise Time Fall Time Typ Test Condition I O = −20mA (CH2) Min Typ 2.90 3.05 I O = −40mA (CH1, CH3) 1.9 2.2 V V V Max Unit V I O = 20mA (CH1, CH3) 0.2 0.4 I O = 40mA (CH2) 0.3 0.6 t RISE C L = 1,000pF 130 ns t FALL C L = 1,000pF 50 ns Operating Current Parameter I DD−OFF Supply Current Min I DD−ON Test Condition Output ”OFF” State Min f OSC = 500 kHz, Duty = 50%, No Load Typ V Max Unit 2.5 4.0 mA 3.5 5.0 mA – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 6 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Block Diagram E N 13 OE1 L a tch OUT1 IE 1 V r e f = 1 .2 5V PW M C1 EN2 EA1 OE2 L a tch OUT2 IE 2 V r 5 = 0 .7 V PW M C2 EN 13 EA2 OE3 L a tch IE 3 O UT3 V R E F = 1 . 2 5V PW M C3 O SC EA3 V REF V VREF O SC REF VD D UVLO UVC UVCN D T C 2N L a tc h R SC P R VDD V r 5 = 0 .7 V 2µA V r 3 = 1 .2 5V Vr4 = D TC 13 GND UVC UVC E N 13 SC P 0 .2 5 V OE1 V r 1 = 1 .1 5V OE3 UVCN OE2 V r 2 = 0 . 2 5V DTC2 V r 4 = 0 .2 5 V UVCN EN2 Note: All voltage and current values in block diagram are nominal. – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 7 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Application Circuit V V DD L V p1 R R DD C OE1 C Vp1 D V DD Q OUT1 C IE 1 R V DD L V p3 Vp3 D OE3 R C R Q O UT3 C C IE 3 R A A T1100 V DD VN2 OE2 Q OUT2 C R C L IE 2 R V C Vn2 D R C R EF VREF V REF R D TC 13 DTC2 O SC R SC P C O SC R O SC C C GND SCP – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 8 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Timing Chart V U PH V DD V DD 1 .2 5V O E1 or O E3 V REF O S C + (N ote 4 ) DTC 13 V DD O E1 or O E3 O SC D TC 13 1 .0V Vr1 = 1.15V 0 .4V V D T C 13 VOH O U T 1 or OUT3 10 0 % o ff VOL V O ( reg ) R egula tion O utp u t 0V Vr 3 1.25V SCP t scp t scp (S h o rt C ircu it P r otect T im e)= 0 .6 25 * C scp .* 10 6 (sec) 0V T im in g C h a rt for C H 1 o r C H 3 N ote 4 : + O scilla to r w av e fo rm is illustrated as a tria ngle w a ve fo rm . H ow ever it is actu ally d eterm in ed b y tim e co nstan t o f tim in g resistor an d ca p acitor co n nected to O S C term in a l. – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 9 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Timing Chart VD D V U PH VD D 1 .2 5 V VREF DTC2 DTC2 OE2 O SC D T C 2N 1 .0 V DTC2N OE2 O S C + (N o te 4 ) D TC 2N 0 .4 V Vr 2 = 0.2 5V 0V OUT2 VO H 1 0 0 % o ff VO L R e g u la tio n O u tp u t 0V − V o(reg) Vr 3 1 .2 5 V SCP 0V t sc p t s c p (S h o r t C ir c u it P r o te c t T im e )= 0 .6 2 5 * C sc p .* 1 0 6 (s e c ) T im in g C h a r t fo r C H 2 – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 10 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Package Dimension 16-PIN TSSOP – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 11 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Package Dimension (Cont.) SYMBOLS DIMENSIONS IN MILLIMETERS DEMINSIONS IN INCHES MIN TYP MAX MIN TYP MAX A 1.05 1.10 1.20 0.041 0.043 0.047 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 ------ 1.00 1.05 ------ 0.039 0.041 b 0.20 0.25 0.28 0.008 0.010 0.011 C ------ 0.127 ------ ------ 0.005 ------ D 4.900 5.075 5.100 0.1930 0.1998 0.2000 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.170 0.173 0.177 e ------ 0.65 ------ ------ 0.026 ------ L 0.50 0.60 0.70 0.020 0.024 0.028 y ------ ------ 0.076 ------ ------ 0.003 θ 0 o 4 o 8 o 0 o 4 o 8o NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. LEAD FRAME MATERIAL: OLIN C7025/EFTEC 64T 3. DIMENSION “D” DOES NOT INCLUDE MOLD FLASH, TIE BAR BURRS AND GATE BURRS. MOLD FLASH, TIE BAR BURRS AND GATE BURRS SHALL NOT EXCEED 0.006” [0.15 MILLIMETERS] PER END. DIMENSION “E1” DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010” [0.25 MILLIMETERS] PER SIDE. 4. DIMENSION “b” DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.003” [0.08 MILLIMETERS] TOTAL IN EXCESS OF THE “b” DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND AN ADJACENT LEAD TO BE 0.0028” [0.07 MILLIMETERS]. 5. TOLERANCE: ± 0.010 [0.25 MILLIMETERS] UNLESS OTHERWISE SPECIFIED. 6. OTHERWISE DIMENSION FOLLOW ACCEPTABLE SPEC. 7. REFERENCE DOCUMENT: JEDEC SPEC MO-153. – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 12 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Tape and Reel – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 13 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Tape and Reel (Cont.) NOTE: 1. 2. 3. 4. 5. 6. 10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE ± 0.2 MILLIMETERS. CAMBER NOT TO EXCEED 1 MILLIMETER IN 100 MILLIMETERS. MATERIAL: ANTI-STATIC BLACK ADVANTEK POLYSTYRENE. A 0 AND B 0 MEASURED ON A PLANE 0.3 MILLIMETERS ABOVE THE BOTTOM OF THE POCKET. K 0 MEASURED FROM A PLANE ON THE INSIDE BOTTOM OF THE POCKET TO THE TOP SURFACE OF THE CARRIER. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE. Part Marking TSSOP16 Top Marking AAT1100 XXXXXX TSSOP16 Back Marking YYWW – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 14 of 15 V 1.0 Advanced Analog Technology, Inc. AAT1100 Ordering Information – 台灣類比科技股份有限公司 – – Advanced Analog Technology, Inc. – Page 15 of 15 V 1.0