ETC AN321

CUB
AN321
R
Austria Mikro Systeme International
0.6 µm CMOS
AN321 is an AND / NOR circuit providing the logical function Q = NOT (A.B.C+D.E+F).
Truth Table
A
B
C
L
X
L
X
X
Capacitance
D
E
F
Q
X
L
X
L
H
X
X
L
L
H
L
X
L
X
L
H
X
L
X
X
L
L
H
X
X
X
X
X
X
L
L
X
L
X
X
X
L
X
L
L
H
H
H
L
X
X
X
H
H
X
L
H
H
H
X
X
X
L
Ci (pF)
A
B
C
D
E
F
AN321
A
B
C
D
Q
E
0.062
0.062
0.068
0.053
0.058
0.047
F
Area
Power
1.08 mils2
3.87 µW / MHz
Delay [ns] = tpd.. = f(SL, L)
Output Slope [ns] = op_sl.. = f(L)
AC Characteristics :
Tj = 25°C
with SL = Input Slope [ns] ; L = Output Load [pF]
with L = Output Load [pF]
VDD = 3.3V
Typical Process
AC Characteristics
Characteristics
Symbol
Delay A to Q
SL = 0.1
SL = 2.0
L = 0.1
L = 0.7
L = 1.0
L = 0.1
L = 0.7
L = 1.0
tpdar
tpdaf
0.74
0.51
2.10
1.42
2.82
1.87
0.87
0.50
2.21
1.37
2.88
1.81
Delay B to Q
tpdbr
tpdbf
0.70
0.51
2.05
1.46
2.77
1.87
0.82
0.59
2.16
1.45
2.86
1.89
Delay C to Q
tpdcr
tpdcf
0.64
0.46
2.09
1.42
2.73
1.82
0.74
0.66
2.11
1.51
2.77
1.94
Delay D to Q
tpddr
tpddf
0.68
0.42
2.04
1.35
2.70
1.79
0.83
0.50
2.15
1.37
2.83
1.81
Delay E to Q
tpder
tpdef
0.62
0.40
2.02
1.34
2.67
1.76
0.78
0.62
2.11
1.47
2.81
1.90
Delay F to Q
tpdfr
tpdff
0.52
0.35
1.91
1.41
2.66
1.99
0.73
0.63
2.00
1.59
2.71
2.08
Output Slope A to Q
op_slar
op_slaf
1.66
1.33
5.78
3.98
7.95
5.25
1.73
1.41
5.85
3.96
7.85
5.27
Output Slope B to Q
op_slbr
op_slbf
1.52
1.33
5.62
3.97
7.77
5.18
1.66
1.47
5.76
4.01
7.87
5.28
Sept. 1996
- 14 -
Rev. N/C
CUB
AN321
R
Austria Mikro Systeme International
Characteristics
Symbol
Output Slope C to Q
0.6 µm CMOS
SL = 0.1
SL = 2.0
L = 0.1
L = 0.7
L = 1.0
L = 0.1
L = 0.7
L = 1.0
op_slcr
op_slcf
1.43
1.31
5.86
3.97
7.95
5.18
1.52
1.57
5.75
4.06
7.97
5.32
Output Slope D to Q
op_sldr
op_sldf
1.62
1.11
5.82
3.75
7.81
5.03
1.77
1.30
5.87
3.75
7.86
5.10
Output Slope E to Q
op_sler
op_slef
1.56
1.08
5.77
3.73
8.07
5.03
1.73
1.46
5.80
3.86
8.02
5.10
Output Slope F to Q
op_slfr
op_slff
1.58
1.02
5.85
3.90
7.98
5.40
1.85
1.32
5.83
4.00
7.85
5.47
Sept. 1996
- 15 -
Rev. N/C