ATA-120 20W Class D Single Channel Audio Amplifier FEATURES • • • • • • • • • • • • 1.0 GENERAL DESCRIPTION HIGH OUTPUT POWER CAPABILITY SINGLE SUPPLY (+7.5V to +24V) THD+N < 0.05% @ 1W, 8Ω HIGH EFFICIENCY, > 90% @ 4Ω, 20W LOW QUIESCENT CURRENT, 13mA LOW NOISE (190µV typ.) POP ELIMINATION AT STARTUP AND SHUTDOWN BUILT-IN THERMAL PROTECTION INTEGRATED SHORT CIRCUIT PROTECTION 180mΩ MOSFET SWITCHES MUTE / STANDBY MODE SMALL SMD PACKAGE IS BOTH LEAD-FREE (Pb) AND GREEN APPLICATIONS • • • • • The ATA-120 Class-D Audio Amplifier is a fully integrated monolithic audio amplifier that can provide audio power up to 20 watts @ 10% THD into a 4Ω speaker. The ATA-120 incorporates a single ended output structure with built-in short circuit and overtemperature protection. This low noise, high performance device delivers the excellent audio quality of a class A/B amplifier while still achieving class-D efficiency greater than 90%. ORDERING INFORMATION: Part Number * ATA-120 EB-120 Package Temperature SOIC8 -40°C to + 85°C Evaluation Board for the ATA-120 TELEVISIONS HOME AUDIO MINI-SYSTEMS FLAT PANEL MONITORS MULTIMEDIA SPEAKERS SURROUND SOUND DVD SYSTEMS IN_P - BOOST VDD IN_N + FET DRIVE ENABLE REGULATOR, CONTROL & PROTECTION POUT FET DRIVE AGND PGND Figure 1 - Block Diagram This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 1 of 13 ATA-120 Absolute Maximum Ratings [Note 1] SYMBOL PARAMETER VDD VBOOST VENABLE VOUT VIN_P VIN_N - Tj TLEADS TS MIN Supply Voltage Bootstrap Voltage Enable Voltage Output Switch Positive Input Negative Input Analog GND to Power GND Junction Temperature Lead Temperature Storage Temperature TYP VOUT-0.3 -0.3 -1 -1 -1 MAX UNIT 26 VOUT+6.5 6.0 VDD+1 VDD+1 VDD+1 V V V V V V -0.3 0.3 V -65 150 260 150 °C °C °C MAX UNIT 24 85 V °C MAX UNIT Note 1 – Operation above maximum ratings may damage the device. 1.1 Recommended Operating Conditions [Note 2] SYMBOL VDD TA PARAMETER MIN Supply Voltage Operating Temperature TYP 7.5 -40 Note 2 - Performance not guaranteed beyond recommended operating conditions. 1.2 Thermal Characteristics SYMBOL θJ-A θJ-C PARAMETER MIN TYP Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case [Note 3] 105 50 °C/W °C/W Note 3 – Solder pins directly to large copper surface areas to improve device cooling. 1.3 Electrical Characteristics [Note 4] SYMBOL PARAMETER CONDITION MIN TYP MAX UNIT Supply Current ISTBY IQ Standby Current Quiescent Current VENABLE = 0 130 13 µA mA 0.18 5 Ω A Output Drivers RDS-ON ISC Output MOSFET on Resistance Short Circuit Current Sourcing and Sinking Sourcing and Sinking 3 Inputs VIN IIN IN_P, IN_N Input Common Mode Voltage Range IN_P, IN_N Input Current VENABLE Enable Threshold Voltage IENABLE Enable Input Current 0 Rising signal voltage Falling signal voltage VENABLE = 5V 0.4 VDD 2 1 1.4 1.2 1 VDD-1.5 V 5 2.0 µA V µA Thermal Shutdown TSD TSD-HYS Thermal Shutdown Trip Point Thermal Shutdown Hysteresis TJ Rising 150 30 °C °C Note 4 – Performance based on circuit in Figure 3, VDD = 24V, VENABLE = 5V, TA = 25°C This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 2 of 13 ATA-120 1.4 Typical Operating Characteristics [Note 5] SYMBOL PARAMETER POUT Power Output THD+N Total Harmonic Distortion Plus Noise η Efficiency BW DNR SNR Maximum Power Bandwidth Dynamic Range Signal to Noise Ratio Noise Floor Power Supply Rejection PSR CONDITION THD+N = 10%, 4Ω Load THD+N = 10%, 8Ω Load POUT = 1 W, 4Ω Load POUT = 1 W, 8Ω Load POUT = 20 W, 4Ω Load POUT = 10 W, 8Ω Load A-Weighted A-Weighted, relative to 15W A-Weighted MIN TYP 20 10 0.1 0.05 90 93 20 91 92 190 47 MAX UNIT W W % % % % KHz dB dB µV dB Note 5 – Performance based on circuit of Figure 3, VDD = 24V, VENABLE = 5V, f = 1 KHz, TA = 25°C 2.0 PIN DESCRIPTION Pin No. 1 Pin Name IN_P 2 IN_N 3 4 5 AGND ENABLE BOOST 6 VDD 7 POUT 8 PGND Pin Function Amplifier Positive Input. IN_P is the positive side of the differential input to the amplifier. Use a resistive voltage divider to set the voltage at IN_P to VDD/2. See Figure 3. Amplifier Negative Input. IN_N is the negative side of the differential input to the amplifier. Drive the input signal and close the feedback loop at IN_N. See Figure 3. Analog Ground. Signal input ground. Connect AGND to PGND at one single point. Enable Input. Set ENABLE high to turn-on the amplifier; set it low to turn it off. High-Side MOSFET Bootstrap Input. A capacitor from BOOST to POUT supplies the gate drive current to the high-side of the MOSFET. Connect a 0.47µF capacitor from POUT to BOOST. Place a 6.2V zener diode from BOOST to POUT to prevent overstressing the internal circuitry. Power Supply Input. VDD is the drain of the high-side MOSFET switch and supplies the power to both the output stage and the ATA-120 internal control circuitry. In addition to the main bulk capacitor, bypass VDD to PGND with a 1µF X7R capacitor placed close to the IC’s VDD (pin 6) and PGND (pin 8). Switched Power Output. POUT is the output of the ATA-120. Connect the L-C filter between POUT and the output blocking capacitor. See Figure 3. Power Ground. Power stage ground. Connect PGND to AGND at one single point. This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 3 of 13 ATA-120 3.0 Functional Description The ATA-120 is a single-ended Class-D audio amplifier that converts analog audio input signals into PWM pulses. The pulses drive an internal high current output stage and, when filtered through an external L-C filter, reproduce the input signal across the load. Because of the switching Class-D output stage, power dissipation in the amplifier is drastically reduced compared to Class A, Class B or Class A/B amplifiers while maintaining high fidelity and low distortion. The amplifier uses a differential input to the modulator. IN_P is the positive input and IN_N is the negative input. The common mode voltage of the input is set to half the DC power supply input voltage (VDD/2) through the resistive voltage divider formed by R2 and R5. The input capacitor C3 couples the AC input signal into the amplifier while blocking the DC component. The output driver stage uses two 180 mΩ N-channel MOSFETs to deliver the pulses to the L-C output filter which in turn drives the load. When the output switches low, the bootstrap capacitor, C9, which is located between POUT and BOOST, is charged from VDD through internal circuitry inside the ATA-120. The gate of the upper MOSFET is driven from this voltage (higher than VDD but clamped to safe levels by zener diode D2). 3.1 Pop Elimination The DC-blocking capacitor, C38, allows only AC current to pass to the output load (speaker). To insure that the amplifier properly passes low frequency signals, the time constant of C38*RLOAD needs to be long. Typically the C11 capacitor charges over a long time period and would normally result in turn-on and/or turn-off “pops”. The ATA-120, however, includes internal circuitry that eliminates the turn-on and turn-off pops associated with this charging of the AC coupling capacitor. 3.2 Short Circuit/Overload Protection The ATA-120 has internal overload and short circuit protection. The currents in both the high-side and low-side MOSFETs are internally measured and if the current exceeds the 5A (typical) short circuit current limit on either MOSFET, both MOSFETs are placed in an open condition. After the short circuit condition is removed, the ATA-120 restarts with the same power up sequence that is used for normal starting to prevent a pop from occurring. 3.3 Mute/Enable Function The ENABLE input is an active high enable control. To enable the device, drive ENABLE with a 2.0V or greater voltage. To disable the amplifier, drive it below 0.4V. While the device is disabled, the VDD operating current is less than 130µA and the output MOSFETs are turned off. The ATA-120 requires approximately 500ms from the time that ENABLE is asserted (driven high) to when the amplifier arrives at normal operation. This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 4 of 13 ATA-120 4.0 Power Output Figure 2 shows the full-scale sine-wave output power as a function of Power Supply Voltage for 2, 3, 4, 6, and 8 Ohm loads. Output power is constrained for higher impedance loads by the maximum voltage limit of the ATA-120 and by the over-current protection limit for lower impedance loads. The minimum threshold for the overcurrent protection circuit is 3.0A (at 25 ºC) but the typical threshold is 5.0A. Solid lines depict typical output power capability of the ATA-120. Dashed lines depict the output power capability constrained to the minimum current specification of for the ATA-120. The output power curves assume proper thermal management of the power device’s internal dissipation. Since The IC’s thermal path is predominantly through the leadframe to the PC Board copper foil, a sufficient copper area must be connected to each lead in order to facilitate proper cooling. 10% THD Output Power vs Supply Voltage 24 22 10% THD Output Power (Watts) 20 3Ω 18 4Ω 16 14 6Ω 2Ω 12 10 8Ω 8 6 4 2 0 7 8 9 10 11 12 13 14 15 16 17 18 Power Supply Voltage (VDC) LEGEND IOUT (min) = 3.0A IOUT (typ) = 5.0A 19 20 21 22 RL=8Ω RL=6Ω RL=4Ω RL=3Ω RL=8Ω RL=6Ω RL=4Ω RL=3Ω Figure 2 – 10% THD Power Output vs. Power Supply Voltage 23 24 RL=2Ω RL=2Ω Note 6 : Sine-wave output power (<1% THD) is approximately 23% Lower. This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 5 of 13 ATA-120 5.0 Application Information The ATA-120 uses a minimum number of external components to complete a Class-D audio amplifier. The application circuit of Figure 3 matches the component identifiers used in this section. It is optimized for both a 24V power supply and a 1.5V RMS maximum input signal and should be suitable for most applications. If this circuit does not correspond to the requirements of the required application, the following sections show how to customize the amplifier circuitry. Figure 3 - Typical 20W Audio Amplifier Circuit 5.1 Setting the Voltage Gain The amplifier voltage gain is set by the combination of R1 and R3. The voltage gain sets the output voltage power for a given input signal voltage and is set by the following equation: AV = − R1 R3 Equation 1 The maximum output voltage is limited by the power supply. To achieve the maximum power out of the ATA-120 amplifier, set the gain such that the maximum AC input signal results in the maximum output voltage swing. This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 6 of 13 ATA-120 The maximum output voltage swing is ±VDD/2. For a given input signal voltage, where VIN(pk) is the peak input voltage, the maximum voltage gain is AV (max) = VDD 2 × V IN ( pk ) Equation 2 This voltage gain setting results in the peak output voltage approaching it’s maximum for the maximum input signal. In some cases the amplifier may be required to overdrive slightly, allowing the THD to increase at high power levels, and thus a higher gain than AV (max) may be required. 5.2 Setting the Switching Frequency The zero-signal switching frequency is a function of VDD, the capacitor C8 and the feedback resistor R1. Lower switching frequencies result in more inductor ripple, causing more quiescent output voltage ripple, increasing the output noise and distortion. Higher switching frequencies result in more power loss. The optimum frequency is between 600-700 kHz. Use the following steps, along with Figure 4, to select the appropriate timing capacitor, CINT that will result in a recommended operating frequency of approximately 700 kHz: 1. Choose the Power supply voltage (VDD) based on output power requirements and the selected speaker impedance. 2. Determine the voltage gain required to drive the amplifier to full output power. Gain = VDD Equation 3 2 × VIN-RMS × 2 3. The intersection of the VDD and Gain lines in Figure 4 will determine the CINT capacitor value. 4. Set the value of R1 to the required gain times R3 (fixed at 10KΩ). 5.2.1 EXAMPLE 1: The reference design of Figure 3 uses a 1.0 VRMS input signal to drive a 4Ω speaker to 15 watts of sine wave output (~20 watts @ 10% THD) using a 24 VDC power supply. 5. Select 24 V on the VDD scale (red line). 6. The required gain is: Gain = 24V 2 × VIN × 2 = 8.5 V/V Equation 4 3. Since we used a more common 82KΩ feedback resistor in the design, we’ll follow the 8.2 V/V line (red line) across on the gain scale in the graph. Find where it intersects the voltage line. Choose the closest capacitor line, CINT = 4.7 nF. 4. Multiply the voltage gain (not 8.5 but 8.2 based on the pre-selected resistor) by R3 (fixed at 10KΩ) to get the proper value of the R1 gain-setting resistor, 82K. 5.2.2 EXAMPLE 2: A design with a 0.5 VRMS input signal is required to drive a 2Ω speaker to 9 watts of sine wave output (12 watts @ 10% THD) using a 14 VDC power supply. 1. Select 14 V on the VDD scale (blue line). 2. The required gain is: Gain = 14V 2 × VIN × 2 = 9.9 V/V . Equation 5 3. Follow this value (blue line) across on the gain scale in the graph. Find where it intersects the voltage line. Choose the closest capacitor line, CINT = 1.8 nF. This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 7 of 13 ATA-120 4. Multiply the voltage gain (9.9) by R3 (fixed at 10KΩ) to get the value of the R1 gain-setting resistor, 99K. 560 pF 680 pF 820 pF 1.0 nF 1.2 nF 1.5 nF 1.8 nF 2.2 nF 2.7 nF 3.3 nF 3.9 nF 4.7 nF 5.6 nF 6.8 nF 8.2 nF 10 nF 12 nF 15 nF 18 nF 22 nF 7 8 Value of CINT (curve labels) Gain (V/V) Capacitor Selection Graph for Fsw = 700 kHz 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 VDD (volts) Figure 4 – Determining the Timing Capacitor, CINT 5.3 Choosing the output L-C Filter The Inductor-Capacitor (L-C) filter converts the pulse train at POUT to the output voltage that drives the speaker. The characteristic frequency of the L-C filter (f0) needs to be high enough to allow high frequency audio to pass to the output, yet low enough to filter out high frequency products of the pulses from POUT. The characteristic frequency of the L-C filter is: f0 = 1 Equation 6 2π L2 × C11 For the circuit of Figure 3, typical values for the L-C filter are 10µH for the inductor (L2) and 470nF for the capacitor (C11) resulting in a characteristic frequency of 73 kHz. The voltage ripple at the output is approximated by the equation: f VRIPPLE ≈ VDD × 0 f sw Equation 7 The quality factor (Q) of the L-C filter is important. If this is too low, passband frequency may be rolled off, if this is too high, then peaking may occur at high signal frequencies reducing the passband flatness. The circuit Q is set by the speaker load resistance (typically 4Ω or 8Ω) and both the L and C as illustrated by the following equation: This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 8 of 13 ATA-120 Q= R LOAD C11 = R LOAD × 2 × π × f 0 × L2 L2 Equation 8 where f0 is the characteristic frequency in Hz. The use of an L-C filter with a Q between 0.7 and 1 gives the smoothest performance. The actual output ripple and noise is affected by the type of inductor and capacitor used in the L-C filter. Use a film capacitor for C11 and an inductor for L2 with sufficient power handling capability to supply the output current to the load. The inductor should exhibit soft saturation characteristics. If the inductor exhibits hard saturation, it should operate well below the saturation current. Gapped ferrite, MPP, Powdered Iron, or similar type toroidal cores are recommended. If open or shielded bobbin ferrite cores are used for multi-channel designs, make sure that the start windings of each inductor line up (all starts going toward POUT pin, or all starts going toward the output) to prevent crosstalk or other channel-to-channel interference. 5.4 Output Coupling Capacitor The combination of the coupling capacitor, C38, and the load resistance results in a first-order high-pass filter. The capacitor, C38, serves to block DC voltages and thus passes only the amplified AC signal from the L-C filter to the load. The value of C38 should be selected such that the output corner frequency (fOUT) is at or below the lowest required audio frequency. The output corner frequency, fOUT, (-3dB point) can be approximated as: f OUT = 1 Equation 9 2 × π × R LOAD × C 38 The output coupling capacitor carries the full load current, so a low ESR capacitor type should be chosen such that its ripple current rating is greater than the maximum AC load current. Low ESR aluminum electrolytic capacitors are recommended. 5.5 Input Coupling Capacitor The input coupling capacitor, C3, is used to pass only the AC signal at the input. In a typical system application, the source input signal is typically centered around the circuit ground, while the ATA-120 input is at half the power supply voltage (VDD/2). The input coupling capacitor transmits the AC signal from the source to the ATA-120 while blocking the DC voltage. Choose an input coupling capacitor such that the corner frequency (fIN) is less than the passband frequency. The corner frequency is: f IN = 5.6 1 2 × π × R3 × C 3 Equation 10 Power Source For maximum output power, the amplifier circuit requires a regulated external power source to supply the power to the amplifier. The higher the power supply voltage, the more power can be delivered to a given load resistance. However, if the power source voltage exceeds the maximum operating voltage of 26V, the ATA-120 could sustain damage. The power supply rejection of the ATA-120 is good, however noise at the power supply can get to the output, so care must be taken to minimize power supply noise within the pass-band frequencies. Bypass the power supply with a large capacitor (typically aluminum electrolytic) along with a smaller 1µF ceramic capacitor at the ATA-120 VDD supply pins. 5.7 Circuit Layout The circuit layout is critical for optimum performance and low output distortion and noise. Place the following components as close to the ATA-120 as possible: Power supply bypass, C7. C7 carries the transient current for the switching input stage. To prevent overstressing of the ATA-120 and excessive noise at the output, place the power supply bypass capacitor as close to pins 6 (VDD) and 8 (PGND) as possible. This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 9 of 13 ATA-120 Output Catch Diode, D1. D1 caries the current over the dead-time while both MOSFET switches are off. Place D1 between pins 7 (POUT) and 8 (PGND) to prevent the voltage at POUT from swinging excessively below ground. Input Modulator Capacitor, C8. C8 is used to set the amplifier switching frequency and is typically on the order of a few nanofarads. Place C8 as close to the differential input pins (1 and 2) as possible to reduce distortion and noise. Reference Bypass Capacitor C5. C5 filters the ½ VDD reference voltage at the IN_P input (pin 1). Place C5 as close to IN_P as possible to improve power supply rejection and reduce distortion and noise at the output. Use two separate ground planes, analog ground (AGND) and power ground (PGND), and connect the 2 grounds together at a single point to prevent noise injection into the amplifier input to reduce distortion. Power components (C4, C7, C9 and D1 and the speaker return) connect to the power ground. The front-end analog components (C5, R5, and the input signal ground) connect to the analog ground. Place the input and feedback resistors R3 and R1 as close to the IN_N input as possible. Make sure that any traces carrying the switching node (POUT) voltage are separated far from any input signal traces. If multiple amplifiers are used on a single board, make sure that each channel is physically separated to prevent crosstalk. If it is required to run the POUT trace near the input, shield the input with a ground plane between the traces. Make sure that all inductors used on a single circuit board have the same orientation. If multiple channels are used on a single board, make sure that the power supply is routed from the source to each channel individually, not serially. This prevents channel-to-channel coupling through the power supply input. 5.8 Electro-Magnetic Interference (EMI) Considerations Due to the switching nature of the Class-D amplifier, care must be taken to minimize the effects of electromagnetic interference from the amplifier. However, with proper component selection and careful attention to circuit layout, the effects of the EMI due to the amplifier switching can be minimized. The power inductors are a potential source of radiated emissions. For the best EMI performance, use toroidal inductors, since the magnetic field is well contained inside the core. However toroidal inductors can be expensive to wind. For a more economical solution, use shielded gapped ferrite or shielded ferrite bobbin core inductors. These inductors typically do not contain the field as well toroidal inductors, but usually can achieve a better balance of good EMI performance with low cost. The size of high-current loops that carry rapidly changing currents needs to be minimized. To do this, make sure that the VDD bypass capacitor (C7) is as close to the ATA-120 as possible. Nodes that carry rapidly changing voltage, such as POUT, need to be made as small as possible. If sensitive traces run near a trace connected to POUT, place a ground shield between the traces. This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 10 of 13 ATA-120 6.0 Performance Measurements 10 10 5 5 2 2 1 1 0.5 0.5 % % 0.2 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 60m 100m 200m 500m 1 2 5 10 20 0.01 30 60m 100m 200m 500m 1 W 2 5 10 30 20 W Figure 5 - THD+N vs. POUT @ 4Ω (1kHz) Figure 6 – THD+N vs. POUT @ 8Ω (1kHz) 1 1 0.5 0.5 0.2 0.2 0.1 0.1 % % 0.05 0.05 0.02 0.02 0.01 0.01 0.006 20 50 100 200 500 1k 2k 5k 10k 20k 0.005 20 Figure 7 – THD+N vs. Frequency @ 4Ω (1W) 50 100 200 500 1k 2k 5k 10k 20k Hz Hz Figure 8 - THD+N vs. Frequency @ 8Ω (1W) This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 11 of 13 ATA-120 +1 +0 -10 -20 -0 -30 -40 -1 -50 d B r -60 -70 d B r A -80 A -90 -2 -3 -100 -110 -4 -120 -130 -140 20 4Ω 50 100 200 500 1k 2k 5k 10k 20k -5 20 50 100 200 1k 500 Hz 8Ω 2k 5k 10k 20k Hz Figure 10 – Frequency Response using 2200uF coupling capacitor, (AV = 8.2, Ref = 2 Vrms, Dotted (Blue)=4Ω, Solid (Red)=8Ω) Figure 9 – FFT Noise Floor 190µV (A-weighted, Typical, AV = 8.2) +0 -10 -20 -30 -40 d B r -60 A -80 Efficiency (%) -50 -70 -90 -100 -110 -120 -130 -140 20 100.0 0 90.0 0 80.0 0 70.0 0 60.0 0 50.0 0 40.0 0 30.0 0 20.0 0 10.0 0 0.0 0 0 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 11 – IHF-IMD (1W) 4Ω 5 10 15 8Ω 20 25 Power (Watts) Figure 12 – Efficiency vs POUT This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 12 of 13 ATA-120 PACKAGE OUTLINE SOIC8 Note: Dimensions are in inches (mm). Information furnished in this publication is believed to be accurate and reliable. However, Apogee Technology, Inc. assumes no responsibility for its use, or for any infringements of patents or other rights of third parties that may result form its use. Not intended for medical and/or life support equipment… customers responsible for their own applications of Apogee components… Specifications in this publication are subject to change without notice. This publication supersedes and replaces all information previous supplied. © Apogee Technology, Inc. All Rights Reserved This is preliminary information on a new product. Specifications are subject to change without notice. 129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] CONTROLLED DOCUMENT: P_903-000009_Rev14 ATA-120 Data Sheet.doc DRN: PRELIMINARY Page 13 of 13