SyncMOS Technologies Inc.
SM89516
May 2001
8 - Bit Micro-controller
with 64KB flash & 1KB RAM embedded
Product List
SM89516L25, 25 MHz 64KB internal memory MCU
SM89516C25, 25 MHz 64KB internal memory MCU
Features
Working voltage: 3.0V ~ 3.6V For L Version
4.5V ~ 5.5V For C Version
Description
General 8052 family compatible
12 clocks per machine cycle
64 KB internal flash memory
The SM89516 series product is an 8 - bit single chip
micro controller with 64KB flash & 1KB RAM embedded. It is a derivative of the 8052 micro controller family.
With its hardware features and powerful instruction set,
it’s straight forward to make it a versatile and cost effective controller for those applications which demand up
to 32 I/O pins for PDIP package or up to 36 I/O pins for
PLCC/QFP package, or applications which need up to
64KB memory either for program or for data or mixed.
To program the on-chip flash memory, a commercial
writer is available to do it in parallel programming
method.
1024 bytes data RAM
Three 16 bit timers/counters
Four 8-bit I/O ports for PDIP package
Four 8-bit I/O ports + one 4-bit I/O ports
for PLCC or QFP package
Full duplex serial channel
Bit operation instruction
Page free jumps
8-bit unsigned division
8-bit unsigned multiply
BCD arithmetic operations
Ordering Information
Direct addressing
Indirect addressing
yywwv
SM89516ihhk
Nested interrupts
yy: year, ww:week
v: version identifier {, A, B,...}
i: process identifier {L=3.0V ~ 3.6V, C=4.5V ~ 5.5V}
hh: working clock in MHz {25}
k: package type postfix {as below table}
A serial I/O port
Two priority level interrupts
Power save modes:
Idle mode and power down mode
Code protection function
One watch dog timer (WDT)
Low EMI (inhibit ALE)
Postfix
P
J
Q
Package
40L PDIP
44L PLCC
44L QFP
Pin/Pad
Configuration
page 2
page 2
page 2
Dimension
page 16
page 17
page 18
Taiwan
4F, No. 1 Creation Road 1,
Science-based Industrial Park,
Hsinchu, Taiwan 30077
TEL: 886-3-578-3344
FAX: 886-3-579-2960
886-3-578-0493
Specifications subject to change without notice,contact your sales representatives for the most recent information.
1/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
10
11
35
#EA
34
P4.1
(Top View, 44L PLCC)
33
ALE
32
30
#PSEN
P2.7/A15
P2.6/A14
29
P2.5/A13
12
13
31
T2/P1.0
1
40
VDD
T2EX/P1.1
2
39
P0.0/AD0
P1.2
3
38
P0.1/AD1
37
P0.2/AD2
36
35
P0.3/AD3
P0.4/AD4
34
P0.5/AD5
33
P0.6/AD6
P1.3
4
P1.5/
6
P1.6
7
P1.7
8
RES
9
RXD/P3.0
10
SM89516 ihhPv
5
(Top View, 40L PDIP)
P1.4
32
P0.7/AD7
31
#EA
30
ALE
29
#PSEN
28
P2.7/A15
27
P2.6/A14
TXD/P3.1
11
#INT0/P3.2
12
#INT1/P3.3
13
T0/P3.4
14
T1/P3.5
15
26
P2.5/A13
16
25
P2.4/A12
17
24
P2.3/A11
XTAL2
18
23
P2.2/A10
XTAL1
VSS
19
22
P2.1/A9
20
21
P2.0/A8
#WR/P3.6
#RD/P3.7
AD1/P0.1
AD0/P0.0
36
VDD
P4.2
T2/P1.0
T2EX/P1.1
P1.2
P1.3
P1.4
38
A12/P2.4
A11/P2.3
A9/P2.1
A10/P2.2
P4.0
A8/P2.0
#RD/P3.7
XTAL2
XTAL1
VSS
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
AD2/P0.2
34
35
P2.7/A15
P2.6/A14
P2.5/A13
#PSEN
P4.1
ALE
P0.7/AD7
#EA
P0.5/AD5
33 32 31 30 29 28 27 26 25 24 23
22
21
20
37
19
18
SM89516 ihhQv
17
39
16
(Top View, 44L QFP)
40
41
15
42
14
43
13
44
12
1
2
3
4
5
6
7
8
9
10 11
P2.4/A12
P2.3/A11
P2.2A10
P2.1A9
P2.0/A8
P4.0
VSS
XTAL1
XTAL2
P3.7/#RD
P3.6/#WR
T1/P3.5
SM89516 ihhJv
9
AD3/P0.3
T0/P3.4
36
P0.5/AD5
P0.6/AD6
P0.7/AD7
#INT1/P3.3
P0.4/AD4
#INT0/P3.2
39
38
P0.6/AD6
P0.4/AD4
P0.3/AD3
1 44 43 42 41 40
P4.3
2
P0.2/AD2
P1.2
P1.1/T2EX
P1.0/T2
P4.2
VDD
P0.0/AD0
P0.1/AD1
P1.3
3
37
#WR/P3.6
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
4
TXD/P3.1
8
5
RXD/P3.0
P1.6
P1.7
RES
RXD/P3.0
P4.3
TXD/P3.1
6
P1.6
P1.7
RES
7
P1.5
P1.5
P1.4
Pin Configurations
Specifications subject to change without notice,contact your sales representatives for the most recent information.
2/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Block Diagram
Timer 1
Timer 2
Timer 0
Decoder &
Register
Stack
Pointer
1024 bytes
RAM
Buffer
WDT
RES
Vdd
Vss
to pertinent blocks
Reset
Circuit
PC
Incrementer
to whole chip
Power
Circuit
Buffer2
to pertinent blocks
Interrupt
Circuit
Buffer1
Program
Counter
ALU
Register
PSW
XTAL2
XTAL1
#EA
DPTR
Acc
Timing
to whole system
Generator
ALE
#PSEN
Instruction
Register
Port 1
Latch
Port 0
Latch
Port 0
Driver & Mux
8
Port 1
Driver & Mux
8
Port 2
Latch
Port 3
Latch
Port 4
Latch
64K
bytes
Flash
Memory
Port 2
Port 4
Port 3
Driver & Mux Driver & Mux Driver & Mux
8
8
4
Specifications subject to change without notice,contact your sales representatives for the most recent information.
3/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Pin Descriptions
40L
PDIP
Pin#
44L
QFP
Pin#
44L
PLCC
Pin#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
40
41
42
43
44
1
2
3
4
5
7
8
9
10
11
12
13
14
15
16
18
19
20
21
22
23
24
25
26
27
29
30
31
32
33
34
35
36
37
38
17
28
39
6
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
40
41
42
43
44
23
34
1
12
Symbol
T2/P1.0
T2EX/P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RES
RXD/P3.0
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
#WR/P3.6
#RD/P3.7
XTAL2
XTAL1
VSS
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
#PSEN
ALE
#EA
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VDD
P4.0
P4.1
P4.2
P4.3
Active I/O
H
L/ L/ -
L/ L/ -
L
L
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
o
o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
Names
timer 2 clock out & bit 0 of port 1
timer 2 control & bit 1 of port 1
bit 2 of port 1
bit 3 of port 1
bit 4 of port 1
bit 5 of port 1
bit 6 of port 1
bit 7 of port 1
Reset
Receive data & bit 0 of port 3
Transmit data & bit 1 of port 3
low true interrupt 0 & bit 2 of port 3
low true interrupt 1 & bit 3 of port 3
Timer 0 & bit 4 of port 3
Timer 1 & bit 5 of port 3
external memory write & bit 6 of port 3
external memory read & bit 7 of port 3
Crystal out
Crystal in
Sink Voltage, Ground
bit 0 of port 2 & bit 8 of external memory address
bit 1 of port 2 & bit 9 of external memory address
bit 2 of port 2 & bit 10 of external memory address
bit 3 of port 2 & bit 11 of external memory address
bit 4 of port 2 & bit 12 of external memory address
bit 5 of port 2 & bit 13 of external memory address
bit 6 of port 2 & bit 14 of external memory address
bit 7 of port 2 & bit 15 of external memory address
program storage enable
address latch enable
external access
bit 7 of port 0 & data/address bit 7 of external memory
bit 6 of port 0 & data/address bit 6 of external memory
bit 5 of port 0 & data/address bit 5 of external memory
bit 4 of port 0 & data/address bit 4 of external memory
bit 3 of port 0 & data/address bit 3 of external memory
bit 2 of port 0 & data/address bit 2 of external memory
bit 1 of port 0 & data/address bit 1 of external memory
bit 0 of port 0 & data/address bit 0 of external memory
Drive Voltage, +5 Vcc
bit 0 of Port 4
bit 1 of Port 4
bit 2 of Port 4
bit 3 of Port 4
Specifications subject to change without notice,contact your sales representatives for the most recent information.
4/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Special Function Register (SFR) Memory MAP
$FF
$F8
$F0
$E8
B
$F7
ACC
$EF
$E7
P4
$DF
$E0
$D8
$D0
$C8
$C0
PSW
$B8
IP
$B0
P3
$B7
$A8
$A0
$98
IE
SCON
$AF
$A7
$9F
$90
P1
$88
$80
T2CON
RC2L
RC2H
TL2
$D7
$CF
TH2
SCONF
P2
SBUF
WDTC
$C7
$BF
$97
TCON
TMOD
TL0
TL1
TH0
TH1
P0
SP
DPL
DPH
(Reserved)
RCON
$8F
PCON
$87
Note: The text of SFRs with bold type characters are Extension Special Function Registers for SM89516
Extension Function Description
Memory Structure
The SM89516 is the general 8052 hardware core to integrate the expanded 768B data RAM
and 64KB flash program memory as a single chip micro controller. Its memory structure follows
general 8052 structure.
Program Memory
The SM89516 has 64K bytes on-chip flash memory which can be used as general program memory.
FFFF
64K Program
memory space
0000
Specifications subject to change without notice,contact your sales representatives for the most recent information.
5/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Data Memory
The SM89516 has 1K bytes on-chip RAM, 256 bytes of it are the same as general 8052 internal memory
structure while the expanded 768 bytes on-chip RAM can be accessed by external memory addressing method.
(by instruction MOVX)
02FF
Expanded 768 bytes (Accessed
by direct external addressing
mode, by instruction MOVX)
(OME = 1)
FF
FF Higher 128 bytes (Access by
80 indirect addressing mode only)
SFR (Accessed by direct
addressing mode only)
7F
Lower 128 bytes (Accessed by
direct
& indirect addressing mode)
00
80
0000
Data Memory - Lower 128 byte
Data memory $00 to $FF is the same as 8052
The address $00 to $7F can be accessed by direct and indirect addressing modes.
Address $00 to $1F is register area.
Address $20 to $2F is memory bit area.
Address $30 to $7F is for general memory area.
Data memory - Higher 128 byte
The address $80 to $FF can be accessed by indirect addressing mode only.
Addressing $80 to $FF is data area.
Data Memory - Expanded 768 bytes
From external address $0000 to $02FF is the on-chip expanded RAM area, total 768 bytes. This area can be
accessed by external direct addressing mode only (by instruction MOVX).
Internal RAM Control Register (RCON, $85)
bit-7
Read :
Write :
Reset value :
bit-0
Unused
Unused
Unused
Unused
Unused
Unused
RAMS1
RAMS0
*
*
*
*
*
*
0
0
Specifications subject to change without notice,contact your sales representatives for the most recent information.
6/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
SM89516 has 768 byte on-chip RAM which can be accessed by external memory addressing method only. (By
instruction MOVX). The address space of instruction MOVX @Rn is determined by bit 1 and bit 0 (RAMS1,
RAMS0) of RCON. The default setting of RAMS1, RAMS0 bits is 00 (page0).
RAMS1
RAMS0
MOVX @Ri i=0,1 mapping to expended RAM address
0
0
$0000 ~ $00FF
0
1
$0100 ~ $01FF
1
0
$0200 ~ $02FF
Port 4 for PLCC or QFP package:
The bit addressable port 4 is available with PLCC or QFP package. The port 4 has only 4 pins and its port
address is located at 0D8H. The function of port 4 is the same as the function of port 1, port 2 and port 3.
port4 (P4, $D8)
Reset
value
Unused
Unused
Unused
Unused
P4.3
P4.2
P4.1
P4.0
*
*
*
*
1
1
1
1
MSB
LSB
The bit 3, bit 2, bit 1, bit 0 output the setting to pin P4.3, P4.2, P4.1, P4.0 respectively.
Extension Function Description
Watch Dog Timer
The Watch Dog Timer (WDT) is a 16-bit free-running counter that generate reset signal if the counter overflows. The WDT
is useful for systems which are susceptible to noise, power glitches, or electronics discharge which causing software dead
loop or runaway. The WDT function can help user software recover form abnormal software condition. The WDT is different
from Timer0, Timer1 and Timer2 of general 8052. To prevent a WDT reset can be done by software periodically clearing
the WDT counter.
The SM89516 WDT has selectable divider input for the time base source clock. To select the divider input, the setting of
bit2~bit0 (PS2~PS0) OF Watch Dog Timer Control Register (WDTC) should be set accordingly.
The WDT is enable by setting 1 to the bit 7 (WDTE) of WDTC. After WDTE set to 1, the 16-bit counter starts to count with
the selected time base source clock which set by PS2~PS0. It will generate a reset signal when overflows. The WDTE bit
will be cleared to 0 automatically when SM89516 been reset, either hardware reset or WDT reset.
To reset the WDT is done by setting 1 to the bit 5 (CLEAR) of WDTC. This will clear the content of the 16-bit counter and let
the counter re-start to count from the beginning.
Specifications subject to change without notice,contact your sales representatives for the most recent information.
7/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Watch Dog Timer Registers - WDT Control Register (WDTC, $9F)
WDTE
Unused
0
Reset
value
CLEAR
*
Unused
0
Unused
*
PS2
PS1
PS0
0
0
0
*
MSB
LSB
WDTE: Watch Dog Timer enable bit
CLEAR: Watch Dog Timer reset bit
PS2 ~ PS0: clock source divider selection bit
PS [2:0]
Divider (OSC in)
Time Period (ms) @40MHz
000
8
13.1
001
16
26.21
010
32
52.42
011
64
104.8
100
128
209.71
101
256
419.43
110
512
838.86
111
1024
1677.72
System Control Register (SCONF, $BF)
WDR
Reset
value
0
Unused
*
Unused
*
Unused
*
Unused
*
Unused
*
OME
ALEI
1
0
MSB
LSB
WDR: Watch Dog Timer Reset. When system reset by Watch Dog Timer overflow, WDR will be set to 1
OME: 768 bytes on-chip RAM enable bit
ALEI: ALE output inhibit bit, to reduce EMI
The bit 7(WDR) of SCONF is Watch Dog Timer Reset bit. It will be set to 1 when reset signal generated
by WDT overflow. User should check WDR bit whenever un-predicted reset happened.
Reduce EMI Function
The SM89516 allows user to reduce the EMI emission by setting 1 to the bit 0 (ALEI) of SCONF register. This
function will inhibit the clock signal in Fosc/6Hz output to the ALE pin. This function is available when there is
no external program memory or no external data RAM in the system.
Specifications subject to change without notice,contact your sales representatives for the most recent information.
8/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Operating Conditions
Symbol
Typ.
Max.
Unit.
TA
Operating temperature
Description
Min.
0
25
70
oC
Remarks
TS
Storage temperature
-55
25
155
oC
VCC5
Supply voltage
4.5
5.0
5.5
V
For C Version
VCC3
Supply voltage
3
3.3
3.6
V
For L Version
Fosc 16
Oscillator Frequency
3.0
16
16
MHz For 5V, 3.3V application
Fosc 25
Oscillator Frequency
3.0
25
25
MHz For 5V, 3.3V application
Ambient temperature under bias
DC Characteristics
(12MHz, typical operating conditions, valid for SM89516 series)
Symbol
Parameter
VIL1
VIL2
VIH1
VIH2
VOL1
VOL2
VOH1
Input Low Voltage
Input Low Voltage
Input High Voltage
Input High Voltage
Output Low Voltage
Output Low Voltage
Output High Voltage
port 0,1,2,3,4,#EA
RES, XTAL1
port 0,1,2,3,4,#EA
RES, XTAL1
port 0, ALE, #PSEN
port 1,2,3,4
port 0
Valid
VOH2
Output High Voltage
port 1,2,3,4,ALE,#PSEN
IIL
ITL
ILI
R RES
C IO
I CC
Logical 0 Input Current
Logical Transition Current
Input Leakage Current
Reset Pulldown Resistance
Pin Capacitance
Power Supply Current
port 1,2,3,4
port 1,2,3,4
port 0, #EA
RES
Min.
-0.5
0
2.0
70%Vcc
Max.
0.8
0.8
Vcc+0.5
Vcc+0.5
0.45
0.45
2.4
90%Vcc
2.4
90%Vcc
50
Vdd
-75
-650
+ 10
300
10
20
6.5
50
Unit
V
V
V
V
V
V
V
V
V
V
uA
uA
uA
Kohm
pF
mA
mA
uA
Test Conditions
IOL=3.2mA
IOL=1.6mA
IOH=-800uA (only for VCC=5V)
IOH=-80uA
IOH=-60uA (only for VCC=5V)
IOH=-10uA
Vin=0.45V
Vin=2.0V
0.45V<Vin<Vcc
Freq=1MHz, Ta=25 C
Active mode, 16MHz
Idle mode, 16MHz
Power down mode
Specifications subject to change without notice,contact your sales representatives for the most recent information.
9/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
AC Characteristics
(16/25MHz, operating conditions; CL for Port 0, ALE and PSEN Outputs=100pF; CL for all Other Output=80pF)
Symbol
T LHLL
T AVLL
T LLAX
T LLIV
T LLPL
T PLPH
T PLIV
T PXIX
T PXIZ
T AVIV
T PLAZ
T RLRH
T WLWH
T RLDV
T RHDX
T RHDZ
T LLDV
T AVDV
T LLYL
T AVYL
T QVWH
T QVWX
T WHQX
T RLAZ
T YALH
T CHCL
T CLCX
T CLCH
T CHCX
T, TCLCL
Parameter
ALE pulse width
Address Valid to ALE low
Address Hold after ALE low
ALE low to Valid Instruction In
ALE low to #PSEN low
#PSEN pulse width
#PSEN low to Valid Instruction In
Instruction Hold after #PSEN
Instruction Float after #PSEN
Address to Valid Instruction In
#PSEN low to Address Float
#RD pulse width
#WR pulse width
#RD low to Valid Data In
Data Hold after #RD
Data Float after #RD
ALE low to Valid Data In
Address to Valid Data In
ALE low to #WR High or #RD low
Address Valid to #WR or #RD low
Data Valid to #WR High
Data Valid to #WR transition
Data hold after #WR
#RD low to Address Float
#WR or #RD high to ALE high
clock fall time
clock low time
clock rise time
clock high time
clock period
Valid
Cycle
RD/WRT
RD/WRT
RD/WRT
RD
RD
RD
RD
RD
RD
RD
RD
RD
WRT
RD
RD
RD
RD
RD
RD/WRT
RD/WRT
WRT
WRT
WRT
RD
RD/WRT
fosc=16MHz
Min. Typ. Max
115
43
53
240
53
173
177
0
87
292
10
365
365
302
0
145
590
542
178
197
230
403
38
73
53
63
Variable fosc
Unit
Min.
Typ.
Max
2xT - 10
nS
T - 20
nS
T - 10
nS
4xT - 10 nS
T - 10
nS
3xT - 15
nS
3xT - 10 nS
0
nS
T + 25 nS
5xT - 20 nS
10 nS
6xT - 10
nS
6xT - 10
nS
5xT - 10 nS
0
nS
2xT + 20 nS
8xT - 10 nS
9xT - 20 nS
3xT - 10
3xT + 10 nS
4xT - 20
nS
7xT - 35
nS
T - 25
nS
T + 10
nS
5 nS
72
T -10
T + 10 nS
nS
nS
nS
nS
1/fosc
nS
ICC Idle mode test circuit
ICC Active mode test circuit
ICC
Vcc
Vcc
ICC
VCC
RST
SM89516
(NC)
Clock Signal
XTAL2
XTAL1
VSS
Remarks
PO
EA
VCC
RST
8
SM89516
(NC)
Clock Signal
Vcc
PO
EA
8
XTAL2
XTAL1
VSS
Specifications subject to change without notice,contact your sales representatives for the most recent information.
10/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Application Reference
Valid for SM89516
X'tal
C1
C2
R
3MHz
30 p
30 p
open
6MHz
30 p
30 p
open
X'tal
C1
C2
R
16MHz
30 pF
30 pF
open
9MHz
30 p
30 p
open
25MHz
15 pF
15 pF
62KΩ
XI
12MHz
30 p
30 p
open
X'tal
SM89516
R
33MHz
10 pF
10 pF
6.8KΩ
X2
C2
C1
NOTE: Oscillation circuit may differs with different crystal or ceramic
resonator in higher oscillation frequency which was due to each
crystal or ceramic resonator has its own characteristics.
User should check with the crystal or ceramic resonator manufacturer
for appropriate value of external components.
Data Memory Read Cycle Timing
T12
T1
T2
T3
T4
T5
T6
T8
T7
T9
T10
T11
T12
T1
T2
T3
OSC
1
2
ALE
#PSEN
#RD
5
7
3
PORT2
ADDRESS A15 - A8
3
PORT0
INST in Float
A7 - A0
4
Float
8
6
DATA in
Float
ADDRESS
or Float
Specifications subject to change without notice,contact your sales representatives for the most recent information.
11/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Program Memory Read Cycle Timing
T12
T2
T1
T3
T4
T5
T6
T10
T9
T8
T7
T11
T1
T12
T2
OSC
ALE
1
2
5
#PSEN
7
#RD,#WR
3
PORT2
ADDRESS A15 - A8
3
PORT0
Float
4
A7 - A0
ADDRESS A15 - A8
6
Float
8
Float
INST in
A7 - A0
Float
Float
INST in
Data Memory Write Cycle Timing
T12
T1
T2
T4
T3
T5
T6
T8
T7
T9
T10
T11
T12
T1
T2
T3
OSC
1
ALE
#PSEN
#WR
5
6
2
ADDRESS A15 - A8
PORT2
2
PORT0
INST
Float
4
3
ADDRESS
or Float
DATA OUT
A7 - A0
Specifications subject to change without notice,contact your sales representatives for the most recent information.
12/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
I/O Ports Timing
T6
T7
T10
T9
T8
X1
T1
T12
T11
T3
T2
T4
T5
T6
T7
T8
sampled
inputs P0,P1
sampled
inputs P2,P3
Output by
Mov Px,Src
current data
next data
RxD at Serial Port
Shift Clock
(Mode 0)
sampled
Timing Critical, Requirement of External Clock (Vss=0.0V is assumed)
TCLCL
Vdd-0.5V
70%Vdd
20%Vdd-0.1V
0.45V
Tm.I
TCLCX
TCHCL
TCHCX
TCLCH
External Program Memory Read Cycle
TPLPH
#PSEN
ALE
PORT 0
TLHLL
TLLPL
TAVLL
TLLAX
TPXIZ
TPLAZ
TPXIX
TPLIV
Instruction. IN
A0 - A7
A0 - A7
TAVIV
PORT 2
A8 - A15
A8 - A15
Specifications subject to change without notice,contact your sales representatives for the most recent information.
13/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Tm.II
External Data Memory Read Cycle
#PSEN
TYHLH
ALE
TLLDV
TRLRH
TLLYL
#RD
TAVLL
TLLAX
TRLAZ
TRHDZ
TRLDV
TRHDX
A0 - A7
from Ri or DPL
PORT 0
DATA IN
A0 - A7
from PCL
INSTRL
IN
TAVYL
TAVDV
PORT 2
A8 - A15 from PCH
P2.0 - P2.7 or A8 - A15 from DPH
Tm.III External Data Memory Write Cycle
#PSEN
TYHLH
TLHLL
ALE
TLLYL
#WR
TAVLL
TLLAX
PORT 0
TWLWH
TQVWX
TWHQX
TQVWH
A0-A7
from Ri or DPL
DATA OUT
A0-A7
From PCL
INSTRL
IN
TAVYL
PORT 2
A8-A15 from PCH
P2.0-P2.7 or A8-A15 from DPH
Specifications subject to change without notice,contact your sales representatives for the most recent information.
14/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
40L 600mil PDIP Information
E
D
S
E1
A2
A1
C
A
L
e1
B1
eA
B
a
Note:
1. Dimension D Max & include mold flash or tie bar
burrs.
2. Dimension E1 does not include inter lead flash.
3. Dimension D & E1 include mold mismatch and are
determined at the mold parting line.
4. Dimension B1 does not include dam bar protrusion/
infusion.
5. Controlling dimension is inch.
6. General appearance spec. should base on final visual
inspection spec.
Symbol
A
A1
A2
B
B1
C
D
E
E1
e1
L
a
eA
S
Dimension in inch
minimal/maximal
- / 0.210
0.010 / 0.150 / 0.160
0.016 / 0.022
0.048 / 0.054
0.008 / 0.014
- / 2.070
0.590 / 0.610
0.540 / 0.552
0.090 / 0.110
0.120 / 0.140
0 / 15
0.630 / 0.670
- / 0.090
Dimension in mm
minimal/maximal
- / 5.33
0.25 / 3.81 / 4.06
0.41 / 0.56
1.22 / 1.37
0.20 / 0.36
- / 52.58
14.99 / 15.49
13.72 / 14.02
2.29 / 2.79
3.05 / 3.56
0 / 15
16.00 / 17.02
- / 2.29
Specifications subject to change without notice,contact your sales representatives for the most recent information.
15/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
44L Plastic Chip Carrier (PLCC)
L
6
7
E
HE
GE
y
D
A2
HD
A
C
b1
θ
e
b
Symbol
A
A1
A2
b1
b
C
D
E
e
GD
GE
HD
HE
L
θ
GD
Note:
1. Dimension D & E does not include inter lead flash.
2. Dimension b1 does not include dam bar protrusion/
intrusion.
3. Controlling dimension: Inch
4. General appearance spec. should base on final visual
inspection spec.
A1
y
Dimension in inch
minimal/maximal
- / 0.185
0.020 / 0.145 / 0.155
0.026 / 0.032
0.016 / 0.022
0.008 / 0.014
0.648 / 0.658
0.648 / 0.658
0.050 BSC
0.590 / 0.630
0.590 / 0.630
0.680 / 0.700
0.680 / 0.700
0.090 / 0.110
- / 0.004
/
Dimension in mm
minimal/maximal
- / 4.70
0.51 / 3.68 / 3.94
0.66 / 0.81
0.41 / 0.56
0.20 / 0.36
16.46 / 16.71
16.46 / 16.71
1.27 BSC
14.99 / 16.00
14.99 / 16.00
17.27 / 17.78
17.27 / 17.78
2.29 / 2.79
- / 0.10
/
Specifications subject to change without notice,contact your sales representatives for the most recent information.
16/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
44L Plastic Quad Flat Package
C
L
L1
S
θ2
e
R1
D2 D1 D
Gage Plane
0.25 mm
b
θ3
A2
R2
A1
E2
E1
E
A
e1
seating plane
C
e
Note:
Dimension D1 and E1 do not include mold protrusion.
Allowance protrusion is 0.25mm per side.
Dimension D1 and E1 do include mold mismatch
and are determined datum plane.
Dimension b does not include dam bar protrusion.
Allowance dam bar protrusion shall be 0.08 mm total
in excess of the b dimension at maximum material
condition. Dam bar cannot be located on the lower
radius or the lead foot.
Symbol
A
A1
A2
b
c
D
D1
D2
E
E1
E2
e
L
L1
R1
R2
S
θ
θ1
θ2
θ3
C
Dimension in Inch
minimal/maximal
- / 0.100
0.006 / 0.014
0.071 / 0.087
0.012 / 0.018
0.004 / 0.009
0.520 BSC
0.394 BSC
0.315
0.520 BSC
0.394 BSC
0.315
0.031 BSC
0.029 / 0.041
0.063
0.005 / 0.005 / 0.012
0.008 / 0° / 7°
0° / 10° REF
7° REF
0.004
Dimension in mm
minimal/maximal
- / 2.55
0.15 / 0.35
1.80 / 2.20
0.30 / 0.45
0.09 / 0.20
13.20 BSC
10.00 BSC
8.00
13.20 BSC
10.00 BSC
8.00
0.80 BSC
0.73 / 1.03
1.60
0.13 / 0.13 / 0.30
0.20 / as left
as left
as left
as left
0.10
Specifications subject to change without notice,contact your sales representatives for the most recent information.
17/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
eMCU writer list
Company
Contact info
Tel:02-22182325
Fax:02-22182435
E-mail:
[email protected]
Programmer Model Number
LabTool - 48 (1 * 1)
LabTool - 848 (1*8)
Caprilion
P.O. Box 461 KaoHsiung, Taiwan,
ROC
Web site:
http://www.market.net.tw/ ~ cap/
Tel:07-3865061
Fax:07-3865421
E-mail:
[email protected]
UNIV2000
Hi-Lo
4F, No. 20, 22, LN, 76,
Rui Guang Rd., Nei Hu, Taipei,
Taiwan, ROC.
Web site:
http://www.hilosystems.com.tw
Tel:02-87923301
Fax:02-87923285
E-mail:
[email protected]
All - 11 (1*1)
Gang - 08 (1*8)
Leap
6th F1-4, Lane 609,
Chunghsin Rd., Sec. 5, Sanchung,
Taipei Hsien, Taiwan, ROC
Web site:
http://www.leap.com.tw
Tel:02-29991860
Fax:02-29990015
E-mail:
[email protected]
ChipStation (1*1)
SU - 2000 (1*8)
Xeltek Electronic Co., Ltd
338 Hongwu Road, Nanjing, China
210002
Web site:
http://www.xeltek-cn.com
Tel:+86-25-4408399, 4543153-206
E-mail:
[email protected],
[email protected]
Superpro/2000 (1*1)
Superpro/680 (1*1)
Superpro/280 (1*1)
Superpro/L+(1*1)
Advantech
7F, No.98, Ming-Chung Rd.,
Shin-Tien City, Taipei, Taiwan,
ROC
Web site:
http://www.aec.com.tw
Specifications subject to change without notice,contact your sales representatives for the most recent information.
18/19
Ver 1.3
PID 89516 05/01
SyncMOS Technologies Inc.
SM89516
May 2001
Feedback / Inquiry:
To
Attn
Fax
Tel
:SyncMOS Technologies, Inc.
:MKT / Customer Service Dept.
:886-3-579-2960
:886-3-578-0493
:886-3-579-2988
:886-3-579-2926
From
:
Company :
Dept, Section :
Position Title :
Inquiry Date :
Ref No :
:
Request customer logo as below:
Specifications subject to change without notice,contact your sales representatives for the most recent information.
19/19
Ver 1.3
PID 89516 05/01