UCC1806 UCC2806 UCC3806 application INFO available Low Power, Dual Output, Current Mode PWM Controller FEATURES DESCRIPTION • BiCMOS Version of UC1846 Families The UCC1806 family of BiCMOS PWM controllers offers exceptionally improved performance with a familiar architecture. With the same block diagram and pinout of the popular UC1846 series, the UCC1806 line features increased switching frequency capability while greatly reducing the bias current used within the device. With a typical startup current of 50µA and a well defined voltage threshold for turn-on, these devices are favored for applications ranging from off-line power supplies to battery operated portable equipment. Dual high current, FET driving outputs and a fast current sense loop further enhance device versatility. • 1.4mA Maximum Operating Current • 100µA Maximum Startup Current • 1.0A Peak Output Current • 125nsec Circuit Delay • Easier Parallelability • Improved Benefits of Current Mode Control All the benefits of current mode control including simpler loop closing, voltage feed-forward, parallelability with current sharing, pulse-by-pulse current limiting, and push-pull symmetry correction are readily achievable with the UCC1806 series. (continued) BLOCK DIAGRAM SYNC 10 4.4V RT 13 VC 11 AOUT 14 BOUT 12 GND 1 CURLIM 16 SHUTDOWN 1.5V 9 OSC CT Q 8 LO R CS– CS+ 3 5 INV 6 COMP 7 COMP – + NI QB S1 3X 4 QB T S2 SHUTDOWN LOCK OUT 120µA 0.5V EA S1 S2 7.0V VIN R Q S R S 15 0.35V Q 200µA Q 1.00V 200k CURRENT LIMIT RESTART R 7.5V UNDER VOLTAGE LOCKOUT 15V 5.1V REFERENCE REGULATOR 4.25V Pin numbers refer to DIL-16 package. SLUS272A - FEBRUARY 2000 2 VREF REFERENCE LOW UDG-99035 UCC1806 UCC2806 UCC3806 ABSOLUTE MAXIMUM RATINGS DESCRIPTION (continued) Supply Voltage, Low Impedance (Pin 15) . . . . . . . . . . . . . +15V Supply Current, High Impedance (Pin 15) . . . . . . . . . . . +25mA Output Supply Voltage (Pin 13) . . . . . . . . . . . . . . . . . . . . . +18V Output Current, Continuous Source or Sink . . . . . . . . . ±200mA Output Current, Gate Drive. . . . . . . . . . . . . . . . . . . . . . ±500mA Analog Input Voltage (Pin 3, 4, 5, 6, 16) . . −0.3V to +VIN +0.3V Sync Output Current (Pin 10) . . . . . . . . . . . . . . . . . . . . . ±30mA Error Amplifier Output Current (Pin 7) . +10mA/− (Self Limiting) Power Dissipation at TA = 25°C (Note 3) . . . . . . . . . . . 1000mW Power Dissipation at TC = 25°C (Note 3). . . . . . . . . . . 2000mW Storage Temperature Range . . . . . . . . . . . . . . 65°C to +150°C Lead Temperature (soldering, 10 seconds) . . . . . . . . . . +300°C These devices are available with multiple package options for both through-hole and surface mount applications; and in commercial, industrial, and military temperature ranges. Contact factory for availability. The UCC1806 is specified for operation from –55°C to +125°C, the UCC2806 is specified for operation from –40°C to +85°C, and the UCC3806 is specified for operation from 0°C to +70°C. The part is available in DIP and SOIC packages. Note 1. All voltages are with respect to Ground, Pin 12. Note 2. Currents are positive into, negative out of the specified terminal. Note 3. Consult packaging section of databook for thermal limitations and considerations of package. Note 4. Pin numbers refer to DIL-16 package. CONNECTION DIAGRAMS DIL-16 (Top View) J or N, DW PACKAGE PLCC-20, LCC-20 (Top View) Q, L PACKAGE ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for TA = –55°C to +125°C for the UCC1806, −40°C to +85°C for the UCC2806, and 0°C to +70°C for the UCC3806; VIN = 12V, RT = 33k, CT = 330pF, CBYPASS on VREF = 0.01µF, TA = TJ. PARAMETER Reference Section Output Voltage Load Regulation Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit TEST CONDITION UCC1806 / UCC2806 TJ = 25°C, IO = 0.2mA 0.2mA < IO < 5mA Line, Load, Temperature (Note 7) 10Hz ≤ f ≤ 10kHz, TJ = 25°C (Note 5) TA = 125°C, 1000 Hours (Note 5) UNITS MIN TYP MAX MIN TYP MAX 5.02 5.10 3 5.17 25 150 5.00 5.10 3 5.20 25 150 V mV mV µV 25 −30 mV mA −150 −150 70 5 −10 2 UCC3806 70 25 −30 5 −10 UCC1806 UCC2806 UCC3806 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for TA = –55°C to +125°C for the UCC1806, −40°C to +85°C for the UCC2806, and 0°C to +70°C for the UCC3806; VIN = 12V, RT = 33k, CT = 330pF, CBYPASS on VREF = 0.01µF, TA = TJ. PARAMETER Oscillator Section Initial Accuracy Temperature Stability Amplitude SYNC Delay to Outputs Discharge Current SYNC, VOL SYNC, VOH SYNC, VIL SYNC, VIH SYNC Input Current Error Amplifier Section Input Offset Voltage Input Bias Current Input Offset Current Common Mode Range Open Loop Gain Unity Gain Bandwidth Output Sink Current Output Source Current Output High Level Output Low Level TEST CONDITION UCC1806 / UCC2806 TJ = 25°C TMIN < TA < TMAX (Note 5) Pin 8 = 0V, Pin 9 = VREF, VSYNC = 0.8V to 2.0V TJ = 25°C, VPIN 8 = 2.0V IOUT = +1mA IOUT = –4mA Pin 8 = 0V, Pin 9 = VREF Pin 8 = 0V, Pin 9 = VREF UCC3806 TYP MAX MIN TYP MAX 42 47 2 2.35 50 52 42 47 2 2.35 50 52 125 2 0.4 0.4 2.4 0.8 2.0 −1 0 80 1 1 −80 4.5 VID < –20mV, VPIN 7 = 1.0V VID < 20mV, VPIN 7 = 3.0V VID = –50mV VID = –50mV +1 5 −1 500 VIN-2 100 −120 0.8 2.0 −1 0 80 1 1 −80 4.5 +1 10 −1 500 VIN−2 100 −120 0.5 Current Sense Amplifier Section Amplifier Gain VPIN 3 = 0V, VPIN 1 = VREF (Notes 3,4) Maximum Differential Input VPIN 1 = VREF, VPIN 5 = VREF, Signal (VPIN 4 - VPIN 3) VPIN 6 = 0V Input Offset Voltage VPIN 1 = 0.5V, VPIN 7 = OPEN CMRR VCM = 0 to VIN – 3.5 PSRR Input Bias Current VPIN 1 = 0.5V, PIN 7 OPEN (Note 3) Input Offset Current VPIN 1 = 0.5V, PIN 7 OPEN (Note 3) Delay to Outputs VPIN 5 = VREF, PIN 6 = 0, PIN 1 = 2.75V, PIN 4 – PIN 3 = 0 to 1.5V step (Note 6) Current Limit Adjust Section Current Limit Offset VPIN 3 = 0, VPIN 4 = 0, PIN 7 = open Input Bias Current Minimum Latching Current Maximum Non-Latching Current Shutdown Terminal Section Threshold Voltage Input Voltage Range Delay to Outputs VPIN 16 = 0 to 1.3V 2.75 1.1 3 3.35 10 30 60 56 0.40 0.50 300 200 200 1.00 75 3 0.5 2.75 1.1 −1 1 175 0.60 1 1.06 VIN 150 mV µA nA V dB MHz mA µA V V V/V V 10 50 125 −1 1 175 mV dB dB µA µA ns 0.50 300 200 200 0.9 0 mA V V V V µA 3.35 0.40 80 kHz % V ns 3 60 56 125 0.94 0 100 2 2.4 VO = 1.0 to 4.0 UNITS MIN 1.0 75 0.60 1 80 V µA µA µA 1.1 VIN 150 V V ns UCC1806 UCC2806 UCC3806 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for TA = –55°C to +125°C for the UCC1806, −40°C to +85°C for the UCC2806, and 0°C to +70°C for the UCC3806; VIN = 12V, RT = 33k, CT = 330pF, CBYPASS on VREF = 0.01µF, TA = TJ. PARAMETER TEST CONDITION UCC1806 / UCC2806 MIN Output Section Output Supply Voltage Output Low Level Output High Level Rise Time Fall Time TYP 2.5 ISINK = 20mA ISINK = 100mA ISOURCE = −20mA ISOURCE = −100mA TJ = 25°C, CLOAD = 1000pF TJ = 25°C, CLOAD = 1000pF 11.6 11 Under Voltage Lockout Section Startup Current VIN < Start Threshold Operating Supply Current VIN Shunt Voltage IVIN = 10mA Startup Threshold Threshold Hysteresis 100 0.40 11.9 11.6 35 35 50 1 15 6.5 7.5 0.75 UCC3806 MAX MIN 15 300 1.1 2.5 11.6 11 65 65 100 1.4 17.5 8 TYP 100 0.40 11.9 11.6 35 35 50 1 15 6.5 7.5 0.75 UNITS MAX 15 200 1.1 65 65 100 1.4 17.5 8 V mV V V V ns ns µA mA V V V Note 1: All voltages are with respect to Ground, Pin 12. Note 2: Currents are positive into, negative out of the specified terminal. Note 3: Parameters measured at trip point of latch with VPIN 5 = VREF , VPIN 6 = 0V. Note 4: Amplifier gain defined as: G = delta change at Pin 7/delta change forced at Pin 4 delta voltage at Pin 4 = 0 to 1V. Note 5: Guaranteed by design. Not 100% tested in production. Note 6: Current Sense Amp output is slew rate limited to provide noise immunity. Note 7: Line Range = 10V to 15V, Load Range = 0.2mA to 5mA. PIN DESCRIPTIONS AOUT and BOUT: AOUT and BOUT provide alternating high current gate drive for the external MOSFETs. Duty cycle can be varied from 0 to 50% where minimum dead time is a function of CT. Both outputs use MOS transistor switches with inherent anti-parallel body diodes to clamp voltage swings to the supply rails, allowing operation without the use of clamp diodes. CT: CT is the oscillator timing capacitor connection point, which is charged by the current set by RT. CT is discharged to GND through a 2.6mA current sink. This causes a linear discharge of CT to zero volts which then initiates the next switching cycle. Dead time occurs during the discharge of CT, forcing AOUT and BOUT low. Switching frequency (fs) and dead time (td) are approximated by: COMP: COMP is the output of the error amplifier and the input of the PWM comparator. The error amplifier is a low output impedance, 2MHz operational amplifier which allows sinking or sourcing of current at the COMP pin. The error amplifier is internally current limited, so that zero duty cycle can be commanded by externally forcing COMP to GND. fs = 1 and td = 961 • CT 2 • RT • CT + td CURLIM: CURLIM programs the primary current limit threshold and determines whether the device will latch off or retry after an overcurrent condition. When a shutdown signal is generated, a 200µA current source to ground pulls down on CURLIM. If the voltage on the pin remains above 350mV the device remains latched and the power must be cycled to restart. If the voltage on the pin falls below 350mV, the device attempts a restart. The voltage threshold is typically set by a resistor divider from CS–: CS- is the inverting input of the 3X, differential current sense amplifier. CS+: CS+ is the non-inverting input of the 3X, differential current sense amplifier. 4 UCC1806 UCC2806 UCC3806 PIN DESCRIPTIONS (continued) VREF to ground. To calculate the current limit adjust voltage threshold the following equations can be used; SHUTDOWN: The SHUTDOWN pin is provided for enhanced protection. When SHUTDOWN is driven above 1V, AOUT and BOUT are forced low. Current Limit Adjust Latching Mode Voltage: V= VREF – (R1 • 300 µA) > 350mV R1 1+ R2 SYNC: SYNC is a bi-directional pin, allowing or providing external synchronization with TTL compatible thresholds. In a typical application RT is connected through a timing resistor to GND which allows the internal oscillator to free run. In this mode SYNC outputs a TTL compatible pulse during the oscillator dead time (when CT is being discharged). If RT is forced above 4.4V, SYNC acts as an input with TTL compatible thresholds and the internal oscillator is disabled. When SYNC is high, greater than 2V the outputs are held active low. When SYNC returns low, the outputs may be high until the on-time is terminated by the normal peak current signal, a fault seen at SHUTDOWN or the next high assertion of SYNC. Multiple UCC3806s can be synchronized by a single master UCC3806 or external clock. Current Limit Adjust Non-Latching Mode Voltage: V= VREF – (R1 • 80 µA) > 350mV R1 1+ R2 where R1 is the resistance from the VREF to CURLIM and R2 is the resistance from CURLIM to GND. GND: GND is the reference ground and power ground for all functions of this part. Bypass and timing capacitors should be connected as close as possible to GND. INV: INV is the inverting input of the error amplifier and has a common mode range from 0V to VIN –2V. VC: VC is the input supply connection for the FET drive outputs and has an input range of 2.5V to 15V. VC should be capacitively bypassed for proper operation. NI: NI is the non-inverting input of the error amplifier and has a common mode range from 0V to VIN –2V. VIN: VIN is the input supply connection for this device. The UCC1806 has a maximum startup threshold of 8V and internally limited by means of a 15V shunt regulator. The shunted supply current must be limited to 2.5mA. For proper operation, VIN must be bypassed to GND with at least a 0.01µF ceramic capacitor. RT: RT is the connection point for the oscillator timing resistor. It has a low impedance input and is nominally at 1.25V. The current through RT is mirrored to the timing capacitor pin, CT. This causes a linear charging of CT from 0V to 2.35V. Note that the current mirror is limited to a maximum of 100µA so RT must be greater than 12.5k. VREF: VREF is a 5.1V ±1% trimmed reference output with a 5mA maximum available current. VREF must be bypassed to GND with at least a 0.1µF ceramic capacitor for proper operation. TYPICAL CHARACTERISTICS 60 80 40 90 20 45 0 0 Phase (°) 135 60 Gain (dB) Oscillator Frequency (kHz) 58 56 54 52 50 48 46 44 42 -20 1k 10k 100k 1M 40 10M -55 -50 Frequency (Hz) -25 0 25 50 75 100 Temperature (°C) Figure 1. Error amplifier gain and phase response. Figure 2. Oscillator frequency vs. temperature. 5 125 UCC1806 UCC2806 UCC3806 TYPICAL CHARACTERISTICS (continued) 1M CT= 47pF 100pF 100k 220pF Design Equations for Oscillator: FOSC = 330pF TRAMP = 1.9 2 • RT • CT 470pf TFALL = 1.0nF 10k 2.2nF 1 10k 100k 1 TRAMP + TFALL 2.4 • CT 125 . 0.002 – RT Dead Time = TFALL 1M Figure 3. Oscillator frequency vs. RT and CT. 50 10 5 IC @ t tpu Ou Ω 10 F, 1n = ad Lo e nc ista es R s rie Se IIN @ Load or No Load IC @ No Load 0 0 500k 1M Oscillator Frequency (Hz) 40 35 30 25 1k 1.5M 10k 100k Oscillator Frequency (Hz) Figure 4. Supply current vs. oscillator frequency. Figure 5. Maximum duty cycle vs. frequency. 6 CT=100pF 15 45 CT=330pF Supply Current (mA) 20 CT=1nF Maximum Duty Cycle (%) 25 1M UCC1806 UCC2806 UCC3806 TYPICAL APPLICATION UDG-95036 UNITRODE CORPORATION 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 7