UCC1888 UCC2888 UCC3888 Off-line Power Supply Controller FEATURES DESCRIPTION • Transformerless Off-line Power Supply • Wide 100VDC to 400VDC Allowable Input Range • Fixed 5VDC or Adjustable Low Voltage Output The UCC3888 controller is optimized for use as an off-line, low power, low voltage, regulated bias supply. The unique circuit topology utilized in this device can be visualized as two cascaded flyback converters, each operating in the discontinuous mode, both driven from a single external power switch. The significant benefit of this approach is the ability to achieve voltage conversion ratios as high as 400V to 2.7V with no transformer and low internal losses. • Output Sinks 200mA, Sources 150mA Into a MOSFET Gate • • • The control algorithm utilized by the UCC3888 sets the switch on time inversely proportional to the input line voltage and sets the switch off time inversely proportional to the output voltage. This action is automatically controlled by an internal Uses Low Cost SMD Inductors feedback loop and reference. The cascaded configuration allows a voltage conversion from 400V to 2.7V to be achieved with a switch duty cycle of 7.6%. This topolShort Circuit Protected ogy also offers inherent short circuit protection since as the output voltage falls to zero, the switch off time approaches infinity. Optional Isolation Capability The output voltage is set internally to 5V. It can be programmed for other output voltages with two external resistors. An isolated version can be achieved with this topology as described further in Unitrode Application Note U-149. OPERATION With reference to the application diagram below, when input voltage is first applied, the current through RON into TON is directed to VCC where it charges the external capacitor, C3, connected to VCC. As voltage builds on VCC, an internal undervoltage lockout holds the circuit off and the output at DRIVE low until VCC reaches 8.4V. At this time, DRIVE goes high turning on the power switch, Q1, and redirecting the current into TON to the timing capacitor, CT. CT charges to a fixed threshold with a current ICHG=0.8 • (VIN - 4.5V)/RON. Since DRIVE will only be high for as long as CT charges, the power switch on time will be inversely proportional to line voltage. This provides a constant (line voltage) • (switch on time) product. TYPICAL APPLICATION Note: This device incorporates patented technology used under license from Lambda Electronics, Inc. 3/97 UDG-96013 UCC1888 UCC2888 UCC3888 OPERATION (cont.) At the end of the on time, Q1 is turned off and the current through RON is again diverted to VCC. Thus the current through RON, which charges CT during the on time, contributes to supplying power to the chip during the off time. IDCHG = (VOUT - 0.7V) / ROFF As VOUT increases, IDCHG increases reducing off time. The operating frequency increases and VOUT rises quickly to its regulated value. The power switch off time is controlled by the discharge of CT which, in turn, is programmed by the regulated output voltage. The relationship between CT discharge current, IDCHG, and output voltage is illustrated as follows: Region 3. In this region, a transconductance amplifier reduces IDCHG in order to maintain a regulated VOUT. Region 4. If VOUT should rise above its regulation range, IDCHG falls to zero and the circuit returns to the minimum frequency established by RS and C T. The range of switching frequencies is established by RON, ROFF, RS, and CT as follows: Frequency = 1/(TON + TOFF) TON = RON • CT • 4.6 V/(VIN - 4.5V) TOFF (max) = 1.4 • RS • CT Regions 1 and 4 Region 1. When VOUT = 0, the off time is infinite. This feature provides inherent short circuit protection. However, to ensure output voltage startup when the output is not a short, a high value resistor, RS, is placed in parallel with CT to establish a minimum switching frequency. TOFF = ROFF • CT • 3.7V /(VOUT - 0.7V) Region 2, excluding the effects of RS which have a minimal impact on TOFF. The above equations assume that VCC equals 9V. The voltage at TON increases from approximately 2.5V to 6.5V while CT is charging. To take this into account, VIN is adjusted by 4.5V in the calculation of TON. The voltage at TOFF is approximately 0.7V. Region 2. As VOUT rises above approximately 0.7V to its regulated value, IDCHG is defined by ROFF, and is equal to: DESIGN EXAMPLE The UCC3888 regulates a 5 volt, 1 Watt nonisolated DC output from AC inputs between 80 and 265 volts. In this example, the IC is programmed to deliver a maximum on time gate drive pulse width of 2.2 microseconds which occurs at 80 VAC. The corresponding switching frequency is approximately 100kHz at low line, and overall efficiency is approximately 50%. Additional design information is available in Unitrode Application Note U-149. UDG-96014 2 UCC1888 UCC2888 UCC3888 ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAM ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA Current into TON Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5mA Voltage on VOUT Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V Current into TOFF Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250µA Storage Temperature . . . . . . . . . . . . . . . . . . . . -65°C to +150°C Note: Unless otherwise indicated, voltages are referenced to ground and currents are positive into, negative out of, the specified terminals. DIL-8, SOIC-8 (Top View) N or J, D Package ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications hold for TA = 0°C to 70°C for the UCC3888, -40°C to +85°C for the UCC2888, and -55°C to +125°C for the UCC1888. No load at DRIVE pin (CLOAD=0). PARAMETER TEST CONDITIONS MIN TYP MAX UNITS 8.6 9.0 150 9.3 250 V µA 1.2 2.5 mA 8.4 6.3 8.8 6.6 V V General VCC Zener Voltage Startup Current Operating Current I(VCC) Under-Voltage-Lockout Start Threshold Minimum Operating Voltage after Start Hysteresis Oscillator Amplitude CT to DRIVE high Propagation Delay ICC < 1.5mA VOUT = 0 VCC = VCC(zener) – 100mV, F = 150kHz VOUT = 0 VOUT = 0 8.0 6.0 VOUT = 0 1.8 VCC = 9V Overdrive = 0.2V 3.5 V 3.7 100 3.9 200 V ns Overdrive = 0.2V 50 100 ns VOL I = 20mA, VCC = 9V I = 100mA, VCC = 9V 0.15 0.7 0.4 1.8 V V VOH I = −20mA, VCC = 9V I = −100mA, VCC = 9V Rise Time Fall Time CLOAD = 1nF CLOAD = 1nF CT to DRIVE low Propagation Delay Driver Line Voltage Detection Charge Coefficient: ICHG / I(TON) VCT = 3V, DRIVE = High, I(TON) = 1mA Minimum Line Voltage for Fault Minimum Current I(TON) for Fault RON = 330k RON = 330k On Time During Fault Oscillator Restart Delay after Fault CT = 150pF, VLINE = Min − 1V VOUT Error Amp VOUT Regulated 5V (ADJ Open) 8.5 6.1 8.8 7.8 V V 35 30 70 60 0.73 0.79 0.85 60 80 220 100 ns ns V µA µs ms 2 0.5 VCC = 9V, IDCHG = I(TOFF)/2 4.5 5.0 5.5 V Discharge Ratio: IDCHG / I(TOFF) Voltage at TOFF I(TOFF) = 50µA I(TOFF) = 50µA 0.95 0.6 1.01 0.95 1.07 1.3 V Regulation gm (Note 1) Max IDCHG = 50µA Max IDCHG = 125µA 1.9 2.4 4.1 7.0 mA/V mA/V ∆IDCHG Note 1: gm is defined as for the values of VOUT when VOUT is in regulation. The two points used to calculate gm are for ∆VOUT IDCHG at 65% and 35% of its maximum value. 3 UCC1888 UCC2888 UCC3888 PIN DESCRIPTIONS ADJ: The ADJ pin is used to provide a 5V regulated supply without additional external components. Other output voltages can be obtained by connecting a resistor divider between VOUT, ADJ and GND. Use the formula TOFF (regulated output control): TOFF sets the discharge current of the timing capacitor through an external resistor connected between VOUT and TOFF. TON (line voltage control): TON serves three functions. When CT is discharging (off time), the current through TON is routed to VCC. When CT is charging (on time), the current through TON is split 80% to set the CT charge time and 20% to sense minimum line voltage which occurs for a TON current of 220µA. For a minimum line voltage of 80V, RON is 330kΩ. R1 + R2 VOUT = 2.5V • R2 where R1 is connected between VOUT and ADJ, and R2 is connected between ADJ and GND. R1 || R2 should be less than 1kΩ to minimize the effect of the temperature coefficient of the internal 30k resistors which also connect to VOUT, ADJ, and GND. See Block Diagram. The CT voltage slightly affects the value of the charge current during the on time. During this time, the voltage at the TON pin increases from 2.5V to 6.5V. CT (timing capacitor): The signal voltage at CT has a peak-to-peak swing of 3.7V for 9V VCC. As the voltage at CT crosses the oscillator upper threshold, DRIVE goes low. As the voltage on CT crosses the oscillator lower threshold, DRIVE goes high. VCC (chip supply voltage): The supply voltage of the device at pin VCC is internally clamped at 9V. The device needs an external supply, from a source such as the rectified AC line or derived from the switching circuit. Precautions must be taken to ensure that total ICC does not exceed 8mA. DRIVE: This output is a CMOS stage capable of sinking 200mA peak and sourcing 150mA peak. The output voltage swing is 0 to VCC. VOUT (regulated output): The VOUT pin is directly connected to the power supply output voltage. When V OUT is greater than VCC, VOUT bootstraps VCC. GND (chip ground): All voltages are measured with respect to GND. BLOCK DIAGRAM UDG-96015 4 UCC1888 UCC2888 UCC3888 TYPICAL CHARACTERISTICS CURVES UNITRODE CORPORATION 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. 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