SFP70N06
Wisdom Technologies Int’l
N-Channel MOSFET
Features
Low RDS(on) (0.015Ω )@VGS=10V
■
Low Gate Charge (Typical 65nC)
Low Crss (Typical 150pF)
Improved dv/dt Capability
100% Avalanche Tested
Maximum Junction Temperature Range (175°C)
■
■
■
■
{
Symbol
■
2. Drain
●
◀
1. Gate{
▲
●
●
{
General Description
This Power MOSFET is produced using Wisdom’s advanced
planar stripe, DMOS technology. This latest technology has been
especially designed to minimize on-state resistance, have a low
gate charge with superior switching performance, and rugged
avalanche characteristics. This Power MOSFET is well suited
for synchronous DC-DC Converters and Power Management in
portable and battery operated products.
3. Source
TO-220
1 2
3
Absolute Maximum Ratings
Symbol
VDSS
ID
Value
Units
Drain to Source Voltage
Parameter
60
V
Continuous Drain Current(@TC = 25°C)
70
A
Continuous Drain Current(@TC = 100°C)
51
A
280
A
IDM
Drain Current Pulsed
VGS
Gate to Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note 2)
Peak Diode Recovery dv/dt
(Note 3)
dv/dt
PD
TSTG, TJ
TL
(Note 1)
Total Power Dissipation(@TC = 25 °C)
Derating Factor above 25 °C
Operating Junction Temperature & Storage Temperature
±25
V
800
mJ
7.0
V/ns
158
W
1.05
W/°C
- 55 ~ 175
°C
300
°C
Maximum Lead Temperature for soldering purpose,
1/8 from Case for 5 seconds.
Thermal Characteristics
Symbol
Parameter
Value
Min.
Typ.
Max.
Units
RθJC
Thermal Resistance, Junction-to-Case
-
-
0.95
°C/W
RθCS
Thermal Resistance, Case to Sink
-
0.5
-
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
-
-
62.5
°C/W
1/7
June, 2004. Rev. 0.
Copyright@Wisdom Technologies International, All rights reserved.
SFP70N06
Electrical Characteristics
Symbol
( TC = 25 °C unless otherwise noted )
Parameter
Test Conditions
Min
Typ
Max
Units
60
-
-
V
-
0.06
-
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250uA
Δ BVDSS/
Δ TJ
Breakdown Voltage Temperature
coefficient
ID = 250uA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
IGSS
VDS = 60V, VGS = 0V
-
-
1
uA
VDS = 48V, TC = 150 °C
-
-
10
uA
Gate-Source Leakage, Forward
VGS = 25V, VDS = 0V
100
nA
Gate-Source Leakage, Reverse
VGS = -25V, VDS = 0V
-
-
-100
nA
2.0
-
4.0
V
-
0.013
0.015
Ω
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250uA
RDS(ON)
Static Drain-Source On-state Resistance
VGS =10 V, ID = 35A
Dynamic Characteristics
Ciss
Input Capacitance
-
2200
2900
Coss
Output Capacitance
-
650
850
Crss
Reverse Transfer Capacitance
-
150
195
-
30
70
-
60
130
-
125
260
-
95
200
VGS =0 V, VDS =25V, f = 1MHz
pF
Dynamic Characteristics
td(on)
tr
td(off)
tf
Turn-on Delay Time
VDD =30V, ID =35A, RG =50Ω
Rise Time
Turn-off Delay Time
※ see fig. 13.
Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge(Miller Charge)
(Note 4, 5)
-
65
85
VDS =48V, VGS =10V, ID =70A
-
17
-
※ see fig. 12.
-
23
-
Min.
Typ.
Max.
-
-
70
-
-
280
(Note 4, 5)
ns
nC
Source-Drain Diode Ratings and Characteristics
Symbol
Parameter
IS
Continuous Source Current
ISM
Pulsed Source Current
Integral Reverse p-n Junction
Diode in the MOSFET
Test Conditions
VSD
Diode Forward Voltage
IS =70A, VGS =0V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IS=70A,VGS=0V,dIF/dt=100A/us
Unit.
A
-
-
1.5
V
-
62
-
ns
-
110
-
nC
※ NOTES
1. Repeativity rating : pulse width limited by junction temperature
2. L = 250 uH, IAS = 70A, VDD = 25V, RG = 0Ω , Starting TJ = 25°C
3. ISD ≤ 70A, di/dt ≤ 300A/us, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse Width ≤ 300us, Duty Cycle ≤ 2%
5. Essentially independent of operating temperature.
2/7
Copyright@Wisdom Technologies International, All rights reserved.
SFP70N06
Fig 1. On-State Characteristics
Fig 2. Transfer Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Top :
ID, Drain Current [A]
10
2
10
ID, Drain Current [A]
2
1
10
o
175 C
1
10
o
25 C
o
-55 C
※ Notes :
1. 250µ s Pulse Test
2. TC = 25℃
※ Notes :
1. VDS = 25V
2. 250µ s Pulse Test
0
0
10
-1
10
0
10
1
10
2
10
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Fig 4. On State Current vs.
Allowable Case Temperature
Fig 3. On Resistance Variation vs.
Drain Current and Gate Voltage
25
IDR, Reverse Drain Current [A]
RDS(ON),
Drain-Source On-Resistance [mΩ ]
30
20
VGS = 20V
VGS = 10V
15
10
5
2
10
1
10
175℃
25℃
※ Notes :
1. VGS = 0V
2. 250µ s Pulse Test
※ Note : TJ = 25℃
0
0
0
50
100
150
200
250
300
10
0.2
0.4
ID, Drain Current [A]
1.0
1.2
1.4
1.6
1.8
Fig 6. Gate Charge Characteristics
5500
12
4500
VGS, Gate-Source Voltage [V]
Ciss=Cgs+Cgd(Cds=shorted)
Coss=Cds+Cgd
Crss=Cgd
5000
4000
Capacitance [pF]
0.8
VSD, Source-Drain voltage [V]
Fig 5. Capacitance Characteristics
※ Notes :
1. VGS = 0V
2. f=1MHz
3500
3000
Ciss
2500
2000
Coss
1500
1000
500
0
0.6
VDS = 30V
10
VDS = 48V
8
6
4
2
※ Note : ID = 70.0 A
Crss
0
5
10
15
20
25
VDS, Drain-Source Voltage [V]
30
35
0
0
10
20
30
40
50
60
70
QG, Total Gate Charge [nC]
3/7
Copyright@Wisdom Technologies International, All rights reserved.
SFP70N06
Fig 7. Breakdown Voltage Variation
vs. Junction Temperature
Fig 8. On-Resistance Variation
vs. Junction Temperature
3.0
RDS(ON), (Normalized)
Drain-Source On-Resistance
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 µ A
0.9
0.8
-100
-50
0
50
100
150
2.5
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 35 A
0.5
0.0
-100
200
-50
100
150
200
150
175
Fig 10. Maximum Drain Current
vs. Case Temperature
3
70
10
Operation in This Area
is Limited by R DS(on)
60
100 µs
2
10
ID' Drain Current [A]
ID, Drain Current [A]
50
TJ, Junction Temperature [ C]
Fig 9. Maximum Safe Operating Area
1 ms
10 ms
DC
1
10
※ Notes :
o
1. TC = 25 C
o
2. TJ = 175 C
3. Single Pulse
50
40
30
20
10
0
10
-1
10
0
o
o
TJ, Junction Temperature [ C]
0
1
10
0
25
2
10
10
50
VDS, Drain-Source Voltage [V]
75
100
125
o
TC' Case Temperature [ C]
Fig 11. Transient Thermal Response Curve
Zθ JC(t), Thermal Response
10
0
D = 0 .5
※ N o te s :
1 . Z θ J C( t) = 0 .9 5 ℃ /W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C( t)
0 .2
10
0 .1
-1
0 .0 5
0 .0 2
0 .0 1
s in g le p u ls e
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
4/7
Copyright@Wisdom Technologies International, All rights reserved.
10
1
SFP70N06
Fig. 12. Gate Charge Test Circuit & Waveforms
50K
Ω
1
2V
V
G
S
S
a
m
eT
yp
e
a
sD
U
T
20
0nF
Q
g
1
0
V
3
00n
F
V
D
S
V
G
S
Q
g
s
Q
g
d
D
U
T
1m
A
C
h
a
rg
e
Fig 13. Switching Time Test Circuit & Waveforms
R
L
V
D
S
V
D
S
9
0
%
V
D
D
(0
.5
r
a
te
d
V
)
D
S
1
0
%
1
0
V
V
in
D
U
T
R
G
P
u
ls
e
G
e
n
e
r
a
to
r
td
(
o
n
)
tr
td
(
o
ff)
to
n
tf
to
ff
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
V
D
S
V
D
D
ID
B
V
D
S
S
1
2------------------E
=---- L
A
S
LI
A
S
2
-V
B
V
D
S
SD
D
B
V
D
S
S
IA
S
R
G
1
0
V
ID(t)
D
U
T
V
(t)
D
S
V
D
D
tp
T
im
e
5/7
Copyright@Wisdom Technologies International, All rights reserved.
SFP70N06
Fig. 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
IS
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• IS controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
Body Diode
Forward Voltage Drop
6/7
Copyright@Wisdom Technologies International, All rights reserved.
VDD
SFP70N06
TO-220 Package Dimension
Dim.
mm
Typ.
Min.
9.7
6.3
9.0
12.8
1.2
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
Max.
10.1
6.7
9.47
13.3
1.4
Inch
Typ.
Min.
0.382
0.248
0.354
0.504
0.047
1.7
2.5
0.067
0.098
3.0
1.25
2.4
5.0
2.2
1.25
0.45
0.6
3.4
1.4
2.7
5.15
2.6
1.55
0.6
1.0
Ø
0.118
0.049
0.094
0.197
0.087
0.049
0.018
0.024
0.134
0.055
0.106
0.203
0.102
0.061
0.024
0.039
3.6
E
B
Max.
0.398
0.264
0.373
0.524
0.055
0.142
H
A
φ
I
F
C
M
L
G
1
D
2
1. Gate
2. Drain
3. Source
3
J
N
O
K
7/7
Copyright@Wisdom Technologies International, All rights reserved.