C8051F221 Mixed-Signal 8KB ISP FLASH MCU PRELIMINARY ANALOG PERIPHERALS 8-bit, 22-Channel ADC - 22 External Inputs (Each Port I/O can be configured as an ADC Input on the Fly!) - ±1/2LSB INL - No Missing Codes - Programmable Throughput up to 100ksps Two Comparators - Programmable Hysteresis - Configurable to Generate Interrupts or Reset VDD Monitor and Brown-out Detector ON-CHIP JTAG EMULATION - On-Chip Emulation Circuitry Facilitates Full Speed, Non-Intrusive In-Circuit Emulation - Supports Breakpoints, Single Stepping, Watchpoints - Inspect/Modify Memory and Registers - Superior Performance to Emulation Systems Using ICE-Chips, Target Pods, and Sockets - $99 Development Kit (C8051F226DK) SUPPLY VOLTAGE .................... 2.7V to 3.6V - Typical Operating Current: 9mA @ 25MHz - Multiple Power Saving Sleep and Shutdown Modes 8051-COMPATIBLE µ C Core - Pipelined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25MHz Clock - Expanded Interrupt Handler; Up to 22 Interrupt Sources MEMORY - 256 Bytes Data RAM - 8k Bytes FLASH; In-System Programmable in 512 byte Sectors DIGITAL PERIPHERALS - 22 Port I/O; All are 5V tolerant TM - Hardware SPI and UART Serial Ports Available Concurrently - Three 16-bit Counter/Timers - Dedicated Watch-Dog Timer - Bi-directional Reset CLOCK SOURCES - Internal Programmable Oscillator: 2-to-16MHz - External Oscillator: Crystal, RC, C, or Clock - Can Switch Between Clock Sources on-the-fly; Useful in Power Saving Modes Temperature Range: –40°° C to +85°° C 32-Pin LQFP Package SPI is a trademark of Motorola, Inc. VDD Port I/O Mode & Config. Analog/Digital Power Port 0 Latch P 0 P 0 GND UART Timer 0 D r v M U X Timer 1 P0.0/TX P0.1/RX P0.2//INT0 P0.3//INT1 P0.4/T0 P0.5/T1 P0.6/T2 P0.7/T2EX Timer 2 TCK TMS TDI TDO JTAG Logic Debug HW Reset /RST VDD Monitor WDT XTAL1 XTAL2 External Oscillator Circuit Internal Oscillator System Clock 8 0 5 1 Port 1 Latch 8kbyte FLASH 256 byte SRAM C o SFR Bus r e CP0+ CP0 CP1 CP0 CP1 D r v CP0- M U X CP1+ CP1- Comparator Config. P 2 P 2 Port 2 Latch D r v M U X SPI Port Mux Control Clock & Reset Configuration P 1 P 1 VDD D r v VREF 8-bit 100ksps ADC P2.0/NSS P2.1/MISO P2.2/MOSI P2.3/SCK P2.4 P2.5 P 3 Port 3 Latch ADC Config. & Control P1.0/CP0+ P1.1/CP0P1.2/CP0 P1.3/CP1+ P1.4/CP1P1.5/CP1 P1.6/SYSCLK P1.7 A M U X AIN0-AIN21 VREF 12.20.2000 C8051F221 Mixed-Signal 8KB ISP FLASH MCU PRELIMINARY SELECTED ELECTRICAL SPECIFICATIONS TA = -40°C to +85°C unless otherwise specified. PARAMETER CONDITIONS MIN TYP GLOBAL CHARACTERISTICS Digital Supply Voltage 2.7 Digital Supply Current with Clock=25MHz 9 CPU active Clock=1MHz 0.4 Clock=32kHz 18 Digital Supply Current Oscillator not running 7 (shutdown) Digital Supply RAM Data 1.5 Retention Voltage CPU & DIGITAL I/O PORTS Clock Frequency Range DC Port Output High Voltage IOH = -3mA, Port I/O push-pull VDD – 0.7 Port Output Low Voltage IOL = 8.5mA Input High Voltage 0.8 x VDD Input Low Voltage SPI Bus Clock Frequency fCLK=MCU Clock; SPI in Master Mode A/D CONVERTER Resolution 8 Integral Nonlinearity Differential Nonlinearity Guaranteed Monotonic Signal to Noise Ratio 49 Throughput Rate Input Voltage Range 0 COMPARATORS Response Time | CP+ – CP- | = 100mV 4 Input Voltage Range -0.25 Input Bias Current -5 0.001 Input Offset Voltage -10 PACKAGE INFORMATION MIN NOM MAX (mm) (mm) (mm) D1 A E1 E 32 1 A2 A b UNITS 3.6 V mA mA µA µA V 25 0.6 0.2 x VDD fCLK/2 A1 e - - 1.60 A1 0.05 - 0.15 A2 1.35 1.40 1.45 b 0.30 0.37 0.45 D - 9.00 - D1 - 7.00 - e - 0.80 - E - 9.00 - E1 - 7.00 - MHz V V V V MHz 100 VREF bits LSB LSB dB ksps V VDD + 0.25 +5 +10 µs V nA mV ±1/2 ±1/2 C8051F226DK DEVELOPMENT KIT ($99) D PIN 1 IDENTIFIER MAX