FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode DESCRIPTION FEATURES The FC1703 is designed primarily for use in a receiver front-end of the dual-band, triple-mode system, operating in the Advanced Mobile Phone System (AMPS), Cellular Code-Division Multiple-Access (CDMA), and PCS CDMA. The IC contains low-noise amplifiers (LNA), and mixers with a balanced IF outputs. The unit operates at 2.7V single power and is designed to use with RF SAW filter. It is possible to adjust current level, gain, and IIP3 by changing resistors. The IC is manufactured on a SiGe BiCMOS process, and is packaged in a leadless small package, named MLF-24 l Complete Receiver Front-end of the dual-band Cellular/PCS Mobile-phone System, (AMPS and CDMA) l Integrated LNA, and Down-converting mixers l Triple-mode of LNA l Low Single voltage operation (2.7V) l High Linearity l Low power consumption l Adjustable IIP3, Gain and Current l 4mm x 4mm Small leadless package - Japan CDMA-mode Cellular mobile phone. - CDMA-mode US -PCS mobile phone. - CDMA-mode Korean-PCS mobile phone. - Cellular CDMA/AMPS/US -PCS Dual-band Triple-mode mobile phone. - Japan-CDMA/Korea-PCS Dual-band mobile phone General Purpose Down-Converter. 23 22 21 20 19 PLNA_IN 1 18 FM_IF RLNA 2 17 FM_IFB SEL1 3 16 BufferEn RCMIX 4 15 CDMA_IF CLNA_GND 5 14 CDMA_IFB CLNA_IN 6 13 LO_OUT 9 10 CMIX_GND CMIX_IN 11 12 LO_IN 8 VDD_LO 7 LO/2 /2 CLNA_OUT - 24 RPMIX CDMA-mode Cellular mobile phone. SEL2 - PMIX_IN AMPS-mode Cellular mobile phone. VDD - SEL3 APPLICATIONS PLNA_OUT PIN CONFIGURATION For latest specifications, technical questions and additional product information, visit our website or e-mail us. Web: http://www.fci.co.kr FCI Inc. E-mail : [email protected] 2nd Fl. Korea First Bank B/D, 6-8 Sunae - Dong Pundang- Gu, Sungnam City, Kyunggi-do, Tel : 82-31-711-6444 463-020, KOREA Fax: 82-31- 714-6576 1 / 17 Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode PIN DESCRIPTIONS Pin Function Description Note 1 PLNA_IN High-Band RF Input. Requires a blocking capacitor which may be used as part of the input matching network 2 RLNA LNA Bias-Setting Resistor Connection 3 SEL1 Control Pin. See Truth Table for Mode Select Pin. 4 RCMIX Cellular Mixer Bias-Setting Resistor Connection 5 CLNA_GND Ground Reference for Cellular LNA. This pin should be connected to GND through 0 ohm. 6 CLNA_IN Low -Band RF Input. Requires a blocking capacitor which may be used as part of the input matching network 7 CLNA_OUT Low -Band LNA Output Port. Connect a pull-up inductor to Vcc and an external series blocking capacitor which may be used as a part of the output matching network 8 LO/2 LO Divider-Select Input. LOW disables LO divider, HIGH selects divider in cellular and FM modes. See Truth Table for Mode Select Pin. 9 CMIX_GND Ground Reference for Cellular Mixer. This pin should be connected to GND through 0 ohm. 10 CMIX_IN Low -Band Mixer Input. Requires a blocking capacitor which may be used as part of the input matching network. 11 VDD_LO Power Supply Pin for LO. 12 LO_IN 13 LO_OUT 14 CDMA_IFB 15 CDMA_IF Mixer IF Output. Pin14 and 15 are matched at 50 ohm in EV Board. But they can be matched at differential 1000ohm. 16 BufferEn LO Output Buffer Enable. Drive BufferEn HIGH to power up the LO output buffer associated with the selected band. See Truth Table for Mode Select Pin. 17 FM_IFB 18 FM_IF FM IF Output . Pin17 and 18 are matched at 50 ohm in EV Board. But they can be matched at single-ended 850ohm 19 RPMIX PCS Mixer Bias Setting Resistor Connection 20 SEL2 21 PMIX_IN 22 VDD Power Supply Pin. 23 SEL3 Control Pin. See Truth Table for Mode Select Pin. 24 PLNA_OUT LO Input Port. Requires an external DC blocking capacitor. LO Buffer Output Port. Mixer IFB Output. FM IFB Output Control Pin. See Truth Table for Mode Select Pin. High-Band Mixer Input. Requires a blocking capacitor which may be used as part of the input matching network. High-Band LNA Output Port. Connect a pull-up inductor to Vcc and an external series blocking capacitor which may be used as a part of the output matching network 2 / 17 Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode APPLICATIONS 1. Cellular CDMA/AMPS & US-PCS ABSOLUTE MAXIMUM R ATINGS Parameter Unit Rating Supply Voltage V -0.5~ 3.6 Digital Input Voltage to GND V -0.3 ~ Vcc+0.3 dBm +6 Storage Temperature ℃ -40 ~ +150 Operating Temperature ℃ -40 ~ +85 Junction Temperature ℃ +150 Lead Temperature(Soldering, 10sec) ℃ +240 Input Power Level Note DC ELECTRICAL CHARACTERISTICS (Vcc = 2.6 to 3.1V, T = -40 to +80℃, Typical values are at T = +25℃ and Vcc = 2.7V) Parameter Supply Voltage Specification Unit Min Typ Max Note V 2.7 Cellular CDMA Mode mA 27 34 FM Mode mA 27 34 US-PCS CDMA Mode mA 20 24 Shutdown Mode uA <50 LO Buffer Supply Current mA 7 9 BufferEn = High Additional Operational Current Divider Active mA 2 3 Cellular and FM mode; LO/2=High AC ELECTRICAL CHARACTERISTICS Specification Parameter Unit Note Min Typ Max OVERALL CONDITION Low-Band RF Frequency Range MHz 869 894 High-Band RF Frequency Range MHz 1930 1990 Low-Band LO Frequency Range MHz 950 1100 High-Band LO Frequency Range MHz 1750 2210 IF Frequency Range MHz 80 220 LO Input Level dBm -15 3 / 17 -5 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode Specification Parameter Unit Note Typ Max CELLULAR LNA PERFORMANCE HIGH-GAIN MODE Gain Noise Figure IIP3 dB 14.5 dB 15.5 1.5 dBm 8 9.5 MID-GAIN MODE Gain dB 4 5 Noise Figure dB 4 IIP3 dBm 8.5 10 BYPASS MODE Gain dBm -3 -2 Noise Figure IIP3 dB 3 dBm 18.5 20 dB 15.5 16.5 2.0 4.5 3.5 US-PCS LNA PERFORMANCE HIGH-GAIN MODE Gain Noise Figure IIP3 dB 1.8 dBm 6.5 8 Gain dB -3.5 -3 Noise Figure dB 2.2 BYPASS MODE IIP3 4 dBm 18.5 20 dB 11 13 6 CELLULAR MIXER PERFORMANCE CDMA MODE Gain Noise Figure IIP3 dB 7 dBm 5 8 Gain dB 11 13 Noise Figure dB 9 FM MODE IIP3 US-PCS MIXER PERFORMANCE Gain Noise Figure IIP3 7 dBm 5 8 dB 9.5 11 dB dBm 6 3 9 8 5 ALL MODES BufferEn = HIGH PLO = -5dBm *note : Gain, IIP3, NF and Current are adjustable by changing resistor R1,R2 and R8 LO Output Level dBm -7 4 / 17 -6 Last Update 03/28/03 Diplexer 5 / 17 Cellular Tx 824 to 849MHz 23 22 6 5 4 8 9 Cellular Rx 869 to 894 MHz 7 /2 228MHz CDMA/AMPS IF 263MHz US-PCS IF 13 14 15 16 3 12 19 17 11 20 2 10 21 18 FC1703 24 1 LO Input from PLL 2104 to 2173MHz US-PCS Tx 1850 to 1910MHz Cellular Duplexer US-PCS Duplexer 0 90 LO Output from FC1703 1052 to 1077MHz for Cellular 2113 to 2173MHz for US-PCS 183.6MHz US-PCS/CDMA IF 183.6MHz AMPS IF 0 Tx Q Tx I 90 Rx Q Rx I QDAC IDAC FMQADC QADC FMIADC IADC demodulator modulator US-PCS Rx 1930 to 1990 MHz Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode SYSTEM BLOCK CONFIGURATION Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode T YPICAL APPLICATION SCHEMATIC (Cellular CDMA/AMPS & US-PCS) J9 PMIX_IN C20 2.7pF *0.15dB Line Loss* C14 3pF C19 100nF R7 3k ohm L11 4.7nH L7 J10 PLNA_OUT C16 10nF R8 20k ohm(1%) PLNA_IN C1 10nF 19 20 21 22 RPMIX SEL2 VDD PMIX_IN 24 1 BufferEN SEL3 PLNA_OUT J1 PLNA_IN 23 C21 10nF 18 FM_IF 17 2 RLNA L1 R1 30k ohm(1%) 6.8nH J8 FM_IF *0.05dB Line Loss* C18 1.8pF VCC 27nH C13 3pF VCC *0.15dB Line Loss* C15 9pF L9 56nH SEL2 SEL3 *0.15dB Line Loss* C17 10nF L8 27nH VCC L10 3.9nH SEL1 FM_IFB SEL1 RCMIX R6 3k ohm 14 CLNA_GND J7 CDMA_IF *0.05dB Line Loss* CDMA_IF C10 8pF *1.5dB Transformer Loss* VCC CDMA_IFB 13 6 L5 27nH LO_IN C8 3pF C11 10nF N1:N2=16:1 12 11 VDD_LO CMIX_IN CMIX_GND 0 ohm 10 8 9 LO/2 CLNA_OUT LO_OUT 7 R3 TX1 15 5 CLNA_IN C12 10nF L6 27nH BufferEn FC1703 4 R2 10k ohm(1%) C9 3pF 16 3 J2 CLNA_IN J6 LO_OUT C2 10nF *0.1dB Line Loss* L2 3.9nH C7 10nF R4 0 ohm *0.2dB Line Loss for Cellular* *0.3dB Line Loss for PCS* VCC J3 CLNA_OUT J5 LO_IN LO/2 C3 3.3pF *0.15dB Line Loss* C6 10nF R5 *0.2dB Line Loss for Cellular* *0.3dB Line Loss for PCS* 100 ohm L3 8.2nH J4 CMIX_IN VCC C4 100nF *R3 & R4 is necessary component. (The distances between FC1703 and R3 and FC1703 and R4 are as short as possible.) C5 1.8pF *0.2dB Line Loss* L4 12nH **CDMA_IF and AMPS_IF tuned to 180MHz VCC 1 2 3 4 5 6 2.7V S1 LO/2 BUF C 100pF C 100nF NC S3 S2 NOTE: RF and IF matching component values are dependent on board layout, RF and IF SAW filter and the IF frequency selected. Please contact FCI application engineering for assistance. - Measurement Condition VDD : 2.7V Low-Band LNA RF Frequency : 869 ~ 894 MHz (Center : 880 MHz) RF input Power : -30 ~ -25 dBm Low-Band Mixer RF Frequency : 869 ~ 894 MHz (Center : 880 MHz) RF input Power : -30 ~ -25 dBm Low-Band Mixer LO Frequency : 2098 ~ 2148 MHz (Center : 2120 MHz) LO input Power : -5 dBm High-Band LNA RF Frequency : 1930 ~ 1990 MHz (Center : 1960 MHz) RF input Power : -30 ~ -25 dBm High-Band Mixer RF Frequency :1930 ~ 1990 MHz (Center : 1960 MHz) RF input Power : -30 ~ -25 dBm High-Band Mixer LO Frequency :2110 ~ 2170 MHz (Center : 2140 MHz) LO input Power : -5 dBm Mixer IF Frequency : 180 MHz 6 / 17 Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode 2. J-CDMA & K-PCS ABSOLUTE MAXIMUM R ATINGS Unit Rating Supply Voltage Parameter V -0.5~ 3.6 Digital Input Voltage to GND V -0.3 ~ Vcc+0.3 dBm +6 Storage Temperature ℃ -40 ~ +150 Operating Temperature ℃ -40 ~ +85 Junction Temperature ℃ +150 Lead Temperature(Soldering, 10sec) ℃ +240 Input Power Level Note DC ELECTRICAL CHARACTERISTICS (Vcc = 2.6 to 3.1V, T = -40 to +80℃, Typical values are at T = +25℃ and Vcc = 2.7V) Specification Parameter Unit Min Typ Max Note Supply Voltage V 2.7 J-CDMA Mode mA 27 34 K-PCS CDMA Mode mA 20 24 Shutdown Mode uA <50 LO Buffer Supply Current mA 7 9 BufferEn = High Additional Operational Current Divider Active mA 2 3 J-CDMA mode; LO/2=High AC ELECTRICAL CHARACTERISTICS Specification Parameter Unit Note Min Typ Max OVERALL CONDITION J-CDMA RF Frequency Range MHz 831 871 K-PCS RF Frequency Range MHz 1840 1870 LO Frequency Range MHz 2000 IF Frequency Range MHz LO Input Level dBm 2110 183.6 -15 7 / 17 -5 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode Specification Parameter Unit Note Min Typ 14.5 15.5 Max J-CDMA LNA PERFORMANCE HIGH-GAIN MODE Gain dB Noise Figure dB IIP3 1.5 dBm 8 9.5 MID-GAIN MODE Gain dB 4 5 Noise Figure dB 4 IIP3 dBm 8.5 10 BYPASS MODE Gain dBm -3 -2 Noise Figure IIP3 dB 3 dBm 18.5 20 Gain dB 15.5 16.5 Noise Figure dB *note 2.0 *note *note 4.5 3.5 K-PCS LNA PERFORMANCE HIGH-GAIN MODE IIP3 1.8 dBm 6.5 8 Gain dB -3.5 -3 Noise Figure dB *note 2.2 *note *note BYPASS MODE IIP3 J-CDMA MIXER PERFORMANCE Gain Noise Figure IIP3 4 dBm 18.5 20 dB 11 13 dB 7 dBm 5 8 K-PCS MIXER PERFORMANCE Gain dB 9 10.5 Noise Figure dB IIP3 dBm 6 3 5 6 *note 9 *note *note *note 8 *note *note ALL MODES BufferEn = HIGH PLO = -5dBm *note : Gain, IIP3, NF and Current are adjustable by changing resistor R1,R2 and R8 LO Output Level dBm -7 8 / 17 -6 Last Update 03/28/03 Diplexer 9 / 17 J-CDMA Tx 886.85 to 925.35 MHz 23 6 5 8 9 J-CDMA Rx 831.85 to 870.35 MHz 7 128.6 MHz J-CDMA IF 273.6 MHz K-PCS IF 13 14 15 16 3 4 17 12 19 2 11 20 18 10 21 1 /2 22 FC1703 24 LO Input from PLL 2030.9 to 2107.9 MHz for J-CDMA 2023.6 to 2053.6 MHz for K-PCS K-PCS Tx 1750 to 1780 MHz J-CDMA Duplexer K-PCS Duplexer 0 0 90 LO Output from FC1704 1015.45 to 1053.95MHz for J-CDMA 2023.6 to 2053.6 MHz for K-PCS 183.6MHz J-CDMA/K-PCS IF Tx Q Tx I 90 Rx Q Rx I QDAC IDAC FMQADC QADC FMIADC IADC demodulator modulator K-PCS Rx 1840 to 1870 MHz Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode SYSTEM BLOCK CONFIGURATION Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode T YPICAL APPLICATION SCHEMATIC C14 4pF J8 PMIX_IN (J-CDMA & K-PCS) C13 100nF *0.15dB Line Loss* VCC L7 2.7nH SEL3 SEL2 L8 4.7nH VCC C15 10nF J9 PLNA_OUT R7 1 20 19 21 22 18 PLNA_IN C1 10nF *0.15dB Line Loss* BufferEN RPMIX SEL2 PMIX_IN VDD SEL3 PLNA_OUT J1 PLNA_IN 23 20k ohm(1%) 24 *0.15dB Line Loss* SEL1 RLNA FM_IFB SEL1 BufferEn NC FC1703 RCMIX L6 27nH CLNA_GND J7 IF *0.05dB Line Loss* CDMA_IF 5 R6 3k ohm C10 9pF *1.5dB Transformer Loss* VCC CDMA_IFB 13 L5 27nH LO_IN C11 10nF C7 3pF 12 11 CMIX_IN 10 VDD_LO LO_OUT CMIX_GND 9 8 7 LO/2 CLNA_OUT 6 R3 TX1 15 14 CLNA_IN C12 10nF 3pF 16 3 4 R2 9.1k ohm(1%) C9 17 2 R1 30k ohm(1%) L1 6.8nH NC FM_IF N1:N2=16:1 0 ohm J2 CLNA_IN J6 LO_OUT L2 C2 10nF *0.1dB Line Loss* 5.6nH C6 10nF R4 0 ohm *0.2dB Line Loss for Cellular* *0.3dB Line Loss for PCS* VCC J3 CLNA_OUT J5 LO_IN C3 3.3pF *0.15dB Line Loss* LO/2 R5 100 ohm L3 6.8nH *0.25dB Line Loss for PCS* J4 CMIX_IN VCC C4 100nF *R3 & R4 is necessary component. (The distances between FC1703 and R3 and FC1704 and R4 are as short as possible.) *0.2dB Line Loss for Cellular* C5 1.8pF *0.2dB Line Loss* L4 12nH **IF tuned 180MHz 1 2 3 4 5 6 S1 LO/2 BUF VCC NC S3 S2 2.7V C 100pF C 100nF NOTE: RF and IF matching component values are dependent on board layout, RF and IF SAW filter and the IF frequency selected. Please contact FCI application engineering for assistance. - Measurement Condition VDD : 2.7V Low-Band LNA RF Frequency : 869 ~ 894 MHz (Center : 880 MHz) RF input Power : -30 ~ -25 dBm Low-Band Mixer RF Frequency : 869 ~ 894 MHz (Center : 880 MHz) RF input Power : -30 ~ -25 dBm Low-Band Mixer LO Frequency : 2098 ~ 2148 MHz (Center : 2120 MHz) LO input Power : -5 dBm High-Band LNA RF Frequency : 1930 ~ 1990 MHz (Center : 1960 MHz) RF input Power : -30 ~ -25 dBm High-Band Mixer RF Frequency :1930 ~ 1990 MHz (Center : 1960 MHz) RF input Power : -30 ~ -25 dBm High-Band Mixer LO Frequency :2110 ~ 2170 MHz (Center : 2140 MHz) LO input Power : -5 dBm Mixer IF Frequency : 180 MHz 10 / 17 Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode TRUTH T ABLE FOR M ODE SELECT PIN 1. Mode Selection & Gain Control MODE Cellular CDMA with High-Gain LNA Cellular CDMA with Mid-Gain LNA Cellular CDMA with bypass LNA Cellular FM PCS CDMA with High-Gain LNA PCS CDMA with bypass LNA Power Down SEL1 0 0 0 0 1 1 1 SEL2 0 0 1 1 0 1 1 SEL3 0 1 0 1 0 0 1 2. LO Divider Control Band Mode LO/2 Cellular AMPS / CDMA LO (Use 1GHz band) 0 LO/2 (User 2.1GHz band) 1 3. LO Output Buffer Control Band Mode BufferEN Cellular AMPS / CDMA LO Output Buffer for Tx OFF 0 LO Output Buffer for Tx ON 1 LO Output Buffer for Tx OFF 0 LO Output Buffer for Tx ON 1 PCS 11 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode EVALUATION BOARD INFORMATIONS Board Size 6cm x 6cm, Board Thickness 0.8mm, Board Material FR-4, Multi-Layer Assembly Top Back 12 / 17 Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode PACKAGE INFORMATION 4.00 2.00 3.75 1.875 0.50 DIA Line 1703 3.75 4.00 YMDX 1.875 2.00 Device Marking Description 1 FCI's Company Name 2 1703 = Product Name 3 YMDX LOT Code Y = Year code M = Month code D = Day code X = Manufacture code Pin 1 Identifier Top View 0.42 0.85 0.23 0.01 2.34 0.65 1.17 PIN1 ID 0.20 R 0.20 0.42 0.45 2.34 2.50 1.17 0.25 MIN 0.40 0.25 MIN 12° 0.50 2.50 Side View Bottom View . 13 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode RECOMMENDED BOARD LAND PATTERN DIMENSIONS Size Z G A D W X Y 4.36 2.98 2.78 2.68 0.22 0.28 0.69 All Dimensions in mm - The solder mask opening should be 120 to 150 microns larger than the pad size resulting in 60 to 75 micron clearance between the copper pad and solder mask. - Typically each pad on the PCB should have its own solder mask opening with a web of solder mask between two adjacent pads. - It should be noted that the inner edge of the solder mask should be rounded, especially for corner leads to allow for enough solder mask web in the corner area. - It is recommended that an array of thermal vias should be incorporated at 1.0 to 1.2mm pitch with via diameter of 0.3 to 0.33mm. - The mask opening should be 100 microns smaller than the thermal land size on all four sides. - The solder mask diameter should be 100 microns larger than the via diameter. 14 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode TAPE / REEL FORMS AND DIMENSIONS 7” Reel Dimension ORDERING INFORMATION FC1203_BLK FC1203_TR1 FC1203_TR2 FC1203_EVB No of Device 10 1,500 2,500 1 15 / 17 Container Bulk (Anti-static bag) 7” tape and reel 13” tape and reel Anti-static bag Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode RECOMMENDED CONDITION FOR REFLOW S OLDERING Figure 1 shows the typical process flow for mounting surface mount packages to printed circuit boards. The same process can be used for mounting the MLFs without any modifications. It is important to include post print and post reflow inspection, especially during process development. The volume of paste printed should be measured either by 2D or 3D techniques. The paste volume should be around not recommended. However, the temperature should not exceed 240℃ and the time above liquidus temperature should be less than 75 seconds. The maximum temperature can be increased for Pb free solder if the package has been qualified for higher temperature moisture sensitivity level. The ramp rate during preheat should be 3℃/second or lower. 80 to 90% of stencil aperture volume to indicate good paste release. After reflow, the mounted package should be inspected in transmission xray for the presence of voids, solder balling, or other defects. Cross-sectioning may also be required to determine the fillet shape and size and joint standoff height. A typical reflow profile for No Clean solder paste is shown in Figure 2. Since the actual reflow profile depends on the solder paste being used and the board density, a specific profile is Figure 1. Typical PCB Mounting Process Flow. Figure 2. Typical Solder Reflow Profile (from Application Notes for Amkor’s MLF Package) 16 / 17 Last Update 03/28/03 FC1703 Future Communications Integrated circuit Inc. Receiver RFIC for Dual-Band Triple Mode REWORK GUIDELINES Since solder joints are not fully exposed in the case of MLFs, any retouch is limited to the side fillet. For defects underneath the package, the whole package has to be removed. Rework of MLF packages can be a challenge due to their small size. In most applications, MLFs will be mounted on smaller, thinner, and denser PCBs that introduces further challenges due to handling and heating issues. Since reflow of adjacent parts is not desirable during rework, the proximity of other components may further complicate this process. Because of the product dependent complexities, the following only provides a guideline and a starting point for the development of a successful rework process for these packages. The rework process involves the following steps: ¨ Component Removal ¨ Site Redress ¨ Solder Paste Application, ¨ Component Placement, and ¨ Component Attachment. These steps are discussed in the following in more detail. Prior to any rework, it is strongly recommended that the PCB assembly be baked for at least 4 hours at 125℃ to remove any residual moisture from the assembly. 4.1. Component Removal The first step in removal of component is the reflow of solder joints attaching component to the board. Ideally the reflow profile for part removal should be the same as the one used for part attachment. However, the time above liquidus can be reduced as long as the reflow is complete. In the removal process, it is recommended that the board should be heated from the bottom side using convective heaters and hot gas or air should be used on the top side of he component. Special nozzles should be used to direct the heating in the component area and heating of adjacent components should be minimized. Excessive airflow should also be avoided since this may cause CSP to skew. Air velocity of 15 – 20 liters per minute is a good starting point. Once the joints have reflowed, the Vacuum lift-off should be automatically engaged during the transition from reflow to cooldown. Because of their small size the vacuum pressure should be kept below 15” of Hg. This will allow the component not to be lifted out if all joints have not been reflowed and avoid the pad liftoff. 4.2. Site Redress After the component has been removed, the site Preliminary 17 / 17 needs to be cleaned properly. It is best to use a combination of a blade-style conductive tool and desoldering braid. The width of he blade should be matched to the maximum width of the footprint and the blade temperature should be low enough not to cause any damage o t the circuit board. Once the residual solder has been removed, the lands should be cleaned with a solvent. The solvent is usually specific to the type of paste used in the original assembly and paste manufacturer’s recommendations should be followed. 4.3. Solder Paste Printing Because of their small size and finer pitches, solder paste deposition for MLFs requires extra care. However, a uniform and precise deposition can be achieved if miniature stencil specific to the component is used. The stencil aperture should be aligned with the pads under 50 to 100X magnification. The stencil should then be lowered onto the PCB and the paste should be deposited with a small metal squeegee blade. The blade width should be the same as the package width to ensure single pass paste deposition thus avoiding any overprinting. The stencil thickness and aperture size and shape should be the same as used for the original assembly. Also, no-clean flux should be used, as small standoff of MLFs does not leave much room for cleaning. 4.4. Component Placement MLF packages are expected to have superior selfcentering ability due to their small mass and the placement of this package should be similar to that of BGAs. As the leads are on the underside of the package, split-beam optical system should be used to align the component on the motherboard. This will form an image of solder balls overlaid on the mating footprint and aid in proper alignment. Again, the alignment should be done at 50 to 100X magnification. The placement machine should have the capability of allowing fine adjustments in X, Y, and rotational axes. 4.5. Component Attachment The reflow profile developed during original attachment or removal should be used to attach the new component. Since all reflow profile parameters have already been optimized, using the same profile will eliminate the need for thermocouple feedback and will reduce operator dependencies. (from Application Notes for Amkor’s MLF Package) Last Update 10/16/02