GENLINX ™II GS9024 Automatic Cable Equalizer DATA SHEET DESCRIPTION • automatic cable equalization The GS9024 is a high performance automatic cable equalizer designed for serial digital data rates from 143Mb/s to 540Mb/s. The GS9024 receives either single-ended or differential serial data and outputs equalized differential signals at PECL levels (800mV). The GS9024 provides up to 40dB of gain at 200MHz which will typically result in equalization of greater than 350m at 270Mb/s of Belden 8281 cable. • fully compatible with SMPTE 259M • typically equalizes greater than 350m of high quality cable at 270Mb/s • signal strength indicator • output data muting when input data is lost • output 'eye' monitor (OEM) with large signal amplitude and power down option • low power: 240mW at 5V • 14 pin SOIC package • programmable output data squelch for max cable length limiting • carrier detect with programmable threshold level • serial data output "High Z" select to allow muxing of EQ inputs APPLICATIONS Front-end cable equalization for digital video systems; Input equalization for serial digital distribution amplifiers, routers, production switchers and other receiving equipment. The GS9024 incorporates an analog signal strength indicator/carrier detect (SSI/CD) output indicating both the presence of a carrier and the amount of equalization applied to the signal. Optional external resistors allow the carrier detect threshold level to be customized to the user's requirement. The GS9024 also features selectable High Z serial data outputs eliminating the need for input muxing circuitry in routers. In addition, the GS9024 provides an 'Output Eye Monitor' (OEM) which allows the verification of signal integrity after equalization, prior to reslicing. The GS9024 operates from a single +5V or -5V power supply and consumes only 240mW of power. Packaged in a small 14 pin SOIC, the GS9024 is ideal for router applications where high density component placement is required. ORDERING INFORMATION SDI + - PART NUMBER PACKAGE TEMPERATURE GS9024-CKB 14 pin SOIC 0°C to 70°C GS9024-CTB 14 pin SOIC Tape 0°C to 70°C ++ VARIABLE GAIN EQ STAGE SDO SDI OEM SDO -- HIGH Z EYE MONITOR AUTO EQ CONTROL + SSI/CD AGC CD_ADJ BLOCK DIAGRAM Revision Date: November 2000 GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: [email protected] www.gennum.com Document No. 521 - 70 - 06 GS9024 FEATURES ABSOLUTE MAXIMUM RATINGS PARAMETER VALUE Supply Voltage 5.5V Input Voltage Range (any input) VCC +0.5 to VEE -0.5V 0°C ≤ TA ≤ 70°C Operating Temperature Range GS9024 -65°C ≤ TS ≤ 150°C Storage Temperature Range Lead Temperature (soldering, 10 sec) 260°C DC ELECTRICAL CHARACTERISTICS VCC = 5V, VEE = 0V, TA = 0°C TO 70°C unless otherwise shown. PARAMETER SYMBOL CONDITIONS 1 MIN TYP MAX UNITS NOTES TEST LEVEL Supply Voltage VCC 4.75 5.0 5.25 V Power Consumption PD - 240 - mW 3 - 340 - mW 3 - 44 - mA 1 with OEM active - 58 - mA 1 RL = 75Ω - 11 - mA 3 SDI/SDI Common Mode Voltage - 2.5 - V 1 AGC+/AGC- Mode Voltage - 2.7 - V 1 OEM Bias Potential - 4.5 - V 1 CLMAX = 50pF RL = ∞ - - 18 µA CLMAX = 50pF RL = 5kΩ - - 110 µA ΙSINK - 1.0 1.5 mA VHIGH 2.4 - - V 1 VLOW - - 0.8 V 1 with OEM active ΙS Supply Current Serial Data O/P Current SSI/CD Output Current High Z Input Voltage ΙSDO ΙSOURCE TEST LEVELS NOTES 1. 100% tested at 25°C. 1. Typical values are parametric norms at 25°C. 2. Guaranteed by design. 3. Inferred or co-related value. 2 GENNUM CORPORATION 521 - 70 - 06 AC ELECTRICAL CHARACTERISTICS VCC = 5V, VEE = 0V, TA = 0°C TO 70°C unless otherwise shown. PARAMETER SYMBOL CONDITIONS Data Rate Output Signal Swing VSDO 270Mb/s, 300m 540Mb/s, 100m Output Rise and Fall Times (20-80%) tr, tf Output Duty Cycle Distortion NOTES TEST LEVEL TYP MAX UNITS 143 - 540 Mb/s 1 700 850 1000 mV 1 - 275 - ps p-p see Fig 5 5 - 200 - ps p-p 5 0.5 0.65 - ns 3 - 30 - ps 2 Input Resistance RIN SDI, SDI - 10 - kΩ 2 Input Capacitance CIN SDI, SDI - 1.0 - pF 2 - 3 - µs 2 - 30 - µs 2 - 17 - ns 2 at 270MHz 15 20 - dB see Fig 8 3 at 200MHz - 40 - dB see Fig 4 3, 5 Carrier Detect Response Time High Z Response Time Carrier Applied RL = CL ≤ 50pF on SSI/CD tCDOFF Carrier Removed RL = CL ≤ 50pF on SSI/CD ∞, trHIGHZ Input Return Loss Maximum Equalizer Gain ∞, tCDON AEQ TEST LEVELS NOTES 1. 100% tested at 25°C. 4. Evaluated using test setup Figure 1. 2. Guaranteed by design. 5. Evaluated using test setup Figure 2. 1. Typical values are parametric norms at 25°C. 3. Inferred or co-related value. TEST SETUP DATA TEKTRONIX GigaBERT 700 TRANSMITTER DATA GS9028 CABLE DRIVER BELDEN 8281 CABLE EB9024 BOARD TEKTRONIX GigaBERT 700 ANALYZER CLOCK TRIGGER Fig. 1 Test Setup for Figure 3. BELDEN 8281 CABLE DATA ANRITSU DATA ME522A or GigaBERT 700 TRANSMITTER CLOCK GS9028 CABLE DRIVER EB9024 BOARD SSI/CD V VERTICAL IN V CD_ADJ OSCILLOSCOPE TRIGGER IN Fig. 2 Test Setup for Figures 4, 5, 6, 7, 10 and 11. 3 GENNUM CORPORATION 521 - 70 - 06 GS9024 tJ Additive Jitter RL = 75Ω 1 MIN PIN CONNECTIONS AGC- 1 14 AGC+ VEE 2 13 HIGH Z VCC 3 12 SSI/CD SDI GS9024 11 4 TOP VIEW 5 10 SDO VEE 6 9 CD_ADJ VCC 7 8 OEM SDI SDO GS9024 PIN DESCRIPTIONS NUMBER SYMBOL TYPE DESCRIPTION 1, 14 AGC-, AGC+ I External AGC capacitor. 4, 5 SDI/SDI I Differential serial digital data inputs. 8 OEM O Output ‘Eye’ monitor. OEM is a single ended current mode output and requires an external 50Ω pullup resistor. 9 CD_ADJ I Carrier detect threshold adjust. 10, 11 SDO/SDO O Equalized serial digital data outputs. 12 SSI/CD O Signal strength indicator/Carrier Detect. 13 HIGH Z I The SDO/SDO outputs are High Z when this pin is HIGH. If High Z functionality is not used, this input can be left floating or tied LOW. 4 GENNUM CORPORATION 521 - 70 - 06 TYPICAL PERFORMANCE CURVES (VS = 5V, TA = 25°C unless otherwise shown.) 5.00 500 0.5 UI Output Additive Jitter SSI/CD OUTPUT VOLTAGE (V) 4.50 300 0.2 UI Output Additive Jitter 200 100 0 90 4.00 3.50 3.00 2.50 180 270 360 450 540 GS9024 CABLE LENGTH (m) 400 630 0 50 100 150 200 250 300 350 400 450 500 CABLE LENGTH (m) DATA RATE (Mb/s) Fig. 6 SSI/CD Voltage vs. Cable Length - Belden 8281 (CD_ADJ = 0V) Fig. 3 Maximum Data Rate vs. Cable Length - Belden 8281n (see Test Setup in Figure 1) 50 5.0 45 4.5 CD_ADJ VOLTAGE (V) 40 35 GAIN (dB) 30 25 20 15 10 4.0 3.5 3.0 2.5 5 2.0 200 0 1 10 100 1000 250 300 350 400 CABLE LENGTH (m) FREQUENCY (MHz) Fig. 7 Carrier Detect Adjust Voltage Threshold Characteristics Fig. 4 Equalizer Gain vs. Frequency j1 1500 j0.5 1400 j2 ADDITIVE JITTER (ps p-p) 1200 1000 j0.2 j5 800 600 540Mb/s 720 3000 400 1620 -j0.2 200 -j5 270Mb/s 0 810 0 50 100 150 200 250 300 350 CABLE LENGTH (m) -j2 -j0.5 Fig. 5 Additive Jitter vs. Input Cable Length - Belden 8281 -j1 Frequencies in MHz, impedances normalized to 50Ω. Fig. 8 Input Impedance 5 GENNUM CORPORATION 521 - 70 - 06 variation of the inverse cable loss characteristic with cable length. The gain stage provides up to 40dB of gain at 200MHz which will typically result in equalization of greater than 350m at 270Mb/s of Belden 8281 cable. The equalized signal is DC restored, thereby restoring its logic threshold to its corrective level regardless of shifts due to AC coupling. The digital output signals have PECL voltage levels (800mV) and are available at pins SDO and SDO. Fig. 9 Output Data Waveform at 270Mb/s, 300m 1. OUTPUT HIGH Z A HIGH Z pin allows the data outputs to be put into a high impedance state which disconnects them from the output traces. This feature is ideal for input expansion in router applications as it eliminates the need for input muxes or crosspoints. 2. SIGNAL STRENGTH INDICATION/CARRIER DETECT The GS9024 incorporates an analog signal strength indicator/carrier detect output (SSI/CD) which indicates both the presence of a carrier and the amount of equalization applied to the signal. The voltage output of this pin versus cable length (signal strength) is shown in Figure 11. With 0m of cable (800mV input signal levels), the SSI/CD output voltage is approximately 4.5V. As the cable length increases, the SSI/CD voltage decreases linearly providing accurate correlation between the SSI/CD voltage and cable length. When the signal strength decreases to the level set at the "Carrier Detect Threshold Adjust" pin, the SSI/CD voltage goes to a logic "0" state (0.8V) and can be used to drive other TTL/CMOS compatible logic inputs. In addition, when loss of carrier is detected the SDO/SDO outputs are muted (set to a known static state). Fig. 10 Output Data Waveform at 540Mb/s, 200m DETAILED DESCRIPTION The GS9024 Automatic Cable Equalizer is a bipolar integrated circuit designed to equalize serial digital data signals between 30Mbps and 622Mbps. Powered from a single +5V or -5V supply, the device consumes approximately 240mW of power. The serial data signal is connected to the input pins (SDI/SDI) either differentially or single ended. The input signal passes through a variable gain equalizing stage whose frequency response closely matches the inverse cable loss characteristic. In addition, the variation of the frequency response with control voltage imitates the 6 GENNUM CORPORATION 521 - 70 - 06 GS9024 The edge energy of the equalized signal is monitored by a detector circuit which produces an error signal corresponding to the difference between the desired edge energy and the actual edge energy. This error signal is integrated by an external differential AGC filter capacitor (AGC+/AGC-) providing a steady control voltage for the gain stage. As the frequency response of the gain stage is automatically varied by the application of negative feedback, the edge energy of the equalized signal is kept at a constant level which is representative of the original edge energy at the transmitter. 5. I/O DESCRIPTION 5 SDI/SDI are high impedance inputs differential or single-ended input drive. which accept 3 Figure 12 shows the recommended interface when a singleended serial digital signal is used. CD_ADJ CONTROL RANGE 2 10nF 1 75Ω SDI 75Ω GS9024 10nF SDI 0 0 50 100 150 200 250 300 350 400 450 37.5Ω 75Ω 500 CABLE LENGTH (m) Fig. 12 Fig. 11 5.2. High Speed Outputs (SDO/SDO) 3. CARRIER DETECT THRESHOLD ADJUST SDO/SDO are current mode outputs that require external pullups (see Figure 13). The output signal swings are 800mV when 75Ω resistors are used. A diode can be placed between VCC and the pullups to shift the signal levels down by approximately 0.7 volts. When the output traces are longer than 1 inch, controlled impedance traces should be used. The pullup resistors should be placed at the end of the output traces as they terminate the trace in its characteristic impedance (75Ω). The threshold level at which loss of carrier is detected is adjustable via external resistors at the CD_ADJ pin. The control voltage at the CD_ADJ pin is set by a simple resistor divider circuit. The threshold level is adjustable from 200m to 350m. By default (no external resistors), the threshold is typically 320m. Connecting this pin to Ground disables the SDO/SDO muting function and allows for maximum possible cable length equalization. This feature is designed for use in applications such as routers where signal crosstalk and circuit noise cause the equalizer to output erroneous data when no input signal is present. This problem is not solved by using a Carrier Detect function with a fixed internal reference because the signal to noise ratio on the circuit board may be significantly less than the default signal detection level set by the onchip reference. To solve this problem, the GS9024 provides a user adjustable threshold to meet the unique conditions that exist in each user's application. Override and internal default settings are provided to give the user total flexibility. VCC 75Ω GS9024 75Ω SDO SDO Fig. 13 4. OUTPUT EYE MONITOR The GS9024 provides an 'Output Eye Monitor' (OEM) which allows the verification of signal integrity after equalization, prior to reslicing. The OEM pin is an open collector current output that requires an external 50Ω pullup resistor. When the pullup resistor is not used, the OEM block is disabled and the internal OEM circuit is powered down. The OEM provides a 0.25Vp-p signal when driving a 50Ω oscilloscope input. 7 GENNUM CORPORATION 521 - 70 - 06 GS9024 SSI/CD OUTPUT VOLTAGE (V) 5.1. High Speed Analog Inputs (SDI/SDI) 4 TYPICAL APPLICATION CIRCUIT 100nF VCC 14 1 AGC3 13 37.5 HIGH Z VCC SSI/CD SDI 75 75 VEE 12 GS9024 SDO 10n VCC 7 DATA OUT DATA OUT SDO SDI 6 75 10 5 75 75 11 9 VEE CD_ADJ VCC OEM VCC 8 100k POT (optional) 50 All resistors in ohms, all capacitors in farads, unless otherwise shown. GS9024 10n 4 VCC AGC+ 2 SDI INPUT 30 - 622Mb/s VCC 1n EYE MONITOR OUTPUT PACKAGE DIMENSIONS All dimensions in millimeters. 8.75 MAX 1.91 MAX 0.49 MAX 1.27 MAX 8 14 4.0 MAX 6.20 MAX 0.25 MAX 7 1 0.25 MAX O.56 MAX = = = = = = 7.62 ±0.05 16 Pin SOIC Narrow 6 spaces@ 1.27±0.05 CAUTION ELECTROSTATIC SENSITIVE DEVICES DO NOT OPEN PACKAGES OR HANDLE EXCEPT AT A STATIC-FREE WORKSTATION DOCUMENT IDENTIFICATION REVISION NOTES: DATA SHEET The product is in production. Gennum reserves the right to make changes at any time to improve reliability, function or design, in order to provide the best product possible. Clarified symbols for pin numbers 10 and 11; Changed SSI/CD to SSI/CD. For latest product information, visit www.gennum.com GENNUM JAPAN CORPORATION C-101, Miyamae Village, 2-10-42 Miyamae, Suginami-ku Tokyo 168-0081, Japan Tel. +81 (03) 3334-7700 Fax. +81 (03) 3247-8839 GENNUM CORPORATION MAILING ADDRESS: P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 GENNUM UK LIMITED 25 Long Garden Walk, Farnham, Surrey, England GU9 7HX Tel. +44 (0)1252 747 000 Fax +44 (0)1252 726 523 SHIPPING ADDRESS: 970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5 Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. © Copyright April 1996 Gennum Corporation. All rights reserved. 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