TI TPS78915DBVR

TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
D
D
D
D
D
D
D
D
D
100-mA Low-Dropout Regulator
Available in 1.5-V, 1.8-V, 2.5-V, 2.8-V, 3.0-V
Output Noise Typically 56 µVRMS
(TPS78930)
Only 17 µA Quiescent Current at 100 mA
1 µA Quiescent Current in Standby Mode
Dropout Voltage Typically 115 mV at 100 mA
(TPS78930)
Over Current Limitation
–40°C to 125°C Operating Junction
Temperature Range
5-Pin SOT-23 (DBV) Package
DBV PACKAGE
(TOP VIEW)
IN
1
GND
2
EN
3
5
OUT
4
BYPASS
TPS78930
GROUND CURRENT
vs
JUNCTION TEMPERATURE
21
VI = 4 V
Co = 4.7 µF
20
The usual PNP pass transistor has been replaced
by a PMOS pass element. Because the PMOS
pass element behaves as a low-value resistor, the
dropout voltage is very low, typically 115 mV at
100 mA of load current (TPS78930), and is
directly proportional to the load current. The
quiescent current is ultralow (17 µA typically) and
is stable over the entire range of output load
current (0 mA to 100 mA). Intended for use in
portable systems such as laptops and cellular
phones, the ultralow-dropout voltage feature and
ultralow-power operation result in a significant
increase in system battery operating life.
19
IO = 100 mA
IO = 1 mA
18
17
16
15
14
–40 –25 –10
5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
TPS78930
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
1200
Output Spectral Noise Density – nV/ Hz
The TPS789xx family of low-dropout (LDO)
voltage regulators offers the benefits of
low-dropout voltage, ultralow-power operation,
low-output noise, and miniaturized packaging.
These regulators feature low-dropout voltages
and ultralow quiescent current compared to
conventional LDO regulators. An internal resistor,
in conjunction with an external bypass capacitor,
creates a low-pass filter to reduce the noise. The
TPS78930 exhibits only 56 µVRMS of output
voltage noise using 0.01 µF bypass and 10 µF
output capacitors. Offered in a 5-terminal small
outline integrated-circuit SOT-23 package, the
TPS789xx series devices are ideal for
micropower operations, low output noise, and
where board space is limited.
Ground Current – µ A
description
VI = 4 V
Co = 4.7 µF
C(byp) = 0.1 µF
1000
800
600
IO = 100 mA
400
200
0
100
IO = 1 mA
1k
10k
f – Frequency – Hz
100k
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
description (continued)
The TPS789xx also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current
to 1 µA typical at TJ = 25°C. The TPS789xx is offered in 1.5 V, 1.8 V, 2.5 V, 2.8 V, and 3.0 V.
AVAILABLE OPTIONS
VOLTAGE
TJ
PACKAGE
1.5 V
1.8 V
–40°C to 125°C
2.5 V
SOT-23
SOT
23
(DBV)
2.8 V
3.0 V
† The DBVT indicates tape and reel of 250 parts.
‡ The DBVR indicates tape and reel of 3000 parts.
PART NUMBER
TPS78915DBVT† TPS78915DBVR‡
TPS78918DBVT† TPS78918DBVR‡
TPS78925DBVT† TPS78925DBVR‡
TPS78928DBVT†
TPS78930DBVT†
TPS78928DBVR‡
TPS78930DBVR‡
SYMBOL
PDWI
PDXI
PDYI
PDZI
PEAI
functional block diagram
TPS78915/18/25/28/30
OUT
IN
EN
150 k
Current Limit
/ Thermal
Protection
Vref
GND
Bypass
Terminal Functions
TERMINAL
I/O
DESCRIPTION
4
I
The external bypass capacitor, in conjunction with an internal resistor, creates a low-pass filter to further reduce
regulator noise.
EN
3
I
Active low enable.
GND
2
IN
1
I
The IN terminal is the input to the device.
OUT
5
O
The OUT terminal is the regulated output of the device.
NAME
NO.
BYPASS
2
Regulator ground
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
detail description
The TPS789xx uses a PMOS pass element to dramatically reduce both dropout voltage and supply current over
more conventional PNP-pass-element LDO designs. The PMOS pass element is a voltage-controlled device
and, unlike a PNP transistor, it does not require increased drive current as output current increases. Supply
current in the TPS789xx is essentially constant from no load to maximum load.
The TPS789xx family of low-dropout (LDO) regulators have been optimized for use in battery-operated
equipment. They feature extremely low dropout voltages, low output noise, low quiescent current (17 µA
typically), and enable inputs to reduce supply currents to 1 µA when the regulators are turned off.
The internal voltage reference is a key source of noise in a LDO regulator. The TPS789xx has a BYPASS pin
which is connected to the voltage reference through a 150-kΩ internal resistor. The 150-kΩ internal resistor,
in conjunction with an external bypass capacitor connected to the BYPASS pin, creates a low pass filter to
reduce the voltage reference noise and, therefore, the noise at the regulator output. Note that the output will
start up slower as the bypass capacitance increases due to the RC time constant at the bypass pin that is created
by the internal 150-kΩ resistor and external capacitor.
Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation.
The device switches into a constant-current mode at approximately 350 mA; further load reduces the output
voltage instead of increasing the output current. The thermal protection shuts the regulator off if the junction
temperature rises above approximately 165°C. Recovery is automatic when the junction temperature drops
approximately 25°C below the high temperature trip point. The PMOS pass element includes a back gate diode
that conducts reverse current when the input voltage level drops below the output voltage level.
A voltage of 1.7 V or greater on the EN input will disable the TPS789xx internal circuitry, reducing the supply
current to 1 µA. A voltage of less than 0.9 V on the EN input will enable the TPS789xx and will enable normal
operation to resume. The EN input does not include any deliberate hysteresis, and it exhibits an actual switching
threshold of approximately 1.5 V.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)Ĕ
Input voltage range (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 13.5 V
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VI + 0.3 V
Voltage on OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
BOARD
PACKAGE
RθJC
RθJA
DERATING FACTOR
ABOVE TA = 25°C
TA ≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
Low K‡
High K§
DBV
65.8 °C/W
259 °C/W
3.9 mW/°C
386 mW
212 mW
154 mW
DBV
65.8 °C/W
180 °C/W
5.6 mW/°C
555 mW
305 mW
222 mW
‡ The JEDEC Low K (1s) board design used to derive this data was a 3 inch x 3 inch, two layer board with 2 ounce copper traces on top of the board.
§ The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
recommended operating conditions
MIN
Input voltage, VI (see Note 2)
Continuous output current, IO (see Note 3)
Operating junction temperature, TJ
NOM
MAX
UNIT
2.7
10
V
0
100
mA
–40
125
°C
NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula:
VI(min) = VO(max) + VDO (max load)
3. Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended
that the device operate under conditions beyond those specified in this table for extended periods of time.
electrical characteristics over recommended operating free-air temperature range,
VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 4.7 µF (unless otherwise noted)
PARAMETER
Output voltage (see Note 4)
TEST CONDITIONS
MIN
TPS78915
TJ = 25°C,
TJ = –40°C to 125°C,
2.7 V < VI < 10 V
2.7 V < VI < 10 V
TPS78918
TJ = 25°C,
TJ = –40°C to 125°C,
2.8 V < VI < 10 V
TPS78925
TJ = 25°C,
TJ = –40°C to 125°C,
3.5 V < VI < 10 V
2.425
TPS78928
TJ = 25°C,
TJ = –40°C to 125°C,
3.8 V < VI < 10 V
3.8 V < VI < 10 V
2.716
TPS78930
TJ = 25°C,
TJ = –40°C to 125°C,
4.0 V < VI < 10 V
4.0 V < VI < 10 V
2.910
EN = 0 V,
TJ = 25°C
10 µA < IO < 100 mA,
EN = 0 V,
TJ = –40°C to 125°C
IO = 100 mA,
EN = 0 V,
TJ = 25°C
IO = See Note 4
Quiescent current (GND current) (see Notes 4 and 5)
Load regulation
2.8 V < VI < 10 V
Output voltage line regulation (∆VO/VO) (see Note 5)
BW = 300 Hz to 50 kHz, C(byp) = 0.01 µF
Co = 10 µF, IO = 100 mA, TJ = 25°C
Output current limit
VO = 0 V,
EN = VI,
See Note 4
UNIT
1.545
1.8
1.746
1.854
2.5
2.575
V
2.8
2.884
3
3.090
17
µA
28
12
mV
0.04
%/V
VO + 1 V < VI ≤ 10 V,
TJ = –40°C to 125°C, See Note 4
Output noise voltage (TPS78930)
MAX
1.5
1.455
3.5 V < VI < 10 V
VO + 1 V < VI ≤ 10 V, TJ = 25°C,
See Note 4
TYP
0.1
µVRMS
56
350
750
mA
2.7 < VI < 10 V
1
µA
TJ = –40°C to 125°C
2
µA
NOTES: 4. The minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. The maximum IN voltage is 10 V. The minimum
output current is 10 µA and the maximum output current is 100 mA.
5. If VO ≤ 1.8 V then VImin = 2.7 V, VImax = 10 V:
Standby current
Line Reg. (mV)
+ ǒ%ńVǓ
V
O
ǒ
V
ǒ
Ǔ
* 2.7 V
Imax
100
1000
If VO ≥ 2.5 V then VImin = VO + 1 V, VImax = 10 V:
Line Reg. (mV)
4
+ ǒ%ńVǓ
V
O
V
Imax
*
ǒ
V
O
ǓǓ
)1 V
100
POST OFFICE BOX 655303
1000
• DALLAS, TEXAS 75265
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
electrical characteristics over recommended operating free-air temperature range,
VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 4.7 µF (unless otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
High level enable input voltage
2.7 V < VI < 10 V
Low level enable input voltage
2.7 V < VI < 10 V
Power supply ripple rejection (TPS78930)
f = 1 kHz,
TJ = 25°C,
Input current (EN)
TPS78928
Dropout voltage (see Note 6)
TPS78930
MIN
TYP
MAX
UNIT
1.7
V
0.9
Co = 10 µF,
C(byp) = 0.01 µF
V
85
EN = 0 V
–1
EN = VI
–1
0
IO = 50 mA,
IO = 50 mA,
TJ = 25°C
TJ = –40°C to 125°C
60
IO = 100 mA,
IO = 100 mA,
TJ = 25°C
TJ = –40°C to 125°C
122
IO = 50 mA,
IO = 50 mA,
TJ = 25°C
TJ = –40°C to 125°C
57
IO = 100 mA,
IO = 100 mA,
TJ = 25°C
TJ = –40°C to 125°C
115
dB
1
µA
1
µA
125
245
mV
115
230
NOTE 6. IN voltage equals VO(typ) – 100 mV; The TPS78930 output voltage is set to 2.9 V. The TPS78915, TPS78918, and TPS78925 dropout
voltage is limited by the input voltage range limitations.
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VO
Zo
VDO
VO
Output voltage
vs Output current
1, 2, 3
vs Junction temperature
4, 5, 6
Ground current
vs Junction temperature
Output spectral noise density
vs Frequency
Root mean squared output noise
vs Bypass capacitance
11
Output impedance
vs Frequency
12
Dropout voltage
vs Junction temperature
13
Ripple rejection
vs Frequency
14 – 16
Output voltage, enable voltage
vs Time (start-up)
17 – 19
Line transient response
7
8 – 10
20, 22
Load transient response
21, 23
Equivalent series resistance (ESR)
POST OFFICE BOX 655303
vs Output current
• DALLAS, TEXAS 75265
24, 25
5
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
TPS78925
TPS78915
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
1.515
2.515
VI = 3.5 V
Co = 4.7 µF
TJ = 25° C
1.510
VO – Output Voltage – V
VO – Output Voltage – V
2.510
VI = 2.7 V
Co = 4.7 µF
TJ = 25° C
2.505
2.500
2.495
1.505
1.500
1.495
1.490
2.490
1.485
2.485
0
20
40
60
80
0
100
20
40
Figure 1
TPS78930
TPS78915
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
100
1.515
VI = 2.7 V
Co = 4.7 µF
VI = 4.0 V
Co = 4.7 µF
TJ = 25° C
1.510
VO – Output Voltage – V
3.010
VO – Output Voltage – V
80
Figure 2
3.015
3.005
3.000
2.995
2.990
IO = 1 mA
1.505
1.500
1.495
IO = 100 mA
1.490
2.985
0
20
40
60
80
IO – Output Current – mA
100
1.480
–40 –25 –10
5
20
35
Figure 4
POST OFFICE BOX 655303
50
65 80
95 110 125
TJ – Junction Temperature – °C
Figure 3
6
60
IO – Output Current – mA
IO – Output Current – mA
• DALLAS, TEXAS 75265
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
TPS78925
TPS78930
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
2.515
VI = 4 V
Co = 4.7 µF
3.010
IO = 1 mA
VO – Output Voltage – V
VO – Output Voltage – V
2.510
3.015
VI = 3.5 V
Co = 4.7 µF
2.505
2.500
IO = 100 mA
2.495
2.490
3.005
IO = 1 mA
3.000
IO = 100 mA
2.995
2.990
2.485
–40 –25 –10
5
20
35
50
65 80
2.985
–40 –25 –10
95 110 125
TJ – Junction Temperature – °C
Figure 5
35
50
65 80
95 110 125
TPS78930
TPS78930
GROUND CURRENT
vs
JUNCTION TEMPERATURE
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
Hz
1200
nV/
VI = 4 V
Co = 4.7 µF
Output Spectral Noise Density –
Ground Current – µ A
19
20
Figure 6
21
20
5
TJ – Junction Temperature – °C
IO = 100 mA
IO = 1 mA
18
17
16
15
14
–40 –25 –10
5
20
35
50
65 80
95 110 125
VI = 4 V
Co = 4.7 µF
C(byp) = 0.1 µF
1000
800
600
IO = 100 mA
400
200
IO = 1 mA
0
100
TJ – Junction Temperature – °C
1k
10k
f – Frequency – Hz
100k
Figure 8
Figure 7
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
TPS78930
TPS78930
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
2
VI = 4 V
Co = 10 µF
C(byp) = 0.1 µF
700
Output Spectral Noise Density – µ V/ Hz
Output Spectral Noise Density – nV/
Hz
800
600
500
400
IO = 100 mA
300
IO = 1 mA
200
100
VI = 4.3 V
0
100
1k
10k
f – Frequency – Hz
VI = 4 V
IO = 100 mA
Co= 10 µF
1.8
1.6
1.4
C(byp) = 0.001 µF
1.2
1 C(byp) = 0.01 µF
0.8
0.6
0.4
0.2
C(byp) = 0.1 µF
0
100
100k
1k
10k
f – Frequency – Hz
Figure 10
Figure 9
OUTPUT IMPEDANCE
vs
FREQUENCY
2
300
1.8
250
200
150
VO = 3 V
1.4
1.2
1
0.8
0.6
IO = 1 mA
0.4
50
IO = 100 mA
0.2
VO = 1.5 V
0
0.00001
VI = 4 V
Co = 4.7 µF
1.6
Zo – Output Impedance – Ω
RMS – Root Mean Squared Output Noise – µ V(RMS)
ROOT MEAN SQUARED OUTPUT NOISE
vs
BYPASS CAPACITANCE
100
0.1
0.0001
0.001
0.01
C(bypass) – Bypass Capacitance – µF
1
0
10
100
1k
10 k
f – Frequency – Hz
Figure 11
8
100k
Figure 12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
100 k
1M
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
TPS78930
TPS78930
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
RIPPLE REJECTION
vs
FREQUENCY
120
135
125
VI = 2.9 V,
Co = 4.7 µF
IO = 100 mA
110
VDO – Dropout Voltage – mV
115
VI = 4 V
Co = 10 µF
C(byp) = 0.1 µF
100
Ripple Rejection – dB
105
95
85
75
65
55
45
35
90
IO = 1 mA
80
70
60
50
IO = 100 mA
40
25
30
IO = 1 mA
15
20
10
5
–40 –25 –10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
100
1k
TPS78930
TPS78930
RIPPLE REJECTION
vs
FREQUENCY
120
100
110
IO = 1 mA
80
100
Ripple Rejection – dB
Ripple Rejection – dB
1M
Figure 14
RIPPLE REJECTION
vs
FREQUENCY
70
60
50
IO = 100 mA
40
30
20
1k
10 k
100 k
90
IO = 1 mA
80
70
60
IO = 100 mA
50
30
0
100
VI = 4 V
Co = 10 µF
C(byp) = 0.001 µF
40
VI = 4 V
Co = 10 µF
C(byp) = 0.01 µF
10
10
100 k
f – Frequency – Hz
Figure 13
90
10 k
1M
20
10
100
1k
10 k
f – Frequency – Hz
f – Frequency – Hz
Figure 15
Figure 16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
100 k
1M
9
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
TPS78930
Enable Voltage – V
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
TIME (START-UP)
5
0
VO – Output Voltage – V
3
2
VI = 4 V
VO = 3 V
IO = 100 mA
C(byp) = 0.01 µF
VI = 4 V
Co = 10 µF
C = 4.7 µF
TJ = 25°CO
1
0
0
1
2
3
4
5
6
t – Time – ms
7
8
9
10
TPS78930
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
TIME (START-UP)
Enable Voltage – V
TPS78930
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
TIME (START-UP)
5
0
3
VO – Output Voltage – V
VO – Output Voltage – V
Enable Voltage – V
Figure 17
2
VI = 4 V
VO = 3 V
IO = 100 mA
C(byp) = 0.001 µF
Co = 10 µF
TJ = 25°C
1
0
0
0.2 0.4
0.6
0.8 1
1.2
t – Time – ms
1.4 1.6
1.8
2
5
0
C(byp) = 0.001 µF
C(byp) = 0.01 µF
2
VI = 4 V
VO = 3 V
IO = 100 mA
Co = 10 µF
TJ = 25°C
1
0
0
10
Figure 18
10
C(byp) = 0.1 µF
3
20
30
40 50 60
t – Time – ms
Figure 19
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70
80
90 100
TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
TPS78915
LOAD TRANSIENT RESPONSE
Current Load – mA
TPS78915
LINE TRANSIENT RESPONSE
20
0
–20
∆ VO – Change In
Output Voltage – mV
VI – Input Voltage – V
VO – Output Voltage – mV
TYPICAL CHARACTERISTICS
3.7
2.7
IO = 10 mA
Co = 4.7 µF
0
20
40
60
100
0
0
–200
VI = 2.7 V
Co = 10 µF
–400
0
80 100 120 140 160 180 200
t – Time – µs
20
40
80 100 120 140 160 180 200
t – Time – µs
Figure 21
TPS78930
LOAD TRANSIENT RESPONSE
I O – Output Current – mA
TPS78930
LINE TRANSIENT RESPONSE
IO = 10 mA
Co = 4.7 µF
5
4.5
4
100
0
100
∆ VO – Change In
Output Voltage – mV
VO – Output Voltage – mV
VI – Input Voltage – V
Figure 20
60
20
0
–20
0
20
40
60
80 100 120 140 160 180 200
t – Time – µs
0
–100
VI = 4 V
Co = 4.7 µF
–200
0
20
40
60
80 100 120 140 160 180 200
t – Time – µs
Figure 23
Figure 22
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TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
TYPICAL CHARACTERISTICS
TPS78930
TYPICAL REGIONS OF STABILITY
TPS78930
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
100
VIN = 4 V
VO = 3 V
Co = 4.7 µF
Region of Instability
10
Region of Stability
1
0.1
ESR – Equivalent Series Resistance – Ω
ESR – Equivalent Series Resistance – Ω
100
VIN = 4 V
VO = 3 V
Co = 10 µF
Region of Instability
10
1
Region of Stability
0.1
0
25
50
75
100
0
50
Figure 25
Figure 24
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IO – Output Current – mA
IO – Output Current – mA
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25
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TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
APPLICATION INFORMATION
The TPS789xx family of low-dropout (LDO) regulators have been optimized for use in battery-operated
equipment. They feature extremely low dropout voltages, low output noise, low quiescent current (17 µA
typically), and enable inputs to reduce supply currents to 1 µA when the regulators are turned off.
A typical application circuit is shown in Figure 26.
TPS789xx
1
VI
IN
BYPASS
OUT
1 µF
4
5
VO
3
.01 µF
EN
+
GND
4.7 µF
ESR = 0.2 Ω
2
Figure 26. Typical Application Circuit
external capacitor requirements
Although not required, a 0.047-µF or larger ceramic input bypass capacitor, connected between IN and GND
and located close to the TPS789xx, is recommended to improve transient response and noise rejection. A
higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated
and the device is located several inches from the power source.
Like all low dropout regulators, the TPS789xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 4.7 µF. The ESR (equivalent
series resistance) of the capacitor should be between 0.2 Ω and 10 Ω. to ensure stability. Capacitor values larger
than 4.7 µF are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7 µF are not
recommended because they require careful selection of ESR to ensure stability. Solid tantalum electrolytic,
aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements
described above. Most of the commercially available 4.7 µF surface-mount solid tantalum capacitors, including
devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above. Multilayer ceramic
capacitors may have very small equivalent series resistances and may thus require the addition of a low value
series resistor to ensure stability.
CAPACITOR SELECTION
PART NO.
MAX ESR†
SIZE (H × L × W)†
MFR.
VALUE
T494B475K016AS
KEMET
4.7 µF
1.5 Ω
1.9 × 3.5 × 2.8
195D106x0016x2T
SPRAGUE
10 µF
1.5 Ω
1.3 × 7.0 × 2.7
695D106x003562T
SPRAGUE
10 µF
1.3 Ω
2.5 × 7.6 × 2.5
TPSC475K035R0600
AVX
4.7 µF
0.6 Ω
2.6 × 6.0 × 3.2
† Size is in mm. The ESR maximum resistance is in ohms at 100 kHz and TA = 25°C. Contact the
manufacturer for the minimum ESR values.
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TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
APPLICATION INFORMATION
external capacitor requirements (continued)
The external bypass capacitor, used in conjunction with an internal resistor to form a low-pass filter, should be
a low ESR ceramic capacitor. For example, the TPS78930 exhibits only 56 µVRMS of output voltage noise using
a 0.01 µF ceramic bypass capacitor and a10 µF ceramic output capacitors. Note that the output will start up
slower as the bypass capacitance increases due to the RC time constant at the bypass pin that is created by
the internal 150 kΩ resistor and external capacitor.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than
or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
P
T max * T
J
A
+
D(max)
R
qJA
Where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.
TA is the ambient temperature.
ǒ
Ǔ
The regulator dissipation is calculated using:
P
D
+ VI * VO
I
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
regulator protection
The TPS789xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might
be appropriate.
The TPS789xx features internal current limiting and thermal protection. During normal operation, the TPS789xx
limits output current to approximately 350 mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device
exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to
below approximately 140°C, regulator operation resumes.
14
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TPS78915, TPS78918, TPS78925, TPS78928, TPS78930
ULTRALOW-POWER LOW-NOISE 100-mA
LOW-DROPOUT LINEAR REGULATORS
SLVS300A – SEPTEMBER 2000 – REVISED MAY 2001
MECHANICAL DATA
DBV (R-PDSO-G5)
PLASTIC SMALL-OUTLINE
0,50
0,30
0,95
5
0,20 M
4
1,70
1,50
1
0,15 NOM
3,00
2,60
3
Gage Plane
3,00
2,80
0,25
0°–8°
0,55
0,35
Seating Plane
1,45
0,95
0,05 MIN
0,10
4073253-4/F 10/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-178
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