UTRON Rev. 1.0 UT62256C 32K X 8 BIT LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION Access time : 35/70ns (max.) Low power consumption: Operating : 40/30 mA (typical.) Standby : 3mA (typical) normal 2uA (typical) L-version 1uA (typical) LL-version Single 5V power supply All inputs and outputs are TTL compatible Fully static operation Three state outputs Data retention voltage : 2V (min.) Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8mmx13.4mm STSOP The UT62256C is a 262,144-bit low power CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. The UT62256C is designed for high-speed and low power application. It is particularly well suited for battery back-up nonvolatile memory application. The UT62256C operates from a single 5V power supply and all inputs and outputs are fully TTL compatible FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION A14 1 28 A3 A12 2 27 WE A7 3 26 A13 A6 4 25 A8 A5 5 24 A9 A4 6 23 A11 A3 7 A2 8 A14 . A13 ROW A12 A7 DECODER . MEMORY ARRAY 512 ROWS × 512 COLUMNS . A6 VCC VSS 11 18 I/O7 I/O2 12 17 I/O6 I/O3 13 16 I/O5 Vss 14 15 I/O4 I/O1 ... I/O8 I/O CONTROL .. . COLUMN I/O COLUMN DECODER CE LOGIC WE CONTROL OE PDIP/SOP A10 A9 A11 A2 A1 A0 PIN DESCRIPTION SYMBOL A0 - A14 I/O1 - I/O8 CE WE OE VCC VSS A10 CE A8 . OE 21 I/O8 10 I/O1 .. 22 19 9 A0 . . Vcc 20 A1 A5 . UT62256C A4 DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input Write Enable Input Output Enable Input Power Supply Ground 1 28 2 27 CE A9 3 26 I/O8 A8 4 25 I/O7 A13 5 24 I/O6 WE 6 23 I/O5 Vcc 7 22 I/O4 A14 8 21 Vss A12 9 20 I/O3 A7 10 19 I/O2 A6 11 18 I/O1 A5 12 17 A0 A4 13 16 A1 A3 14 15 A2 UT62256C STSOP ____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 1 A10 OE A11 UTRON UT62256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 ABSOLUTE MAXIMUM RATINGS* PARAMETER Terminal Voltage with Respect to VSS Operating Temperature Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 sec0 SYMBOL VTERM TA TSTG PD IOUT Tsolder RATING -0.5 to +7.0 0 to +70 -65 to +150 1 50 260 UNIT V ℃ ℃ W mA ℃ *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. TRUTH TABLE MODE CE H L L L Standby Output Disable Read Write Note: OE X H L X WE X H H L I/O OPERATION SUPPLY CURRENT High - Z High - Z DOUT DIN ISB, ISB1 ICC ICC ICC H = VIH, L=VIL, X = Don't care. DC ELECTRICAL CHARACTERISTICS (VCC = 5V±10%, TA = 0℃ to 70℃) PARAMETER SYMBOL Input High Voltage VIH Input Low Voltage VIL Input Leakage Current ILI Output Leakage ILO Current Output High Voltage Output Low Voltage Operating Power Supply Current ISB VSS ≦VIN ≦VCC VSS ≦VI/O ≦VCC CE =VIH or OE = VIH or WE = VIL IOH= - 1mA IOL= 4mA - 35 CE = VIL , II/O = 0mA ,Cycle=Min. - 70 CE = 0.2V; II/O = 0mA Tcycle other pins at 0.2V or =500ns Tcycle VCC-0.2V =1ms normal CE =VIH ISB1 CE ≧VCC-0.2V ISB CE =VIH CE ≧VCC-0.2V VOH VOL ICC ICC1 ICC2 Standby Power Supply Current TEST CONDITION ISB1 MIN. TYP. MAX. UNIT 2.2 VCC+0.5 V - 0.5 0.8 V -1 1 µA -1 1 µA -L/-LL -L -LL 2.4 - 40 30 - 0.4 50 40 20 V V mA mA mA - - 10 mA - 1 10 mA 0.3 5 mA - 3 mA 2 100 µA 1 50 µA - ____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 2 UTRON Rev. 1.0 UT62256C 32K X 8 BIT LOW POWER CMOS SRAM CAPACITANCE (TA=25℃, f=1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. MAX 8 10 - UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0V to 3.0V 5ns 1.5V CL = 100pF, IOH/IOL = -1mA/4mA AC ELECTRICAL CHARACTERISTICS (VCC = 5V±10% , TA = 0℃ to 70℃) (1) READ CYCLE PARAMETER Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change (2) WRITE CYCLE PARAMETER Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High Z SYMBOL tRC tAA tACE tOE tCLZ* tOLZ* tCHZ* tOHZ* tOH SYMBOL tWC tAW tCW tAS tWP tWR tDW tDH tOW* tWHZ* UT62256C-35 UT62256C-70 MIN. MAX. MIN. MAX. 35 10 5 5 35 35 25 25 25 - 70 10 5 5 70 70 35 35 35 - UT62256C-35 UT62256C-70 MIN. MAX. MIN. MAX. 35 30 30 0 25 0 20 0 5 - 15 70 60 60 0 50 0 30 0 5 - 25 UNIT ns ns ns ns ns ns ns ns ns UNIT ns ns ns ns ns ns ns ns ns ns *These parameters are guaranteed by device characterization, but not production tested. _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 3 UTRON UT62256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2,4) tRC Address tAA tOH tOH DOUT Data Valid READ CYCLE 2 ( CE and OE Controlled) (1,3,5,6) tRC Address tAA CE tACE OE tCHZ tOE tOHZ tCLZ DOUT tOLZ tOH High-z Data valid High-Z Notes : 1. WE is HIGH for read cycle. 2. Device is continuously selected CE =VIL. 3. Address must be valid prior to or coincident with CE transition; otherwise tAA is the limiting parameter. 4. OE is LOW. 5. tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. 6. At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ. _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 4 UTRON UT62256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 WRITE CYCLE 1 ( WE Controlled) (1,2,3,5) tWC Address tAW CE tCW tAS tWR tWP WE tWHZ High-Z tOW (4) DOUT (4) tDW DIN tDH Data Valid WRITE CYCLE 2 ( CE Controlled) (1,2,5) tWC Address tAW CE tAS tCW tWR tWP WE tWHZ DOUT High-Z (4) tDW tDH DIN Data Valid Notes : 1. WE or CE must be HIGH during all address transitions. 2. A write occurs during the overlap of a low CE and a low WE . 3. During a WE controlled with write cycle with OE LOW, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be placed on the bus. 4. During this period, I/O pins are in the output state, and input signals must not be applied. 5. If the CE LOW transition occurs simultaneously with or after WE outputs remain in a high impedance state. 6. tOW and tWHZ are specified with CL = 5pF. LOW transition, the Transition is measured ±500mV from steady state. _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 5 UTRON Rev. 1.0 UT62256C 32K X 8 BIT LOW POWER CMOS SRAM DATA RETENTION CHARACTERISTICS (TA = 0℃ to 70℃) PARAMETER Vcc for Data Retention Data Retention Current SYMBOL TEST CONDITION VDR CE ≧ VCC-0.2V IDR Vcc=3V Chip Disable to Data Retention Time Recovery Time tCDR CE ≧ VCC-0.2V See Data Retention Waveforms (below) tR MIN. TYP. MAX. UNIT 2.0 5.5 V -L - LL - 1 0.5 50 20 0 - - µA µA ns tRC* - - ns tRC* = Read Cycle Time DATA RETENTION WAVEFORM Data Retention Mode VCC 4.5V 4.5V VDR ≧ 2V CE VSS tCDR tR CE ≧ VCC -0.2V _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 6 UTRON UT62256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 PACKAGE OUTLINE DIMENSION 28 pin 600 mil PDIP PACKAGE OUTLINE DIMENSION UNIT SYMBOL C A1 A2 B B1 c D E E1 e eB L S Q1 Θ INCH(BASE) 0.010 (MIN) 0.150±0.005 0.020 (MAX) 0.055 (MAX) 0.012 (MAX) 1.430 (MAX) 0.6 (TYP) 0.52 (MAX) 0.100 (TYP) 0.625 (MAX) 0.180(MAX) 0.06 (MAX) 0.08(MAX) o 15 (MAX) MM(REF) 0.254 (MIN) 3.810±0.127 0.508(MAX) 1.397(MAX) 0.304 (MAX) 36.322 (MAX) 15.24 (TYP) 13.208 (MAX) 2.540(TYP) 15.87 (MAX) 4.572(MAX) 1.524 (MAX) 2.032(MAX) o 15 (MAX) _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 7 UTRON UT62256C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 28 pin 330 mil SOP PACKAGE OUTLINE DIMENSION UNIT SYMBOL B C E A A1 A2 b c D E E1 e L L1 S y Θ INCH(BASE) 0.120 (MAX) 0.002(MIN) 0.098±0.005 0.0016 (TYP) 0.010 (TYP) 0.728 (MAX) 0.340 (MAX) 0.465±0.012 0.050 (TYP) 0.05 (MAX) 0.067±0.008 0.047 (MAX) 0.003(MAX) o o 0 〜10 MM(REF) 3.048 (MAX) 0.05(MIN) 2.489±0.127 0.406(TYP) 0.254(TYP) 18.491 (MAX) 8.636 (MAX) 11.811±0.305 1.270(TYP) 1.270 (MAX) 1.702 ±0.203 1.194 (MAX) 0.076(MAX) o o 0 〜10 _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 8 UTRON Rev. 1.0 UT62256C 32K X 8 BIT LOW POWER CMOS SRAM 28 pin 8x13.4mm STSOP PACKAGE OUTLINE DIMENSION UNIT SYMBOL Note： E dimension is not including end flash the total of both sides’ end flash is not above 0.3mm. A A1 A2 b c Db E e D L L1 y Θ 2 2 2 2 5 INCH(BASE) 0.047 (MAX) 0.004±0.002 0.039±0.002 0.006 (TYP) 0.010 (TYP) 0.465±0.004 0.315±0.004 0.022 (TYP) 0.528±0.008 0.020±0.004 0.0315±0.004 0.08(MAX) o o 0 〜5 MM(REF) 1.20 (MAX) 0.10±0.05 1.00±0.05 0.15(TYP) 0.254(TYP) 11.80±0.10 8.00±0.10 0.55(TYP) 13.40±0.20 0.50±0.10 0.80±0.10 0.003(MAX) o o 0 〜5 _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 9 UTRON Rev. 1.0 UT62256C 32K X 8 BIT LOW POWER CMOS SRAM ORDERING INFORMATION PART NO. UT62256CPC-70 UT62256CPC-70L UT62256CPC-70LL UT62256CSC-35 UT62256CSC-35L UT62256CSC-35LL UT62256CSC-70 UT62256CSC-70L UT62256CSC-70LL UT62256CLS-35L UT62256CLS-35LL UT62256CLS-70L UT62256CLS-70LL ACCESS TIME (ns) 70 70 70 35 35 35 70 70 70 35 35 70 70 STANDBY CURRENT (µA) 5 mA 100 µA 40 µA 5 mA 100 µA 40 µA 5 mA 100 µA 40 µA 100 µA 50 µA 100 µA 40 µA PACKAGE 28PIN PDIP 28PIN PDIP 28PIN PDIP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN SOP 28PIN STSOP 28PIN STSOP 28PIN STSOP 28PIN STSOP _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 10 UTRON Rev. 1.0 UT62256C 32K X 8 BIT LOW POWER CMOS SRAM REVISION HISTORY REVISION REV. 0.9 REV. 1.0 DESCRIPTION 1. Original. 1. The test condition of ICC1 and ICC2 have been revised. 2. The symbols CE#,OE# and WE# are revised as DATE Apr. 26,2001 MAY. 14,2001 CE , OE and WE 3. The ordering information of PACKAGE ,STSOP-1 is revised as STSOP. _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 11 UTRON Rev. 1.0 UT62256C 32K X 8 BIT LOW POWER CMOS SRAM THIS PAGE IS LEFT BLANK INTENTIONALLY. _____________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80027 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 12