ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 1. Pin descriptions Pin No. Pin Name I/O Type Reset Default 1 LOSCI AI / Low frequency crystal OSC input 2 LOSCO AO / Low frequency crystal OSC output 3 GND PWR / Digital signal ground 4 4(1) A15 O L Bit15 of ext. memory address bus CLE O L Command latch enable of Nand type flash AC’97RST- O H Reset to AC’97 block ATA_RST- O H ATA device reset A16 O L Bit16 of ext. memory address bus ALE O L Address latch enable of Nand type flash GIOB0 BI Z Bit0 of general purpose I/O port B DAC_BCK O Z Ext. A17 O L Bit17 of ext. memory address bus ATAD8 BI L Bit8 of ATA device data bus GIOB1 BI Z Bit1 of general purpose I/O port B DAC_LR O Z Ext. 10 10(1) A18 O L Bit18 of ext. memory address bus ATAD9 BI L Bit9 of ATA device data bus 11 11(1) GIOB2 BI Z Bit2 of general purpose I/O port B DAC_SDATA O Z Ext. 12 12(1) A19 O L Bit19 of ext. memory address bus ATAD10 BI L Bit10 of ATA device data bus 13 13(1) GIOB3 BI Z Bit3 of general purpose I/O port B DAC_FS256 O Z Ext. 14 14(1) A20 O L Bit20 of ext. memory address bus ATAD11 BI L Bit11 of ATA device data bus 15 15(1) GIOB4 BI Z Bit4 of general purpose I/O port B AC’97BITCK O Z AC’97 codec bit clock 16 16(1) A21 O L Bit21 of ext. memory address bus ATAD12 BI L Bit12 of ATA device data bus 17 GIOB5 BI Z Bit5 of general purpose I/O port B 5 5(1) 6 6(1) 7 7(1) 8 8(1) 9 9(1) 3 Short Description DAC bit clock output DAC left/right channel output DAC serial data output DAC 256x over sampling clock Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 17(1) AC’97SYNC O 4 Z AC’97 codec sample SYNC 18 18(1) A22 O L Bit22 of ext. memory address bus ATAD13 BI L Bit13 of ATA device data bus 19 19(1) 19(2) GIOB6 BI Z Bit6 of general purpose I/O port B AC’97SDI I Z AC’97 codec serial data input DAC3LO O Z Int. 20 20(1) A23 O L Bit23 of ext. memory address bus ATAD14 BI L Bit14 of ATA device data bus 21 21(1) A24 O L Bit24 of ext. memory address bus ATAD15 BI L Bit15 of ATA device data bus 22 22(1) 22(2) GIOB7 BI Z Bit7 of general purpose I/O port B AC’97SDO O Z AC’97 codec serial data output DAC3RO O Z Int. 23 VCC PWR 24 USBD- A / USB negative connect 25 USBD+ A / USB positive connect 26 USBVBUS I L USB cable power signal 27 PVDD A / Bypass capacitor for power amplifier 28 PAOR A / Output of right channel power amplifier 29 PAOL A / Output of 30 PGND PWR / Ground for power amplifier circuits 31 PAIR A / Input of right channel power amplifier 32 PAIL A / Input of 33 AOUTR A / Int. sigma-dalta DAC right channel analog output 34 AOUTL A / Int. sigma-dalta DAC left channel analog output 35 VRDA A / Reference voltage for DAC 36 VLAD A / Low voltage for Touch Panel 37 VRAD A / Reference voltage for ADC 38 AGCI A / Microphone ADC amplifier input 39 MICOUT A / Microphone pre-amplifier output 40 MICIN A / Microphone pre-amplifier input 41 VMIC A / Power supply for microphone & Touch Panel DAC3 right channel digital output DAC3 right channel digital output Power supply for Pads circuits (3.15v) Tel left channel power amplifier left channel power amplifier 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 42 AGND PWR 5 / Analog ground for record, touch panel and ADC blocks 43 Y2 AI / Connect to touch panel Y2 44 Y1 AI / Connect to touch panel Y1 45 X1 AI / Connect to touch panel X1 46 X2 AI / Connect to touch panel X2 47 AVCC PWR Power supply for record, touch panel and ADC blocks (3.15v) 48 BATSEL I Battery select, 0:one battery 1:two batteries 49 IBIAS I Int. bias pin with a ext.R(1.5Mohm) to ground 50 VREFI A Reference voltage input (1.5v) 51 VL0 AI Battery monitor reference voltage input (1.40v) 52 VL1 AI Battery monitor reference voltage input (1.30v) 53 VL2 AI Battery monitor reference voltage input (1.15v) 54 VL3 AI Battery monitor reference voltage input (1.05v) 55 DCDIS I 56 VBAT I 57 DCF3 AI / The third DC-DC feedback pin 58 DCF2 AI / VCC(3.15V) DC-DC feedback pin 59 DCF1 AI / VDD(2.35V) DC-DC feedback pin 60 VP1 PWR Power supply for int. regulator 61 VDD PWR Power supply for core (2.35v) 62 VP2 AI / Input for int. power switch 63 DCOP2 AO / VCC(3.15V) DC-DC pulse output 64 DCOP3 AO / The third DC-DC pulse output 65 DCOP1 AO / VDD(2.35V) DC-DC pulse output 66 AVDD PWR 67 AVSS PWR / Ground for PLL analog circuits 68 HOSCI AI / High frequency crystal OSC input 69 HOSCO AO / High frequency crystal OSC output 70 GND PWR / Digital signal ground L Int DC-DC convertor disable, 0:enable 1:disable Battery signal input (1.0-1.5v) Power supply for PLL analog circuits (2.35v) Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 71 CKOUT2 O 6 L High frequency clock output 72 72(1) GIOC0 BI Z Bit0 of general purpose I/O port C SIN1 I Z UART1 serial input 73 73(1) XSCLK O H TCP LCM XSCLK output LCDCK O H TCP2 LCD module CK 74 74(1) GIOC1 BI Z Bit1 of general purpose I/O port C SOUT1 O Z UART1 serial output 75 75(1) DISPOFF O Z TCP LCM display off control output FMIFIN I Z FM radio IF counter input 76 VDD PWR 77 77(1) 77(2) FRAME O Z TCP LCM frame signal output V2 O Z Int. 4comX28seg LCD driver V2 LCM_CE O Z MC141803 CE 78 VCC PWR 79 79(1) 79(2) YSCLK_LP O L TCP LCM YSCLK/LP signal output LCM_RW- O L MC141803 RW- LCDCE O L TCP2 LCD module CE 80 80(1) 80(2) GIOC2 BI Z Bit2 of general purpose I/O port C SIN2 I Z UART2 serial input IRRX I Z IR receive input 81 81(1) 81(2) YDU O Z TCP LCM YDU signal output V1 O Z Int. 4comX28seg LCD driver V1 LCM_CS- O Z MC141803 CS- 82 82(1) 82(2) GIOC3 BI Z Bit3 of general purpose I/O port C SOUT2 O Z UART2 serial output IRTX O Z IR transmit output 83 83(1) 83(2) GIOF7 BI Z Bit7 of general purpose I/O port F SEG19 O Z SEG19 of int. 4comX28seg LCD driver KEYO7 O Z Bit7 of key scan circuit output 84 GIOC4 BI Z Bit4 of general purpose I/O port C 85 85(1) 85(2) GIOF6 BI Z Bit6 of general purpose I/O port F SEG18 O Z SEG18 of int. 4comX28seg LCD driver KEYO6 O Z Bit6 of key scan circuit output 86 GIOC5 BI Z Bit5 of general purpose I/O port C Power supply for core (2.35v) Power supply for Pads circuits (3.15v) Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 87 GIOF5 BI (1) 87 SEG17 O 87(2) KEYO5 O 7 Z Bit5 of general purpose I/O port F Z SEG17 of int. 4comX28seg LCD driver Z Bit5 of key scan circuit output 88 88(1) 88(2) GIOF4 BI Z Bit4 of general purpose I/O port F SEG16 O Z SEG16 of int. 4comX28seg LCD driver KEYO4 O Z Bit4 of key scan circuit output 89 VCC PWR 90 90(1) GIOG0 BI Z Bit0 of general purpose I/O port G SEG20 O Z SEG20 of int. 4comX28seg LCD driver 91 91(1) 91(2) GIOF3 BI Z Bit3 of general purpose I/O port F SEG15 O Z SEG15 of int. 4comX28seg LCD driver KEYO3 O Z Bit3 of key scan circuit output 92 92(1) 92(2) GIOF2 BI Z Bit2 of general purpose I/O port F SEG14 O Z SEG14 of int. 4comX28seg LCD driver KEYO2 O Z Bit2 of key scan circuit output 93 93(1) 93(2) GIOF1 BI Z Bit1 of general purpose I/O port F SEG13 O Z SEG13 of int. 4comX28seg LCD driver KEYO1 O Z Bit1 of key scan circuit output 94 94(1) 94(2) GIOF0 BI Z Bit0 of general purpose I/O port F SEG12 O Z SEG12 of int. 4comX28seg LCD driver KEYO0 O Z Bit0 of key scan circuit output 95 95(1) GIOG1 BI Z Bit1 of general purpose I/O port G SEG21 O Z SEG21 of int. 4comX28seg LCD driver 96 96(1) 96(2) GIOE7 BI Z Bit7 of general purpose I/O port E SEG11 O Z SEG11 of int. 4comX28seg LCD driver KEYI11 I Z Bit11 of key scan circuit input 97 97(1) 97(2) GIOE6 BI Z Bit6 of general purpose I/O port E SEG10 O Z SEG10 of int. 4comX28seg LCD driver KEYI10 I Z Bit10 of key scan circuit input 98 98(1) 98(2) GIOE5 BI Z Bit5 of general purpose I/O port E SEG9 O Z SEG9 of int. 4comX28seg LCD driver KEYI9 I Z Bit9 of key scan circuit input 99 99(1) GIOE4 BI Z Bit4 of general purpose I/O port E SEG8 O Z SEG8 of int. 4comX28seg LCD driver Power supply for Pads circuits (3.15v) Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 99(2) KEYI8 I 100 100(1) 100(2) Bit8 of key scan circuit input GIOE3 BI Z Bit3 of general purpose I/O port E SEG7 O Z SEG7 of int. 4comX28seg LCD driver KEYI7 I Z Bit7 of key scan circuit input GIOG2 BI Z Bit2 of general purpose I/O port G SEG22 O Z SEG22 of int. 4comX28seg LCD driver GIOE2 BI Z Bit2 of general purpose I/O port E SEG6 O Z SEG6 of int. 4comX28seg LCD driver KEYI6 I Z Bit6 of key scan circuit input GIOE1 BI Z Bit1 of general purpose I/O port E SEG5 O Z SEG5 of int. 4comX28seg LCD driver KEYI5 I Z Bit5 of key scan circuit input GIOE0 BI Z Bit0 of general purpose I/O port E SEG4 O Z SEG4 of int. 4comX28seg LCD driver KEYI4 I Z Bit4 of key scan circuit input GIOD7 BI Z Bit7 of general purpose I/O port D SEG3 O Z SEG3 of int. 4comX28seg LCD driver TCPD7 O Z Bit7 of TCP data bus KEYI3 I Z Bit3 of key scan circuit input GIOD6 BI Z Bit6 of general purpose I/O port D SEG2 O Z SEG2 of int. 4comX28seg LCD driver TCPD6 O Z Bit6 of TCP data bus KEYI2 I Z Bit2 of key scan circuit input GIOG3 BI Z Bit3 of general purpose I/O port G SEG23 O Z SEG23 of int. 4comX28seg LCD driver GIOD5 BI Z Bit5 of general purpose I/O port D SEG1 O Z SEG1 of int. 4comX28seg LCD driver TCPD5 O Z Bit5 of TCP data bus KEYI1 I Z Bit1 of key scan circuit input 109 GND PWR / Digital signal ground 110 110(1) 110(2) 110(3) GIOD4 BI Z Bit4 of general purpose I/O port D SEG0 O Z SEG0 of int. 4comX28seg LCD driver TCPD4 O Z Bit4 of TCP data bus KEYI0 I Z Bit0 of key scan circuit input 101 101(1) 102 102(1) 102(2) 103 103(1) 103(2) 104 104(1) 104(2) 105 105(1) 105(2) 105(3) 106 106(1) 106(2) 106(3) 107 107(1) 108 108(1) 108(2) 108(3) 8 Z Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 111 VDD PWR 112 112(1) 112(2) 112(3) 113 113(1) 113(2) 113(3) 114 114(1) 115 115(1) 115(2) 115(3) 116 116(1) 116(2) 116(3) 117 117(1) 9 Power supply for core (2.35v) GIOD3 BI Z Bit3 of general purpose I/O port D COM3 O Z COM3 of int. 4comX28seg LCD driver TCPD3 O Z Bit3 of TCP data bus LCDD3 O Z Bit3 of TCP2 data bus GIOD2 BI Z Bit2 of general purpose I/O port D COM2 O Z COM2 of int. 4comX28seg LCD driver TCPD2 O Z Bit2 of TCP data bus LCDD2 O Z Bit2 of TCP2 data bus GIOG4 BI Z Bit4 of general purpose I/O port G SEG24 O Z SEG24 of int. 4comX28seg LCD driver GIOD1 BI Z Bit1 of general purpose I/O port D COM1 O Z COM1 of int. 4comX28seg LCD driver TCPD1 O Z Bit1 of TCP data bus LCDD1 O Z Bit1 of TCP2 data bus GIOD0 BI Z Bit0 of general purpose I/O port D COM0 O Z COM0 of int. 4comX28seg LCD driver TCPD0 O Z Bit0 of TCP data bus LCDD0 O Z Bit0 of TCP2 data bus MWR- BI H Ext. memory write active signal WE- O H Nand type flash write enable 118 118(1) MRD- BI H Ext. memory read active signal RE O H Nand type flash read enable 119 A0 BI L Bit0 of ext. memory address bus 120 120(1) GIOG5 BI Z Bit5 of general purpose I/O port G SEG25 O Z SEG25 of int. 4comX28seg LCD driver 121 A1 BI L Bit1 of ext. memory address bus 122 A2 BI L Bit2 of ext. memory address bus 123 A3 BI L Bit3 of ext. memory address bus 124 A4 BI L Bit4 of ext. memory address bus 125 A5 BI L Bit5 of ext. memory address bus 126 126(1) GIOG6 BI Z Bit6 of general purpose I/O port G SEG26 O Z SEG26 of int. 4comX28seg LCD driver 127 A6 BI L Bit6 of ext. memory address bus Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 128 A7 BI 10 L Bit7 of ext. memory address bus 129 A8 BI L Bit8 of ext. memory address bus 130 ENMI- SIU H Ext. non-maskable interrupt input 131 131(1) GIOG7 BI Z Bit7 of general purpose I/O port G SEG27 O Z SEG27 of int. 4comX28seg LCD driver 132 GND PWR / Digital signal ground 133 VCC PWR 134 A9 BI L Bit9 of ext. memory address bus 135 A10 BI L Bit10 of ext. memory address bus 136 A11 BI L Bit11 of ext. memory address bus 137 SIRQ- SIU H Ext. maskable interrupt input 138 A12 BI L Bit12 of ext. memory address bus 139 A13 BI L Bit13 of ext. memory address bus 140 STANDBY- O L System in standby mode output signal 141 ZICEDO O L Debug pin, data output from DSU 142 ZICEDI SIU H Debug pin, data input to DSU 143 ZICECK SIU H Debug pin, clock into DSU 144 CE2- O H Ext. memory chip select 2 145 TEST SI L Test mode control, 0:normal mode 1:test mode 146 ZICERST- SIU H Debug pin, to reset DSU 147 CE3- O H Ext. memory chip select 3 148 ZICEEN- SIU H Debug pin, to enable DSU 149 CE4- O H Ext. memory chip select 4 150 RESET- SI H System reset input 151 A14 O L Bit14 of ext. memory address bus 152 CE5- O H Ext. memory chip select 5 153 GND PWR / Digital signal ground 154 D0 BI Z Bit0 of ext. memory data bus 155 155(1) GIOA0 BI Z Bit0 of general purpose I/O port A CD0 I Z IDE card detection 156 D1 BI Z Bit1 of ext. memory data bus 157 157(1) GIOA1 BI Z Bit1 of general purpose I/O port A IOCS16- I Z IDE 8 or 16 data bus indicate Power supply for Pads circuits (3.15v) Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 158 D2 BI 159 159(1) 159(2) 176 11 Z Bit2 of ext. memory data bus GIOA2 BI Z Bit2 of general purpose I/O port A CS1- O Z IDE chip select 1 FX_SS- O Z Active low slave select of FLEX decoder 160 D3 BI Z Bit3 of ext. memory data bus 161 D4 BI Z Bit4 of ext. memory data bus 162 162(1) 162(2) GIOA3 BI Z Bit3 of general purpose I/O port A IORDY I Z IDE IORDY FX_READY- I Z FLEX decoder SPI packet ready 163 D5 BI Z Bit5 of ext. memory data bus 164 A25 BI L Bit25 of ext. memory address bus 165 VCC PWR 166 D6 BI Z Bit6 of ext. memory data bus 167 167(1) 167(2) GIOA4 BI Z Bit4 of general purpose I/O port A CS0- O Z IDE chip select 0 FX_SCK O Z Message shift clock of FLEX decoder 168 D7 BI Z Bit7 of ext. memory data bus 169 CE0- O H Ext. memory chip select 0 170 170(1) 170(2) GIOA5 BI Z Bit5 of general purpose I/O port A IRQ I Z IDE IRQ FX_MOSI I Z Message input from FLEX decoder 171 CE1- O H Ext. memory chip select 1 172 CE6- O H Ext. memory chip select 6 173 173(1) 173(2) GIOA6 BI Z Bit6 of general purpose I/O port A IOW- O Z IDE IOW- FX_MOSO O Z Message output to FLEX decoder 174 CE7- O H Ext. memory chip select 7 175 175(1) 175(2) GIOA7 BI Z Bit7 of general purpose I/O port A IOR- O Z IDE IOR- FX_CKOUT1 O Z FLEX decoder clock (76.8KHz) VDD PWR Power supply for Pads circuits (3.15v) Power supply for core (2.35v) Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD Note: PWR : power A : analog pad AI : analog input AO : analog output Z : high resistant I : digital input O : digital output BI : bidirectional input/output SI : schmitt input SIU : schmitt input with int. pull-up resistant DSU: Developing Support Unit xxx(m) : multiplex pin’s function m TCP: Tape Carrier Package , such as SEIKO EPSON LCD module TCP2: ASIC2/3 LCD module Note2: key in pads have int. pull-up resistants when key in mode enable. note3: Avoid AC’97 ATE TEST MODE AC’97_SYNC : output ‘L’ after 3 system clocks, go “Z” AC’97_SDO : output ‘L’ after 3 system clocks, go “Z” AC’97_RST- : output ‘L’ after 3 system clocks, go “H” 12 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 Actions Semiconductor Co.,LTD GIOF4 GIOF5 GIOC5 GIOF6 GIOC4 GIOF7 GIOC3 YDU GIOC2 YSCLK/LP VCC FRAME VDD DISOFF GIOC1 XSCLK GIOC0 CKOUT2 GND HOSCO HOSCI AVSS AVDD DCOP1 DCOP3 DCOP2 VP2 VDD2 VP1 DCF1 DCF2 DCF3 VBAT DCDIS VL3 VL2 VL1 VL0 VREFI IBIAS SEL AVCC X2 X1 LOSCI LOSCO GND A15 AC97RSTA16 GIOB0 A17 GIOB1 A18 GIOB2 A19 GIOB3 A20 GIOB4 A21 GIOB5 A22 GIOB6 A23 A24 GIOB7 VCC USBDUSBD+ USBVBUS PVDD PAOR PAOL PGND PAIR PAIL AOUTR AOUTL VRDA VLAD VRAD AGIC MICOUT MICIN VMIC AGND Y2 Y1 VCC A9 A10 A11 SIRQA12 A13 STANDBYZICEDO ZICEDI ZICECK CE2TEST ZICERSTCE3ZICEENCE4RESETA14 CE5GND D0 GIOA0 D1 GIOA1 D2 GIOA2 D3 D4 GIOA3 D5 A25/IFIN VCC D6 GIOA4 D7 CE0GIOA5 CE1CE6GIOA6 CE7GIOA7 VDD 6 7 1 P 1 0 0 2 J T A 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 GND GIOG7 NMIA8 A7 A6 GIOG6 A5 A4 A3 A2 A1 GIOG5 A0 MRDMWRGIOD0 GIOD1 GIOG4 GIOD2 GIOD3 VDD GIOD4 GND GIOD5 GIOG3 GIOD6 GIOD7 GIOE0 GIOE1 GIOE2 GIOG2 GIOE3 GIOE4 GIOE5 GIOE6 GIOE7 GIOG1 GIOF0 GIOF1 GIOF2 GIOF3 GIOG0 VCC U? 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 RA3930P176 13 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD ELECTRICAL CHARACTERISTIC A Absolute Maximum Ratings (TA = 25°C) Parameter Symbol Condition Rating Unit VDD 2.5V -0.5 to +3.0 V VCC 3.3V -0.5 to +3.9 V Vi VCC >= 3.3 -0.5 to +3.9 V VCC < 3.3 -0.5 to VCC+0.6 V Supply voltage Input voltage Storage temperature Tstg -65 to +150 Cautions 1. Do not short-circuit two or more output pins simultaneously. 2. If even one of the above parameters exceeds the absolute maximum ratings even momentarily, the quality of the product may be degraded. The absolute maximum ratings,therefore, specify the value exceeding which the product may be physically damaged. Use the product well within these ratings. The specifications and conditions shown in DC Characteristics and AC characteristics are the ranges for normal operation and quality assurance of the product. B Capacitance (TA = 25°C, VCC = 0 V) Parameter Symbol Input capacitance CI I/O capacitance CIO C Condition MIN. MAX. Unit fC = 1 MHz 15 pF Unmeasured pins returned to 0 V 15 pF DC Characteristics (TA = -10 to +70°C, VDD = 2.35 V, VCC = 3.15 V) Parameter Symbol Condition MIN. High-level output voltage VOH IOH = -2 mA 2.4 Low-level output voltage VOL IOL = 2 mA High-level input voltage VIH Low-level input voltage VIL Input leakage current ILI VCC = 3.6 V, VI = VCC, 0 V ±10 uA Output leakage current ILO VCC = 3.6 V, VI = VCC, 0 V ±5 uA Supply Current Two batteries 14 TYP. MAX. Unit V 0.4 V 0.6* VCC V VCC + 0.6 -0.3 0.4VC V C In Fullspeed mode (MCU run 24.576MHz in internal SRAM,DSP run 36MIPS) 40 Tel 86-756-3392353 60 mA Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD mode In Standby mode IVDD 50 150 200 uA 9 16 40 uA 9 18 40 uA In Fullspeed mode (MCU run 24.576MHz in internal SRAM,DSP run 36MIPS) In Standby mode Ivcc Notes 1. IvDD is a total power supply current for the 2.5 V power supply. IvDD is applied to the LOGIC and PLL and OSC block. Ivcc is a total power supply current for the 3.3 V power supply. Ivcc is applied to the USB, IO, TP, and AD block. D AC Characteristics (TA = -10 to +70°C, VDD = 2 to 3 V, VCC = 2.7 to 3.6 V) AC test input waveform VCC All input pins 0.6VCC 0.4VCC 0V Test Points 0.6VCC 0.4VCC AC test output measuring points VCC All output pins 0V 0.5VCC Test Points 0.5VCC (1) Reset parameter Parameter Symbol Condition MIN. Reset input low-level width tWRSL RESET# pin 160 MAX. Unit µs tWRSL VCC RESET# 0V (2) Initialization parameter Parameter 15 Symbol Condition MIN. Tel 86-756-3392353 MAX. Unit Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD Data sampling time tSS 61.04 µs (from RESET# ↑) Output delay time (from RESET# ↑) µs 61.04 tOD 32.768KHz RESET# I/O PINs tSS tOD Hi-Z Normal Operation Sampling Point (3) GPIO interface parameter Parameter Symbol Condition MIN. Input level width tGPIN Normal operation 11/ fMCUclk GPIO input rise time tGPRISE 200 ns GPIO input fall time tGPFALL 200 ns Output level width tGPOUT 11/ fMCUclk MAX. Unit µs ns Notes 1. fMCUclk is the frequency that MCU is running upon. (a) Input level width (b) Input rise/fall time (c) Output level width 16 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD (4) Ordinary ROM parameter Parameter Symbol Condition MIN. Note tACC HOSC=24.576MHz 102 ns Note tCE HOSC=24.576MHz 82 ns Data input setup time tDS HOSC=24.576MHz 0 ns Data input hold time tDH HOSC=24.576MHz 0 ns Data access time (from address) Data access time (from CEx# ↓) MAX. Unit t ACC A[24:0] t CE CEn-/MRD- t DS t DH D[7:0](I) (5) External system bus parameter Parameter Address setup time (to command signal↓) Note 1, 2 Address hold time (from command signal↑)Note 1, 2 Data output setup time (to command signal↓) Note 1 Data output hold time (from command signal↑) Data input setup time (to command signal↑) Note 1 Note 1 Data input hold time (from command signal↑) Note 1 Symbol Condition MIN. MAX. Unit tXAS Memory Read 0.5T ns tXAS Memory Write 1.5T ns tXAH 0.5T ns tWXDS 0 T ns tWXDH 3 0.5T ns tRXDS 0 2T ns tRXDH 0 ns Notes 1. MRD#, MWR# are called the command signals for the External System Bus Interface. 2. T (ns) = 1000 / fMCUCLK 17 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD MCUCLK 2 1 3 t XAS t XAH A[24:0] CEn- t RXDS MRD- t RXDH D[7:0](I) MWR- t XAS t XAH D[7:0](O) t WXDS t WXDH Bus Operation (a) Instruction fetch cycle MCU CLK MRD# CEn# (b) Memory read cycle MCU CLK MRD# CEn# (b) Memory write cycle MCU CLK MWR# CEn# 18 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD (6) Keyboard interface parameter Parameter Symbol Condition MIN. MAX. Unit KEYOUT (7:0) low-level width tSCAN Debounce time=2.5ms 130 µs Voltage stabilization time tKWAIT Debounce time=2.5ms 0 µs Key scan interval time tKI Debounce time=2.5ms 130 µs Key input delay time (from KEYOUT n↓) tKS Debounce time=2.5ms 0 µs Key input hold time (from KEYOUT n↑) tKH Debounce time=2.5ms 0 µs (KEYOUT n↑→ KEYOUT (n+1)↓) Remarks 1. KEYOUT(7:0) is multiplexed with GIOF(7:0); KEYIN(3:0) is multiplexed with GIOD(7:4); KEYIN(11:4) is multiplexed with GIOE(7:0) 2. Keyscan Debouncing time is set thru Bit(2:0) of the MFP Configuration1 Register[0xB1h] 3. n = 0 to 7 (a) Keyboard scan parameter 1 KEYOUTn tKWAIT (output) KEYOUT(n+1) tSCAN (output) Remark n=0 to 6 (b) Keyboard scan parameter 2 KEYOUT0 (output) KEYOUT1 ss ss (output) KEYOUT7 tKWAIT tKI ss (output) (c) Keyboard port parameter 19 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD KEYOUTn (output) tKH tKS KEYIN(7:0) (input) Remark n=0 to 7 (7) S/PDIF interface parameter X Channel A Y Channel B Z Channel A Y Channel B Sub-frame Frame 191 Frame 0 Start of Channel Status Block Figure 7.1. 1 0 X Channel A 0 0 1 Y Channel B Sub-frame Frame 1 Frame/Block Format 1 1 0 1 1 0 0 1 1 0 1 0 1 Figure 7.2. Biphase-Mark Encoding Figure 7.3. Preamble Forms Sub-frame Preamble 3 4 7 8 AuxData 2728293031 Audio Data MSB 0 LSB bit VUC P Validity User Data Channel Status Data Parity Bit Figure 7.4. Sub-frame Format (8) Serial interface parameter 20 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 13 Prescale Value Baud Rate Divisor 1.625 %Error Divisor 1 %Error Divisor %Error 600 192 0.16% - - - - 1200 96 0.16% - - - - 1800 64 0.16% - - - - 2000 58 0.53% - - - - 2400 48 0.16% - - - - 3600 32 0.16% 256 0.16% - - 4800 24 0.16% 192 0.16% - - 7200 16 0.16% 128 0.16% 208 0.16% 9600 12 0.16% 96 0.16% 156 0.16% 14400 8 0.16% 64 0.16% 104 0.16% 19200 6 0.16% 48 0.16% 78 0.16% 28800 4 0.16% 32 0.16% 52 0.16% 38400 3 0.16% 24 0.16% 39 0.16% 57600 2 0.16% 16 0.16% 26 0.16% 115200 1 0.16% 8 0.16% 13 0.16% 230400 - - 4 0.16% - - 460800 - - 2 0.16% - - 750000 - - - 921600 - - 1 1500000 - - - - 2 0.16% 0.00% - - - 1 0.00% Note : Data transfer rate per bit, which is determined by the divisor of the baud-rate generator that is set with UART1/2 Baud Rate Registers and clock prescaler that is set with UART1/2 Control Registers. (9) A/D Converter Characteristics (TA = -10 to +70°C, VDD = 2.0 to 3.0 V, VCC = 2.7 to 3.6 V) Parameter Symbol Zero-scale error ZSE ±4.0 LSB Full-scale error RSE ±5.0 LSB Integral linearity error INL ±3.0 LSB Differential linearity error DNL ±3.0 LSB Analog input voltage VIAN S/N Ratio MAX THD+N (MAX) : Condition MIN. TYP. –0.3 MAX. AVDD + 0.3 Unit V : 64dB 55dB (10) D/A Converter Characteristics (TA =-10 to +70°C, VDD = 2.0 to 3.0 V, VCC = 2.7 to 3.6 V) 21 Parameter Symbol Integral linearity error INL Condition MIN. TYP. ±3.0 Tel 86-756-3392353 MAX. Unit LSB Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD Differential linearity error DNL ±3.0 LSB I2S interface parameter Symbol t Pin Name Clock Output Frequency SOISS Wordstrobe Hold Time after BCKIN, falling edge of clock LRCIN Data Hold Time after falling SOODC S/N Ratio edge of clock MAX THD+N (MAX) : Min. Typ. BCKIN SOCLK t t Parameter BCKIN, DIN Max. 651 Unit ns 10 t 10 t SOCLK/2 ns SOCLK/2 ns Test Conditions 48 kHz/s Stereo 16 bit/s : 90dB 78dB E. MCU/DSP Dissipation (Ivdd VS. Frequency) 1.) MCU Dissipation (Vbat=3.0V,DSP under reset, MCU runs in internal SRAM) Clock Source 32.768KHZ 22 Divisor factor Ivdd(Max) /(1—1024) 350uA Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD 24.576MHz /1 8.5mA /2 4.7mA /4 2.9mA /8 1.8mA /16 1.4mA /32 1.1mA /64 0.96mA /128 0.88mA /256 0.85mA /512 0.84mA /1024 0.83mA 2.) DSP Dissipation (Vbat=3.0V,MCU in Debug mode) F DSP Speed (MIPS) Ivdd (Max) 6 11.7mA 12 18.8mA 24 30.7mA 36 43.2mA 48 55.9mA 60 67.2mA RECOMMENDED SOLDERING CONDITIONS The conditions listed below shall be met when soldering the ATJ2001. Table 4-1. Soldering Conditions for Surface-Mount Devices Soldering Process Soldering Conditions Peak package’s surface temperature: 235°C Infrared ray reflow Reflow time: 30 seconds or less (210°C or more) Maximum allowable number of reflow processes: 2 Exposure limit: 3 days Partial heating method Note (10 hours of pre-baking is required at 125°C afterward). Terminal temperature: 300°C or less Heat time: 3 seconds or less (for one side of a device) Note Maximum number of days during which the product can be stored at a temperature of 25°C and a relative humidity of 65% or less after dry-pack package is opened. Caution Do not apply two or more different soldering methods to one chip (except for partial heating method for terminal sections). NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control 23 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. 24 Tel 86-756-3392353 Fax 86-756-3392251 ATJ2001 PDA+MP3 Decoder Actions Semiconductor Co.,LTD LQFP176: plastic low profile quad flat package; 176 leads; body 24 x 24 x 1.4 mm SOT506-1 c y X A 132 133 89 88 ZE e E HE (A 3) A A2 A1 θ wM Lp bp L detail X pin 1 index 45 176 44 1 ZD wM bp e v M A D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.15 0.05 1.45 1.35 0.25 0.27 0.17 0.20 0.09 24.1 23.9 24.1 23.9 0.5 HD HE 26.15 26.15 25.85 25.85 L Lp v w y ZD ZE θ 1.0 0.75 0.45 0.12 0.08 0.08 1.43 1.08 1.43 1.08 7 0o o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 25 REFERENCES OUTLINE VERSION IEC JEDEC SOT506-1 136E25 MS-026 EUROPEAN PROJECTION EIAJ ISSUE DATE 00-01-19 00-02-01 Tel 86-756-3392353 Fax 86-756-3392251