HCS365
KEELOQ® Code Hopping Encoder
FEATURES
PACKAGE TYPES
PDIP, SOIC
Security
Two programmable 32-bit serial numbers
Two programmable 64-bit crypt keys
Two programmable 60-bit seed values
Each transmission is unique
67/69-bit transmission code length
32-bit hopping code
Crypt keys are read protected
S2
3
S3/SHIFT/
RFEN
4
7
LED
6
DATA
5
Vss
Power
latching
and
switching
Controller
RESET circuit
LED
LED driver
EEPROM
DATA
Encoder
32-bit SHIFT register
VSS
Button input port
S3/SHIFT S2 S1 S0
RFEN
GENERAL DESCRIPTION
Typical Applications
The HCS365 is ideal for Remote Keyless Entry (RKE)
applications. These applications include:
2002 Microchip Technology Inc.
2
VDD
VDD
• On-chip EEPROM
• On-chip tuned oscillator (±10% over voltage and
temperature)
• Button inputs have internal pull-down resistors
• LED output
• PLL control for ASK and FSK
• Low external component count
Automotive RKE systems
Automotive alarm systems
Automotive immobilizers
Gate and garage door openers
Identity tokens
Burglar alarm systems
S1
8
Oscillator
2.05-5.5V operation
Four button inputs
15 functions available
Four selectable baud rates
Selectable minimum code word completion
Battery low signal transmitted to receiver
Nonvolatile synchronization data
PWM, VPWM, PPM, and Manchester modulation
Button queue information transmitted
Dual Encoder functionality
Other
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•
•
•
•
•
1
HCS365 BLOCK DIAGRAM
Operating
•
•
•
•
•
•
•
•
•
•
S0
HCS365
•
•
•
•
•
•
•
The HCS365 is a code hopping encoder designed for
secure Remote Keyless Entry (RKE) and secure
remote control systems. The HCS365 utilizes the
KEELOQ ® code hopping technology, which incorporates high security, a small package outline, and low
cost to make this device a perfect solution for unidirectional authentication systems and access control systems.
The HCS365 combines a hopping code generated by a
nonlinear encryption algorithm, a serial number, and
status bits to create a secure transmission code. The
length of the transmission eliminates the threat of code
scanning and code grabbing access techniques.
Preliminary
DS41109D-page 1
HCS365
The crypt key, serial number, and configuration data
are stored in an EEPROM array which is not accessible
via any external connection. The EEPROM data is programmable but read protected. The data can be verified only after an automatic erase and programming
operation. This protects against attempts to gain
access to keys or manipulate synchronization values.
In addition, the HCS365 supports a dual encoder. This
allows two manufacturers to use the same device without having to use the same manufacturer’s code in
each of the encoders. The HCS365 provides an easy
to use serial interface for programming the necessary
keys, system parameters, and configuration data.
1.0
SYSTEM OVERVIEW
Key Terms
The following is a list of key terms used throughout this
data sheet. For additional information on KEELOQ and
code hopping, refer to Technical Brief (TB003).
• RKE - Remote Keyless Entry
• Button Status - Indicates what button input(s)
activated the transmission. Encompasses the 4
button status bits S3, S2, S1 and S0 (Figure 3-2).
• Code Hopping - A method by which a code,
viewed externally to the system, appears to
change unpredictably each time it is transmitted.
• Code Word - A block of data that is repeatedly
transmitted upon button activation (Figure 3-2).
• Transmission - A data stream consisting of
repeating code words (Figure 4-1).
• Crypt Key - A unique and secret 64-bit number
used to encrypt and decrypt data. In a symmetrical block cipher such as the KEELOQ algorithm,
the encryption and decryption keys are equal and
will therefore be referred to generally as the crypt
key.
• Encoder - A device that generates and encodes
data.
• Encryption Algorithm - A recipe whereby data is
scrambled using a crypt key. The data can only be
interpreted by the respective decryption algorithm
using the same crypt key.
• Decoder - A device that decodes data received
from an encoder (i.e., HCS5XX).
• Decryption Algorithm - A recipe whereby data
scrambled by an encryption algorithm can be
unscrambled using the same crypt key.
• Learn – Learning involves the receiver calculating
the transmitter’s appropriate crypt key, decrypting
the received hopping code and storing the serial
number, synchronization counter value, and crypt
key in EEPROM. The KEELOQ product family facilitates several learning strategies to be implemented on the decoder. The following are
examples of what can be done.
DS41109D-page 2
- Simple Learning
The receiver uses a fixed crypt key. The crypt
key is common to every component used by
the same manufacturer.
- Normal Learning
The receiver derives a crypt key from the
encoder serial number. Every transmitter has
a unique crypt key.
- Secure Learning
The receiver derives a crypt key from the
encoder seed value. Every encoder has a
unique seed value that is only transmitted by
a special button combination.
• Manufacturer’s Code – A unique and secret 64bit number used to derive crypt keys. Each
encoder is programmed with a crypt key that is a
function of the manufacturer’s code. Each
decoder is programmed with the manufacturer
code itself.
The HCS365 code hopping encoder is designed specifically for keyless entry systems. In particular, typical
applications include vehicles and home garage door
openers. The encoder portion of a keyless entry system is integrated into a transmitter carried by the user.
The transmitter is operated to gain access to a vehicle
or restricted area. The HCS365 is meant to be a costeffective yet secure solution to such systems requiring
very few external components (Figure 2-1).
Most low end keyless entry transmitters are given a
fixed identification code that is transmitted every time a
button is pushed. The number of unique identification
codes in a low end system is usually a relatively small
number. These shortcomings provide an opportunity
for a sophisticated thief to create a device that ‘grabs’
a transmission and retransmits it later or a device that
quickly ‘scans’ all possible identification codes until the
correct one is found.
The HCS365, on the other hand, employs the KEELOQ
code hopping technology coupled with a transmission
length of 67 bits to virtually eliminate the use of code
‘grabbing’ or code ‘scanning’. The high security level of
the HCS365 is based on the patented KEELOQ technology. A block cipher based on a block length of 32 bits
and a key length of 64 bits is used. The algorithm
obscures the information in such a way that if a single
hopping code data bit changes (before encryption), statistically more than 50% of the encrypted data bits will
change.
Preliminary
2002 Microchip Technology Inc.
HCS365
As indicated in the block diagram on page one, the
HCS365 has a small EEPROM array which must be
loaded with several parameters before use; most often
programmed by the manufacturer at the time of production. The most important of these are:
• A serial number, typically unique for every
encoder
• A crypt key
• An initial synchronization value
FIGURE 1-1:
The crypt key generation typically inputs the transmitter
serial number and 64-bit manufacturer’s code into the
key generation algorithm (Figure 1-1). The manufacturer’s code is chosen by the system manufacturer and
must be carefully controlled as it is a pivotal part of the
overall system security.
CREATION AND STORAGE OF CRYPT KEY DURING PRODUCTION
Production
Programmer
HCS365
Transmitter
Serial Number
EEPROM Array
Serial Number
Crypt Key
Sync Counter
Manufacturer’s
Code
Key
Generation
Algorithm
Crypt
Key
The valid synchronization counter is the basis behind
the transmitted code word changing for each transmission; it increments each time a button is pressed. Each
increment of the synchronization value results in more
than 50% of the hopping code bits changing.
Figure 1-2 shows how the key values in EEPROM are
used in the encoder. Once the encoder detects a button
press, it reads the button inputs and updates the synchronization counter. The synchronization counter and
crypt key are input to the encryption algorithm and the
output is 32 bits of encrypted information. This data will
change with every button press while its value will
appear to ‘randomly hop around’. Hence, this data is
referred to as the hopping portion of the code word.
The 32-bit hopping code is combined with the button
information and serial number to form the code word
transmitted to the receiver. The code word format is
explained in greater detail in Section 4.1.
.
.
.
In normal operation, each received message of valid
format is evaluated. The serial number is used to determine if it is from a learned transmitter. If the serial number is from a learned transmitter, the message is
decrypted and the synchronization counter is verified.
Finally, the button status is checked to see what operation is requested. Figure 1-3 shows the relationship
between some of the values stored by the receiver and
the values received from the transmitter.
For detailed decoder operation, see Section 7.0.
A receiver may use any type of controller as a decoder.
Typically, it is a microcontroller with compatible firmware that allows the decoder to operate in conjunction
with an HCS365 based transmitter.
A transmitter must first be ‘learned’ by the receiver
before its use is allowed in the system. Learning
includes calculating the transmitter’s appropriate crypt
key, decrypting the received hopping code, storing the
serial number, storing the synchronization counter
value, and storing crypt key in EEPROM.
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 3
HCS365
FIGURE 1-2:
BUILDING THE TRANSMITTED CODE WORD (ENCODER)
EEPROM Array
KEELOQ
Encryption
Algorithm
Crypt Key
Sync Counter
Serial Number
Button Press
Information
Serial Number
32 Bits
Encrypted Data
Transmitted Information
FIGURE 1-3:
BASIC OPERATION OF RECEIVER (DECODER)
1 Received Information
EEPROM Array
Button Press
Information
Serial Number
2
32 Bits of
Encrypted Data
Check for
Match
Manufacturer Code
Serial Number
Sync Counter
Crypt Key
3
KEELOQ
Decryption
Algorithm
Decrypted
Synchronization
Counter
Verify
4 Counter
Perform Function
5 Indicated by
button press
NOTE: Circled numbers indicate the order of execution.
DS41109D-page 4
Preliminary
2002 Microchip Technology Inc.
HCS365
2.0
DEVICE DESCRIPTION
As shown in the typical application circuits (Figure 2-1),
the HCS365 is an easy device to use. It requires only
the addition of buttons and RF circuitry for use as the
encoder in your security application. A description of
each pin is described in Table 2-1. Refer to Figure 2-2
for information on the I/O pins.
Note:
S0-S3 inputs have pull-down resistors. VIN
should be tied high if the step-up regulator
is not used.
TABLE 2-1:
PIN DESCRIPTIONS
Name
Pin
Number
S0
1
Switch input 0
S1
2
Switch input 1
S2
3
Switch input 2
S3/
SHIFT/
RFEN
4
Switch input 3,
SHIFT button or
RF Enable output
VSS
5
Ground reference
DATA
6
Data output pin/
LED
7
Open drain output for LED
VDD
8
Positive supply voltage
Description
2002 Microchip Technology Inc.
The HCS365 will normally be in a low power SLEEP
mode. When a button input is taken high, the device will
wake up, start the step-up regulator, and go through the
button debounce delay of TDB before the button code is
latched. In addition, the device will then read the configuration options. Depending on the configuration
options and the button code, the device will determine
what the data and modulation format will be for the
transmission. The transmission will consist of a stream
of code words and will be transmitted TPU after the button is pressed for as long as the buttons are held down
or until a time-out occurs. The code word format can be
either a code hopping format or a seed format.
The time-out time can be selected with the Time-out
Select (TSEL) configuration option. This option allows
the time-out to be set to 0.8s, 3.2s, 12.8s, or 25.6s.
When a time-out occurs, the device will go into SLEEP
mode to protect the battery from draining when a button
gets stuck.
If the device is in the transmit process and detects that
a new button is pressed, the current code word will be
aborted, a new code word will be transmitted and the
time-out counter will RESET. If all the buttons are
released, a minimum number of code words will still be
completed. The minimum code words can be set to 1,
2, 4, or 8 using the Minimum Code Words (MTX) configuration option. If the time for transmitting the minimum code words is longer than the time-out time, the
device will not complete the minimum code words.
Preliminary
DS41109D-page 5
HCS365
The HCS365 has an onboard nonvolatile EEPROM.
This EEPROM is used to store user programmable
data and the synchronization counter. The data is programmed at the time of production and includes the
security related information such as encoder keys,
serial numbers, discrimination values, and seed values. All the security related options are read protected.
The initial counter value is also programmed at the time
of production. From then on the device maintains the
counter itself. The HCS365 has built in redundancy for
protection and can recover from counter corruption.
FIGURE 2-1:
TYPICAL CIRCUITS
VDD
B0
S0
VDD
B1
S1
LED
B2
S2
DATA
The counter will not increment if the previous write was
corrupted by low voltage RESET or power failure during TPLL. Instead, the counter will revert back to the
previous count and the HCS370 will attempt to correct
the bad bits. This will continue on every button press
until the voltage increases and the counter is successfully corrected.
RF PLL
DATA IN
VSS
RFEN
ENABLE
Three buttons remote with PLL control
VDD
B4 B3 B2 B1 B0
S0
VDD
S1
LED
S2
DATA
S3
VSS
Tx out
Five buttons remote control (Note)
VDD
B1 B0
Tx2
Tx1
S0
VDD
S1
LED
S2
DATA
SHIFT
VSS
Tx out
DUAL Transmitter remote control
Note:
DS41109D-page 6
Preliminary
Up to 15 functions can be implemented by
pressing more than one button simultaneously or by using a suitable diode array.
2002 Microchip Technology Inc.
HCS365
FIGURE 2-2:
I/O CIRCUITS
FIGURE 2-3:
BASIC FLOW DIAGRAM OF
THE DEVICE OPERATION
START
Figure 2-2(A)
S0, S1, S2
Inputs
Sample Buttons
ZIN
Get Config
Seed
TX?
Yes
Read
Seed
No
Increment
Counter
Figure 2-2(B)
VDD
Encrypt
PFET
DATA OUT
Transmit
DATA I/O
NFET
TimeOut
Yes
No
No
MTX
STOP
Figure 2-2(C)
Yes
VDD
No
Buttons
Yes
P
DATA, RFEN
STEP
Outputs
No
N
Seed
Time
No
No
Yes
Seed
Button
Yes
No
New
Buttons
Yes
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 7
HCS365
3.0
EEPROM ORGANIZATION
Enough consecutive 8-bit blocks are reserved for the
entire option size. Options such as SEED1, which
have a length that is not an exact multiple of 8 bits, is
stored right justified in the reserved space. Additional
smaller options such as SDBT1 may be stored in the
same address as the Most Significant bits.
A summary of the HCS370 EEPROM organization is
shown in the three tables below. The address column
shows the starting address of the option and its length
or bit position. Options larger than 8 bits are stored
with the Most Significant bits at the given address.
TABLE 3-1:
Symbol
ENCODER1 OPTIONS (SHIFT=0)
Reference
Section
Description(1)
Address16:Bits
KEY1
1E: 64 bits
Encoder Key
SEED1
14: 60 bits
Encoder Seed Value
3.2.2
3.3
SYNC1
00: 20 bits
00: 18 bits
Encoder Synchronization Counter (CNTSEL=1)
Encoder Synchronization Counter (CNTSEL=0) plus overflow
3.2, 3.2.1
SER1
10: 32 bits
Encoder Serial Number
3.2.2
DISC1
1C: 10 bits
Encoder Discrimination value
MSEL1
1C: ---- 32--
Transmission Modulation
Format
HSEL1
1C: ---4 ----
Header Select
XSER1
1C: --5- ----
Extended Serial Number
QUEN1
1C: -6-- ----
Queue counter Enable
STEN1
1C: 7--- ----
START/STOP Pulse
Enable
LEDBL1
3F: -6-- ----
Low Voltage LED Blink
(1)
LEDOS1
3F: 7--- ----
LED On Time Select
SDLM1
3C: ---- ---0
Limited Seed
SDMD1
3C: ---- --1-
Seed Mode
SDBT1
14: 7654 ----
Seed Button Code
SDTM1
3C: ---- 32--
Time Before Seed Code
Word(1)
BSEL1
GSEL1
3C: --54 ----
3C: 76-- ----
3.2, 3.2.1
Value2
00
PWM
01
Manchester
10
VPWM
4.1
11
PPM
4 TE = 0
10 TE = 1
4.1
28 bits = 0
32 bits = 1
3.2
Disable = 0
Enable = 1
5.5
Disable = 0
Enable = 1
4.1
Never = 0
Once = 1
5.3
5.3
50 ms = 0
100 ms = 1
Disable = 0
Enable = 1
3.3
User = 0
Production = 1
3.3
Value2
Time (s)
00
0.0
01
0.8
10
1.6
3.3
Transmission Baud Rate
Select(1)
Guard Time Select
Format
(1)
11
3.2
Value2
TE (µs)
00
100
01
200
10
400
11
800
Value2
Time (ms)
00
00
01
6.4
10
51.2
11
102.4
3.3
4.1
4.1, 5.2
Note 1: All Timing values vary ±10%.
DS41109D-page 8
Preliminary
2002 Microchip Technology Inc.
HCS365
TABLE 3-2:
Symbol
ENCODER2 OPTIONS (SHIFT=1)
Reference
Section
Description(1)
Address16:Bits
KEY2
34: 64 bits
Encoder Key
3.2.1
SEED2
2A: 60 bits
Encoder Seed Value
3.3
SYNC2
08: 20 bits
08: 18 bits
Encoder Synchronization Counter (CNTSEL=1)
Encoder Synchronization Counter (CNTSEL=0) plus overflow
3.2,
3.2.1
SER2
26: 32 bits
Encoder Serial Number
3.2, 3.2.2
DISC2
32: 10 bits
Encoder Discrimination value
3.2, 3.2.1
MSEL2
32: ---- 32--
Transmission Modulation
Format
Value2
Format
00
PWM
01
Manchester
10
VPWM
4.1
11
PPM
4 TE = 0
10 TE = 1
4.1
28 bits = 0
32 bits = 1
3.2
Disable = 0
Enable = 1
5.5
Enable = 1
4.1
HSEL2
32: ---4 ----
Header Select
XSER2
32: --5- ----
Extended Serial Number
QUEN2
32: -6-- ----
Queue counter Enable
STEN2
32: 7--- ----
START/STOP Pulse
Enable
Disable = 0
LEDBL2
3D: -6-- ----
Low Voltage LED Blink
Never = 0
Once = 1
5.3
LEDOS2
3D: 7--- ----
LED On Time Select(1)
50 ms = 0
100 ms = 1
5.3
SDLM2
3E: ---- ---0
Limited Seed
Disable = 0
Enable = 1
3.3
SDMD2
3E: ---- --1-
Seed Mode
User = 0
Production = 1
3.3
SDBT2
2A: 7654 ----
Seed Button Code
SDTM2
3E: ---- 32--
Time Before Seed Code
word(1)
Value2
Time (s)
3.3
00
0.0
01
0.8
10
1.6
11
3.2
Value2
TE (µs)
00
100
01
200
10
400
BSEL2
GSEL2
3E: --54 ----
3E: 76-- ----
Transmission Baud Rate
Select(1)
Guard Time Select(1)
3.3
11
800
Value2
Time (ms)
00
2 TE
01
6.4
10
51.2
11
102.4
4.1
4.1, 5.2
Note 1: All Timing values vary ±10%.
2: Voltage thresholds are ±150 mV.
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 9
HCS365
TABLE 3-3:
Symbol
WAKE
DEVICE OPTIONS
3F: ---- --10
Reference
Section
Description(1)
Address16:Bits
Wake-up(1)
Value2
Value
00
No Wake-up
01
75 ms 50%
10
50 ms 33.3%
11
100 ms 16.7%
4.1
CNTSEL
3F: ---- -2--
Counter Select
16 bits = 0
20 bits = 1
3.2.1
VLOWL
3F: ---- 3---
Low Voltage Latch Enable
Disable = 0
Enable = 1
3.2.3.1
VLOWSEL
3F: ---4 ----
Low Voltage Trip Point Select(2)
2.2 V = 0
3.2V = 1
3.2.3.1
PLLSEL
3F: --5- ----
PLL Interface Select
ASK = 0
FSK = 1
5.2
MTX
3D: ---- --10
Minimum Code Words
Value2
Value
2.0
00
1
01
2
10
4
TSEL
3D: --54 ----
Time-out Select(1)
11
8
Value2
Time(s)
00
0.8
01
3.2
10
12.8
11
25.6
DUAL
3D:-----2--
Dual Encoder Enable
Disable = 0
Enable = 1
RFENO
3D: ----3---
RF Enable Output Select
Disable = 0
Enable = 1
2.0
Note 1: All Timing values vary ±10%.
2: Voltage thresholds are ±150 mV.
3.1
Dual Encoder Operation
The HCS365 contains two transmitter configurations
with separate serial numbers, encoder keys, discrimination values, counters, and seed values. This means
that the HCS365 can be used as two independent
encoders. The code word is calculated using one of two
possible encoder configurations. Most options for code
word and modulation formats can be different from
Encoder 1 and Encoder 2. However, LED and RF
transmitter options have to be the same. The SHIFT
input pin is used to select between the encoder configurations. A low on the SHIFT pin will select Encoder 1
and a high will select Encoder 2.
DS41109D-page 10
Preliminary
2002 Microchip Technology Inc.
HCS365
3.2
Code Word Format
serial number. This will be stored by the receiver system after a transmitter has been learned. The discrimination bits are part of the information that is to form the
encrypted portion of the transmission.
A KEELOQ code word consists of 32 bits of hopping
code data, 32 bits of fixed code data, and between 3 to
5 bits of status information. Various code word formats
are shown in Figure 3-1 and Figure 3-2.
3.2.1
3.2.2
The 32 bits of fixed code consist of 28 bits of the serial
number (SER) and a copy of the 4-bit function code.
This can be changed to contain the whole 32-bit serial
number by setting the Extended Serial Number (XSER)
configuration option to a 1. If more than one button is
pressed, the function codes are logically OR’ed
together. The function code is repeated in the
encrypted and unencrypted data of a transmission.
HOPPING CODE PORTION
The hopping code portion is calculated by encrypting
the counter, discrimination value, and function code
with the Encoder Key (KEY). The hopping code is calculated when a button press is debounced and remains
unchanged until the next button press.
The counter can be either a 16- or 20-bit counter. The
Configuration Option Counter Select (CNTSEL) value
will determine this. The counter select option must be
the same for both Encoder 1 and Encoder 2. If the 16-bit
counter is selected, the discrimination value is 10 bits
long and there are 2 counter overflow bits (OVR0,
OVR1). Set both bits in production and OVR0 will be
cleared on the first counter overflow and OVR1 on the
second.
TABLE 3-4:
If the counter is 20 bits, the discrimination value is 8 bits
long and there are no overflow bits. The rest of the 32
bits are made up of the function code also known as the
button inputs.
FUNCTION CODES
Button
Function Code
S0
xx1x2
S1
x1xx2
S2
1xxx2
S3
xxx12
3.2.3
STATUS INFORMATION
The status bits will always contain the output of the Low
Voltage (VLOW) detector and Cyclic Redundancy
Check (CRC). If Queue (QUEN) is enabled, button
queue information will be included in the code words.
The discrimination value can be programmed with any
value to serve as a post decryption check on the
decoder end. In a typical system, this will be programmed with the 8 or 10 Least Significant bits of the
FIGURE 3-1:
FIXED CODE PORTION
CODE WORD DATA FORMAT (16-BIT COUNTER)
With XSER=0, 16-bit Counter, QUEN=0
CRC
2 Bits
C1
VLOW
1-Bit
C0
Hopping Code Portion (32 Bits)
Fixed Code Portion (32 Bits)
Status Information
(3 Bits)
Counter
BUT Overflow
4 Bits 2 Bits
SERIAL NUMBER
(28 Bits)
BUT
4 Bits
S2 S1 S0 S3
S2 S1 S0 S3
OVR1
DISC
10 Bits
Synchronization
Counter
16 Bits
0
15
OVR0
With XSER=1, 16-bit Counter, QUEN=1
Status Information
(5 Bits)
QUE
2 Bits
CRC
2 Bits
VLOW
1-Bit
Q1 Q0 C1 C0
Hopping Code Portion (32 Bits)
Fixed Code Portion (32 Bits)
Counter
BUT Overflow
4 Bits 2 Bits
SERIAL NUMBER
(32 Bits)
S2
S1
S0 S3
OVR1
DISC
10 Bits
Synchronization
Counter
16 Bits
0
15
OVR0
Transmission Direction LSB First
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 11
HCS365
FIGURE 3-2:
CODE WORD DATA FORMAT (20-BIT COUNTER)
With XSER=0, 20-bit Counter, QUEN=1
QUE
2 Bits
CRC
2 Bits
Q1 Q0 C1 C0
VLOW
1-Bit
Hopping Code Portion (32 Bits)
Fixed Code Portion (32 Bits)
Status Information
(5 Bits)
SERIAL NUMBER
(28 Bits)
BUT
4 Bits
S2 S1 S0
S3
BUT
4 Bits
S2
S1
DISC
8 Bits
Synchronization
Counter
20 Bits
0
19
S0 S3
With XSER=1, 20-bit Counter, QUEN=0
Status Information
(3 Bits)
CRC
2 Bits
VLOW
1-Bit
Hopping Code Portion (32 Bits)
Fixed Code Portion (32 Bits)
SERIAL NUMBER
(32 Bits)
C1 C0
BUT
4 Bits
S2
S1
DISC
8 Bits
Synchronization
Counter
20 Bits
19
0
S0 S3
Transmission Direction LSB First
3.2.3.1
Low Voltage Detector Status (VLOW)
A low battery voltage detector onboard the HCS365
can indicate when the operating voltage drops below a
predetermined value. There are two options available
depending on the Low Voltage Trip Point Select
(VLOWSEL) configuration option. The two options provided are:
• A 2.2V nominal level for 3V operation
• A 3.2V nominal level for 5V operation
The output of the low voltage detector is transmitted in
each code word, so the decoder can give an indication
to the user that the transmitter battery is low. Operation
of the LED changes as well to further indicate that the
battery is low and needs replacing.
The output of the Low Voltage Detector can also be
latched once it has dropped below the selected value.
The Low Voltage Latch (VLOWL) configuration option
enables this option. If this option is enabled, the detector level is raised to 3V or 5V once a low battery voltage
has been detected. The original value is reinstated if
the VDD voltage is raised above this level, indicating
that a new battery has been installed.
The Low Voltage Latch (VLOWL) if enabled works similar to a Schmitt Trigger. This will effectively hold the
VLOW bit high until the battery is replaced. If the Low
Voltage Latch is enabled, then the break after the first
preamble pulse can stretch by 4 ms one time as the
latch changes state.
DS41109D-page 12
Preliminary
2002 Microchip Technology Inc.
HCS365
3.3
Seed Code Word Data Format
A seed transmission transmits a code word that consists of 60 bits of fixed data that is stored in the
EEPROM. This can be used for secure learning of
encoders or whenever a fixed code transmission is
required. The seed code word contains the function
code. The seed code also contains the status information (VLOW, CRC, and QUEUE). The Seed code word
format is shown in Figure 3-3. The function code for
seed code words is always 11112.
Seed code words for Encoder 1 and Encoder 2 can be
configured as follows:
• Enabled with the Seed Button Code (SDBT) configuration option or disabled if SDBT = 00002.
• If the Limited Seed (SDLM) configuration option is
set, seed transmissions will be disabled when the
synchronization counter is bigger than 127. Seed
transmissions remain disabled even if the 16/20bit counter rolls over to 0.
• The delay before the seed transmission is transmitted can be set to 0.0s, 0.8s, 1.6s and 3.2s with
the Seed Time (SDTM) configuration option.
When SDTM is set to a value other than 0.0s, the
HCS365 will transmit a code hopping transmission until the selected time expires. After the
selected time expires, the seed code words are
transmitted. This is useful for the decoder to learn
FIGURE 3-3:
the serial number and the seed from a single button press.
• The button code for transmitting a seed code
word can be selected with the Seed Button
(SDBT) configuration option. SDBT bits 0 to 3 correspond to button inputs S0 to S3. Set the bits
high for the button combination that should trigger
a seed transmission (i.e., If SDBT = 10102 then,
S3+S1 will trigger a seed transmission).
• The seed transmissions before the counter increments past 128 can be modified with the Seed
Mode (SDMD) configuration option. Setting this
bit for Production mode will cause the selected
seed button combination to first transmit a normal
hopping code word for the selected Minimum
Code words (MTX) and then at least MTX seed
code words until all buttons are released. This
mode is disabled after the counter reaches 128
even if the 16/20-bit counter rolls over to 0.
• The limit of 127 for SDLM or SDMD can be
reduced by using an initial counter value >0.
Note:
The synchronization counter only increments on code hopping transmissions.
The counter will not advance on a seed
transmission unless Seed Delay or Production mode options are on.
SEED CODE WORD FORMAT
With QUEN = 1
Open Portion (Not Encrypted)
(9 bits)
QUE
CRC VLOW
(2 Bits) (2 Bits) (1-Bit)
Q1 Q0 C1 C0
1
SEED Code
(60 bits)
SEED
Function
(4 Bits)
1
1
1
Transmission Direction LSB First
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 13
HCS365
4.0
TRANSMITTED WORD
4.1
Transmission Modulation Format
option. The Header time can be set to 4TE or 10TE with
the Header Select (HSEL) configuration option. These
options can all be set individually for Encoder 1 and
Encoder 2.
The HCS365 transmission is made up of several code
words. Each code word contains a preamble, header,
and data. A code word is separated from another code
word by guard time. The Guard Time Select (GSEL)
configuration option can be set to 0 ms, 6.4 ms, 51.2
ms, or 102.4 ms.
There are four different modulation formats available
on the HCS365 that can be set individually for Encoder
1 or Encoder 2. The Modulation Select (MSEL) Configuration Option is used to select between:
•
•
•
•
All other timing specifications for the modulation formats are based on a basic timing element (TE). This
Timing Element can be set to 100 µs, 200 µs, 400 µs or
800 µs with the Baud Rate Select (BSEL) configuration
FIGURE 4-1:
Pulse Width Modulation (PWM)
Manchester (MAN)
Variable Pulse Width Modulation (VPWM)
Pulse Position Modulation (PPM)
PULSE WIDTH MODULATION (PWM)
TE
TE
TE
LOGIC "0"
LOGIC "1"
TBP
1
16
4-10
xTE
Header
31xTE 50% Preamble
FIGURE 4-2:
Encrypted Portion
Fixed Code Portion
Guard
Time
MANCHESTER (MAN)
TE
TE
LOGIC "0"
LOGIC "1"
TBP
START bit
bit 0 bit 1 bit 2
1
2
STOP bit
16
31xTE 50% Preamble
4 xTE
Encrypted Portion
Header
DS41109D-page 14
Preliminary
Fixed Code Portion
Guard
Time
2002 Microchip Technology Inc.
HCS365
FIGURE 4-3:
VARIABLE PULSE WIDTH MODULATION (VPWM)
LOGIC “0”
LOGIC “1”
TE
VPWM BIT ENCODING:
TE
on Transition Low to High
TBP
TBP
2XTE
on Transition High to Low
LOGIC “0”
TE
LOGIC “1”
TE TE
TBP
1
2
31xTE 50% Preamble
FIGURE 4-4:
TBP
2XTE
16
10xTE Header
Encrypted Portion
Guard
Time
Fixed Code Portion
PULSE POSITION MODULATION (PPM)
TE TE TE
LOGIC "0"
LOGIC "1"
TBP
3 X TE
START bit
1
2
16
31xTE 50% Preamble
STOP bit
TBP
10xTE Header
In addition to the Modulation Format, Guard Time, and
Baud Rate, the following options are also available to
change the transmission format:
• If the START/STOP Pulse Enable (STEN) configuration option is enabled, the HCS365 will place a
leading and trailing ‘1’ on each code word. This is
necessary for modulation formats such as
Manchester and PPM to interpret the first and last
data bit.
• A wake-up sequence can be transmitted before
the transmission starts. The wake-up sequence is
configured with the Wake-up (WAKE) configuration option and can be disabled or set to 50 ms,
75 ms, or 100 ms of pulses as indicated in
Figure 4-5.
• The WAKE option is the same for both Encoder 1
and Encoder 2.
Encrypted Portion
FIGURE 4-5:
Fixed Code Portion
Guard
Time
WAKE-UP ENABLE
TE TE
WAKE-UP = 75 ms
TE
2TE
WAKE-UP = 50 ms
TE
5TE
WAKE-UP = 100 ms
TG
WAKE-UP CODE
TG
CODE
Guard Time = 6.4 ms, 51.2 ms, or 102.4 ms
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 15
HCS365
5.0
SPECIAL FEATURES
5.1
Internal RC Oscillator
tion option. When enabled, this pin will be driven high
whenever data is transmitted through the DATA pin. If
the RFEN output is enabled it will not be possible to utilize the dual encoder functionality.
The HCS365 has an onboard RC oscillator that controls all the logic output timing characteristics. The
oscillator frequency varies over temperature and voltage variances, but stays within ±10% of the tuned
value. All the timing values specified in this document
are subject to this oscillator variation.
5.2
RF Enable and PLL Interface
The S3/SHIFT/RFEN pin of the HCS365 can be configured to function as a RF enable output signal. This is
done with the RF Enable Output (RFENO) configura-
FIGURE 5-1:
In addition, the RF Enable and DATA output interfaces
with RF PLL’s. The PLL interface select (PLLSEL) configuration option selects between the ASK and FSK
interfaces. Figure 5-1 shows the startup sequence for
both ASK and FSK interface options. The RFEN signal
will go low at the end of the last code word, including
the guard time.
If RFENO = 1, the RFEN pin will be driven high whenever data is transmitted through the DATA pin.
ASK/FSK INTERFACE
S0
ASK RFEN
CODE WORD
CODE WORD
CODE WORD
CODE WORD
ASK DATA
FSK RFEN
FSK DATA
TPU
5.3
TPLL
TG
LED Output
The LED pin will be driven low while the HCS365 is
transmitting data. The LED On Time (TLEDON) can be
selected between 50 ms and 100 ms with the LED On
Time Select (LEDOS) configuration option. The LED
Off Time (TLEDOFF) is fixed at 500 ms. When the VDD
voltage drops below the selected VLOW trip point, the
LED will not blink unless the LED Blink (LEDBL) option
is set. If LEDBL is set and VDD is low, then the LED will
only flash once. Waveforms of the LED behavior are
shown in Figure 5-2.
TG
resistor will conserve battery power. This is an open
drain output but it does have a weak pull-up capable of
driving a CMOS input.
For circuits with VDD greater than 3 volts, be sure to
limit the LED circuit with a series resistor. The LED output can safely sink up to 25 mA but adding an external
DS41109D-page 16
Preliminary
2002 Microchip Technology Inc.
HCS365
FIGURE 5-2:
LED OPERATION
FIGURE 5-3:
SN
TLEDON
MTX = 012, WAKE > 002
TLEDOFF
LED
VDD > VLOW
SN
QUEN = Disabled
LED
VDD < VLOW
LEDBL=1
DATA
WAKE-UP CODE1
CODE1
WAKE-UP CODE2
CODE2
QUEN = Enabled
LED
VDD < VLOW
LEDBL=0
5.4
CODE WORD COMPLETION
WITH QUEN SETTINGS
DATA
Cyclic Redundancy Check (CRC)
The CRC bits are calculated on the 65 previously transmitted bits. These bits contain the 32-bit hopping code,
32-bit fixed code, and VLOW bit. The decoder can use
the CRC bits to check the data integrity before processing starts. The CRC can detect all single bit errors and
66% of double bit errors. The CRC is computed as follows:
EQUATION 5-1:
6.0
WAKE-UP
CODE1 00
WAKE-UP CODE2 01
CODE2 01
PROGRAMMING
SPECIFICATIONS
Refer to the “HCS365 Programming Specifications”
document (DS41157) in Microchip Literature.
CRC Calculation
CRC [ 1 ] n + 1 = CRC [ 0 ] n ⊕ Di n
and
CRC [ 0 ] n + 1 = ( CRC [ 0 ] n ⊕ Din ) ⊕ CRC [ 1 ] n
with
CRC [ 1, 0 ]0 = 0
and Din the nth transmission bit 0 <= n <= 64
5.5
Button Queue Information
(QUEUE)
The queuing or repeated pressing of the same buttons
can be handled in two ways on the HCS365. This is
controlled with the Queue Counter Enable (QUEN)
configuration option. This option can be different for
Encoder 1 and Encoder 2.
When the QUEN option is disabled, the device will register up to two sequential button presses. In this case,
the device will complete the minimum code words
selected with the MTX option before the second code
word is calculated and transmitted. The code word will
be 67 bits in this case, with no additional queue bits
transmitted.
If the QUEN option is enabled, the queue bits are
added to the standard code word. The queue bits are a
2-bit counter that does not wrap. The counter value
starts at 002 and is incremented if a button is pushed
within 2 seconds from the start of the previous button
press. The current code word is terminated when a button is queued. This allows additional functionality for
double or triple button presses.
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 17
HCS365
7.0
INTEGRATING THE HCS365
INTO A SYSTEM
FIGURE 7-1:
Use of the HCS365 in a system requires a compatible
decoder. This decoder is typically a microcontroller with
compatible firmware. Microchip will provide (via a
license agreement) firmware routines that accept
transmissions from the HCS365 and decrypt the
hopping code portion of the data stream. These
routines provide system designers the means to
develop their own decoding system.
7.1
TYPICAL LEARN
SEQUENCE
Enter Learn
Mode
Wait for Reception
of a Valid Code
Generate Key
from Serial Number
Use Generated Key
to Decrypt
Learning a Transmitter to a
Receiver
A transmitter must first be ’learned’ by a decoder before
its use is allowed in the system. Several learning strategies are possible. Figure 7-1 details a typical learn
sequence. The decoder must minimally store each
learned transmitter’s serial number and current synchronization counter value in EEPROM. Additionally,
the decoder typically stores each transmitter’s unique
crypt key. The maximum number of learned transmitters will therefore be relative to the available EEPROM.
A transmitter’s serial number is transmitted in the 32-bit
fixed code, but the synchronization counter only exists
in the code word’s encrypted portion. The decoder
obtains the counter value by decrypting using the same
key used to encrypt the information. The KEELOQ algorithm is a symmetrical block cipher so the encryption
and decryption keys are identical and referred to generally as the crypt key. The encoder receives its crypt
key during manufacturing. The decoder typically calculates the crypt key by running the encoder serial number or seed through the key generation routine.
Figure 7-1 summarizes a typical learn sequence. The
decoder receives and authenticates a first transmission; first button press. Authentication involves generating the appropriate crypt key, decrypting, validating
the correct key usage via the discrimination bits, and
buffering the counter value. A second transmission is
received and authenticated. A final check verifies the
counter values were sequential; consecutive button
presses. If the learn sequence is successfully completed, the decoder stores the learned transmitter’s
serial number, current synchronization counter value,
and appropriate crypt key. From now on, the crypt key
will be retrieved from EEPROM during normal operation instead of recalculating it for each transmission
received.
Compare Discrimination
Value with Fixed Value
Equal
?
No
Yes
Wait for Reception
of Second Valid Code
Use Generated Key
to Decrypt
Compare Discrimination
Value with Fixed Value
Equal
?
No
Yes
Counters
Sequential
?
Yes
No
Learn successful Store:
Learn
Unsuccessful
Serial number
Encryption key
Synchronization counter
Exit
Certain learning strategies have been patented by 3rd
parties and care must be taken not to infringe.
DS41109D-page 18
Preliminary
2002 Microchip Technology Inc.
HCS365
7.2
Decoder Operation
7.3
Figure 7-2 summarizes normal decoder operation. The
decoder waits until a transmission is received. The
received serial number is compared to the EEPROM
table of learned transmitters to first determine if this
transmitter’s use is allowed in the system. If from a
learned transmitter, the transmission is decrypted
using the stored crypt key and authenticated via the
discrimination bits for appropriate crypt key usage. If
the decryption was valid the synchronization value is
evaluated.
FIGURE 7-2:
TYPICAL DECODER
OPERATION
Start
No
Transmission
Received
?
Yes
No
Is
Decryption
Valid
?
Yes
No
Is
Counter
Within 16
?
Yes
No
No
Is
Counter
Within 32K
?
The KEELOQ technology patent scope includes a
sophisticated synchronization technique that does not
require the calculation and storage of future codes. The
technique securely blocks invalid transmissions while
providing transparent resynchronization to transmitters
inadvertently activated away from the receiver.
Figure 7-3 shows a 3-partition, rotating synchronization
window. The size of each window is optional but the
technique is fundamental. Each time a transmission is
authenticated, the intended function is executed and
the transmission’s synchronization counter value is
stored in EEPROM. From the currently stored counter
value there is an initial "Single Operation" forward window of 16 codes. If the difference between a received
synchronization counter and the last stored counter is
within 16, the intended function will be executed on the
single button press and the new synchronization
counter will be stored. Storing the new synchronization
counter value effectively rotates the entire synchronization window.
A "Double Operation" (resynchronization) window further exists from the “Single Operation” window up to
32K codes forward of the currently stored counter
value. It is referred to as "Double Operation" because a
transmission with synchronization counter value in this
window will require an additional, sequential counter
transmission prior to executing the intended function.
Upon receiving the sequential transmission the
decoder executes the intended function and stores the
synchronization counter value. This resynchronization
occurs transparently to the user as it is human nature
to press the button a second time if the first was unsuccessful.
Does
Serial Number
Match
?
Yes
Decrypt Transmission
No
Execute
Command
and
Update
Counter
The third window is a "Blocked Window" ranging from
the double operation window to the currently stored
synchronization counter value. Any transmission with
synchronization counter value within this window will
be ignored. This window excludes previously used,
perhaps code-grabbed transmissions from accessing
the system.
Note:
Yes
Save Counter
in Temp Location
2002 Microchip Technology Inc.
Synchronization with Decoder
(Evaluating the Counter)
Preliminary
The synchronization method described in
this section is only a typical implementation
and because it is usually implemented in
firmware, it can be altered to fit the needs
of a particular system.
DS41109D-page 19
HCS365
FIGURE 7-3:
SYNCHRONIZATION WINDOW
Entire Window
rotates to eliminate
use of previously
used codes
Blocked
Window
(32K Codes)
Stored
Synchronization
Counter Value
Double Operation
(resynchronization)
Window
(32K Codes)
7.4
Security Considerations
The strength of this security is based on keeping a
secret inside the transmitter that can be verified by
encrypted transmissions to a trained receiver. The
transmitter’s secret is the manufacturer’s key, not the
encryption algorithm. If that key is compromised then a
smart transceiver can capture any serial number, create a valid code word, and trick all receivers trained
with that serial number. The key cannot be read from
the EEPROM without costly die probing but it can be
calculated by brute force decryption attacks on transmitted code words. The cost for these attacks should
exceed what you would want to protect.
Single Operation
Window
(16 Codes)
receiver more secure it could increment the counter on
questionable code word receptions. To make the transmitter more secure, it could use separate buttons for
lock and unlock functions. Another way would be to
require two different buttons in sequence to gain
access.
There are more ways to make KEELOQ systems more
secure, but they all have trade-offs. You need to find a
balance between security, design effort, and usability,
particularly in failure modes. For example, if a button
sticks or kids play with it, the counter should not end up
in the blocked code window rendering the transmitter
useless or requiring retraining.
To protect the security of other receivers with the same
manufacturer’s code, you need to use the random seed
for secure learn. It is a second secret that is unique for
each transmitter. Its transmission on a special button
press combination can be disabled if the receiver has
another way to find it, or limited to the first 127 transmissions for the receiver to learn it. This way, it is very
unlikely to ever be captured. Now if a manufacturer’s
key is compromised, clone transmitters can be created,
but without the unique seed they have to be relearned
by the receiver. In the same way, if the transmissions
are decrypted by brute force on a computer, the random seed hides the manufacturer’s key and prevents
more than one transmitter from being compromised.
The length of the code word at these baud rates makes
brute force attacks that guess the hopping code take
years. To make the receiver less susceptible to this
attack, make sure that you test all the bits in the
decrypted code for the correct value. Do not just test
low counter bits for sync and the bit for the button input
of interest.
The main benefit of hopping codes is to prevent the
retransmission of captured code words. This works
very well for code words that the receiver decodes. Its
weakness is if a code is captured when the receiver
misses it, the code may trick the receiver once if it is
used before the next valid transmission. To make the
DS41109D-page 20
Preliminary
2002 Microchip Technology Inc.
HCS365
8.0
DEVELOPMENT SUPPORT
8.3
The KEELOQ® family of devices are supported with a
full range of hardware and software development tools:
• Integrated Development Environment
- MPLAB® IDE Software
- KEELOQ Toolkit Software
• Device Programmers
- PRO MATE® II Universal Device Programmer
• Low Cost Demonstration Boards
- KEELOQ Evaluation Kit II
- KEELOQ Transponder Evaluation Kit
8.1
The PRO MATE II universal device programmer is a
full-featured programmer, capable of operating in
stand-alone mode, as well as PC-hosted mode. The
PRO MATE II device programmer is CE compliant.
The PRO MATE II device programmer has programmable VDD and VPP supplies, which allow it to verify programmed memory at VDD min and VDD max for
maximum reliability. It has an LCD display for instructions and error messages, keys to enter commands
and a modular detachable socket assembly to support
various package types.
MPLAB Integrated Development
Environment Software
The same MPLAB IDE software available at
www.microchip.com that is used for microcontroller
software development also supports the KEELOQ family
of devices. With this Windows®-based application you
can configure the device options in a graphical environment. The manufacturer’s code is protected by two
custodian keys so that the secret is split and neither
employee can reveal the code alone. Once both custodian keys have been entered and the options selected,
MPLAB IDE software is ready to produce parts in one
of two ways.
• The PRO MATE II Programmer, which is sold separately, can program individual parts. MPLAB IDE
software can automatically increment the serial
number and recalculate the unique encryption
key, discrimination value and seed for each part.
• Creating an SQTPsm file that contains all the individual device configurations to submit to Microchip for a production run without revealing your
manufacturer’s code. Please contact Microchip
sales office etc., minimum order quantities apply.
8.2
PRO MATE II Universal Device
Programmer
Microchip has various socket adapter modules available for PDIP, SOIC and SSOP devices. An In-Circuit
Serial Programming™ (ICSP™) module is also available for programming devices after circuit assembly.
8.4
KEELOQ Evaluation Kit II
The KEELOQ Evaluation Kit II contains all the necessary
hardware to evaluate a code hopping system, including
two transmitters and a multi-function receiver board
that supports all HCS5XX stand-alone decoders. Additionally, it allows the users to develop their own software to receive, decode and interpret the KEELOQ
transmission. The included PC software can configure
and program the KEELOQ parts for evaluation
(DM303006).
8.5
KEELOQ Transponder Evaluation
Kit
The KEELOQ Transponder Evaluation Kit consists of a
base station, a transmitter/transponder, a battery-less
transponder and various HCS4XX samples. It also
includes the PC software to configure and program the
KEELOQ parts for evaluation (DM303005).
KEELOQ® Toolkit Software
The KEELOQ® Secure Solution CD-ROM is available
free and can be ordered with part number DS40038.
After accepting the KEELOQ license agreement, it will
let you install application notes with complete decoder
algorithms as well as the KEELOQ toolkit. The toolkit is
a handy application that generates encryption keys
from the manufacturer’s code and serial number or
seed. It can also decrypt KEELOQ transmitter’s hopping
code to help debug and test your decoder software.
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 21
DS41109D-page 22
9
9
9
9
9
PIC17C7XX
9 9
9
9
9
9
PIC17C4X
9 9
9
9
9
9
PIC16C9XX
9
9
9
9
9
PIC16F8XX
9
9
9
9
9
PIC16C8X
9
9
9
9
9
PIC16C7XX
9
9
9
9
9
PIC16C7X
9
9
9
9
9
PIC16F62X
9
9
PIC16CXXX
9
9
9
PIC16C6X
9
9
9
PIC16C5X
9
9
PIC14000
9
PIC12CXXX
rfPIC12XXXX
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
Preliminary
MCP2510
9
9
9 9
9
9
9
9
9
9 9
9
9
9
9
9
Software Tools
* Contact the Microchip Technology Inc. web site at www.microchip.com for information on how to use the MPLAB® ICD In-Circuit Debugger (DV164001) with PIC16C62, 63, 64, 65,
72, 73, 74, 76, 77.
** Contact Microchip Technology Inc. for availability date.
† Development tool is available on select devices.
MCP2510 CAN Developer’s Kit
MCRFXXX
9 9 9
13.56 MHz Anticollision
microIDTM Developer’s Kit
125 kHz Anticollision microIDTM
Developer’s Kit
125 kHz microIDTM Developer’s Kit
9
microIDTM Programmer’s Kit
9
KEELOQ® Transponder Kit
9
KEELOQ® Evaluation Kit II
9
PICDEMTM 17 Demonstration Board
9
PICDEMTM 14A Demonstration Board
9 9
PICDEMTM 3 Demonstration Board
PIC18CXX2
9
9
†
9
†
9
†
9
PICDEMTM 2 Plus Demonstration
Board
24CXX/
25CXX/
93CXX
9
PICDEMTM 1 Demonstration Board
9
**
9 9
**
PIC18FXXX
9
MPLAB® ICD In-Circuit Debugger
MPLAB® ICE In-Circuit Emulator
9
PRO MATE® II
Universal Device Programmer
9
**
9
PICSTART® Plus Entry Level
Development Programmer
MPASMTM Assembler/
MPLINKTM Object Linker
MPLAB® C18 C Compiler
MPLAB® C17 C Compiler
HCSXXX
rfHCSXXX
9
Programmers Debugger Emulators
TABLE 8-1:
Demo Boards and Eval Kits
MPLAB® Integrated
Development Environment
HCS365
DEVELOPMENT TOOLS FROM MICROCHIP
2002 Microchip Technology Inc.
HCS365
9.0
ELECTRICAL CHARACTERISTICS
9.1
Maximum Ratings*
Ambient temperature under bias.............................................................................................................-40°C to +125°C
Storage temperature .............................................................................................................................. -65°C to +150°C
Voltage on VDD w/respect to VSS ................................................................................................................ -0.3 to +7.5V
Voltage on LED w/respect to VSS ..................................................................................................................-0.3 to +11V
Voltage on all other pins w/respect to VSS ........................................................................................-0.3V to VDD + 0.3V
Total power dissipation (Note 1) ..........................................................................................................................500 mW
Maximum current out of VSS pin ...........................................................................................................................100 mA
Maximum current into VDD pin ..............................................................................................................................100 mA
Input clamp current, IIK (VI < 0 or VI > VDD) ......................................................................................................... ± 20 mA
Output clamp current, IOK (Vo < 0 or Vo >VDD).................................................................................................... ± 20 mA
Maximum output current sunk by any Output pin....................................................................................................25 mA
Maximum output current sourced by any Output pin ..............................................................................................25 mA
*Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
Note 1: Power dissipation is calculated as follows: Pdis=VDD x {IDD - Â IOH} + Â {(VDD-VOH) x IOH} + Â(VOl x IOL).
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 23
HCS365
TABLE 9-1:
DC CHARACTERISTICS: HCS365
DC Characteristics
All Pins Except
Power Supply Pins
Param
No.
Sym.
Standard Operating Conditions (unless otherwise stated)
Operating Temperature 0°C ≤ TA ≤ +70°C (Commercial)
-40°C ≤ TA ≤ +85°C (Industrial)
Characteristic
Min.
Typ.†
Max.
Units
2.05(4)
—
5.5
V
—
VSS
—
V
0.05*
—
—
V/ms
Conditions
D001
VDD
Supply Voltage
D003
VPOR
VDD start voltage to ensure
internal Power-on Reset
signal
D004
SVDD
VDD rise rate to ensure
internal Power-on Reset
signal
D005
VBOR
Brown-out Reset Voltage
—
1.9
2
V
D010
IDD
Supply Current(2)
—
1.0
5
mA
FOSC = 4 MHz,
VDD = 5.5V(3)
2.0
mA
FOSC = 4 MHz,
VDD = 3.5V(3)
D010B
D021A IPD
Cold RESET
—
0.1
1.0
µA
VDD = 5.5V
With TTL Buffer
VSS
—
0.8
V
4.5V ≤ VDD ≤ 5.5V
VSS
—
0.15 VDD
V
Otherwise
With Schmitt Trigger Buffer
VSS
—
0.2 VDD
V
Shutdown Current
Input Low Voltage
VIL
D030
Input pins
D030A
D031
Input High Voltage
VIH
Input pins
—
4.5V ≤ VDD ≤ 5.5V
Otherwise
D040
D040A
With TTL Buffer
2.0
(0.25 VDD
+0.8)
—
—
VDD
VDD
V
V
D041
With Schmitt Trigger Buffer
0.8 VDD
—
VDD
V
—
—
—
—
+200
+350
mV
mV
setting 5 = 2.25V
setting 25 = 4.25V
—
—
±1
µA
VSS ≤ VPIN ≤ VDD, Pin at Hiimpedance, no pull-downs
enabled
Input Threshold Voltage
D053
Vtol
Vlow detect tolerance
Input Leakage Current
D060
IIL
DS41109D-page 24
Input pins
Preliminary
2002 Microchip Technology Inc.
HCS365
TABLE 9-1:
DC CHARACTERISTICS: HCS365 (CONTINUED)
DC Characteristics
All Pins Except
Power Supply Pins
Param
No.
Sym.
Standard Operating Conditions (unless otherwise stated)
Operating Temperature 0°C ≤ TA ≤ +70°C (Commercial)
-40°C ≤ TA ≤ +85°C (Industrial)
Characteristic
Min.
Typ.†
Max.
Units
—
—
0.6
V
Conditions
Output Low Voltage
D080
VOL
Output pins
IOL = 8.5 mA, VDD = 4.5V
Output High Voltage
D090
VOH
Output pins
D091
VOH
LED
VDD-0.7
—
—
V
IOH = -3.0 mA, VDD = 4.5V
1.5
—
—
V
IOH = -0.5 mA, VDD = 4.5V
40
75
100
Endurance
200K
1000K
—
2.05
—
5.5
V
—
4
10
ms
Internal Pull-down Resistance
D100
Rpd
S0 - S3
KOhms If enabled
Data EEPROM Memory
D120
ED
D121
Vdrw
VDD for Read/Write
D122
Tdew
Erase/Write Cycle Time(1)
E/W
25°C at 5V
Note 1: * These parameters are characterized but not tested.
2: † "Typ" column data is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
3:
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading
and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current
consumption.
4:
Should operate down to VBOR but not tested below 2.0V.
The test conditions for all IDD measurements in active Operation mode are: all I/O pins tristated, pulled to VDD. MCLR = VDD; WDT
enabled/disabled as specified. The power-down/shutdown current in SLEEP mode does not depend on the oscillator frequency. Powerdown current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS. The ∆ current is
the additional current consumed when the WDT is enabled. This current should be added to the base IDD or IPD measurement.
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 25
HCS365
TABLE 9-2:
AC CHARACTERISTICS(1)
Commercial (C): TAMB = 0°C to +70°C
Industrial (I):
TAMB = -40°C to +85°C
2.05V < VDD < 5.5
Parameter
Sym.
Min.
Typ.
Max.
Timing Element
TE
90
—
880
µs
Power-up Time
TPU
—
25
—
ms
PLL Set-up Time
TPLL
10
—
15
—
30
285
ms
ms
WAIT = 0
WAIT = 1
LED On Time
TLEDON
45
—
110
ms
LEDOS = 0 (min) or
LEDOS = 1 (max)
LED Off Time
TLEDOFF
450
500
550
ms
TG
1.8
5.6
46.1
96.1
2TE
6.4
51.2
102.4
112.6
7.0
56.3
42.6
ms
ms
ms
ms
Guard Time
Unit Conditions
BSEL = 002 (min) or
BSEL = 012
BSEL = 102
BSEL = 112 (max)
GSEL = 002(min)
GSEL = 012
GSEL = 102
GSEL = 112(max)
Note 1: All timing values are subject to the oscillator variance and are not tested.
These parameters are characterized, but not tested.
DS41109D-page 26
Preliminary
2002 Microchip Technology Inc.
HCS365
10.0
PACKAGING INFORMATION
Package Type:
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
c
§
B1
B
eB
α
β
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 27
HCS365
Package Type:
8-Lead Plastic Small Outline (SM) – Medium, 208 mil (SOIC)
E
E1
p
D
2
n
1
B
α
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
A
A2
A1
E
E1
D
L
φ
c
B
α
β
MIN
.070
.069
.002
.300
.201
.202
.020
0
.008
.014
0
0
INCHES*
NOM
8
.050
.075
.074
.005
.313
.208
.205
.025
4
.009
.017
12
12
A1
MAX
.080
.078
.010
.325
.212
.210
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.78
1.97
1.75
1.88
0.05
0.13
7.62
7.95
5.11
5.28
5.13
5.21
0.51
0.64
0
4
0.20
0.23
0.36
0.43
0
12
0
12
MIN
MAX
2.03
1.98
0.25
8.26
5.38
5.33
0.76
8
0.25
0.51
15
15
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
Drawing No. C04-056
DS41109D-page 28
Preliminary
2002 Microchip Technology Inc.
HCS365
10.1
Package Marking Information
8-Lead PDIP (300 mil)
Example
XXXXXXXX
XXXXXNNN
YYWW
HCS365
XXX/NNN
9925
Example
8-Lead SOIC (208 mil)
XXXXXXXX
XXXXXXXX
YYWWNNN
Legend: MM...M
XX...X
YY
WW
NNN
Note:
*
HCS365
XXXXXXXX
9925NNN
Microchip part number information
Customer specific information*
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard marking consists of Microchip part number, year code, week code and traceability code. For
marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For
SQTP devices, any special marking adders are included in SQTP price.
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 29
HCS365
ON-LINE SUPPORT
Systems Information and Upgrade Hot Line
Microchip provides on-line support on the Microchip
World Wide Web (WWW) site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape® or Microsoft®
Explorer. Files are also available for FTP download
from our FTP site.
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive any currently available upgrade kits. The
Hot Line Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
Connecting to the Microchip Internet Web Site
The Microchip web site is available by using your
favorite Internet browser to attach to:
www.microchip.com
The file transfer site is available by using an FTP service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User’s Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
DS41109D-page 30
Preliminary
2002 Microchip Technology Inc.
HCS365
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-7578.
Please list the following information, and use this outline to provide us with your comments about this Data Sheet.
To:
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RE:
Reader Response
Total Pages Sent
From: Name
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Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
Literature Number: DS41109D
Device: HCS365
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this data sheet easy to follow? If not, why?
4. What additions to the data sheet do you think would enhance the structure and subject?
5. What deletions from the data sheet could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
8. How would you improve our software, systems, and silicon products?
2002 Microchip Technology Inc.
Preliminary
DS41109D-page 31
HCS365
11.0
HCS365 PRODUCT IDENTIFICATION SYSTEM
.To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
Temperature
Range
/XX
XXX
Package
Pattern
Device
HCS365: Code Hopping Encoder
HCS365T: Code Hopping Encoder (Tape and Reel - SM
only)
Temperature Range
I
Package
P
SM
=
=
0×C to +70×C
-40×C to +85×C
=
=
Plastice DIP (300 mil body), 8-lead
Plastic SOIC (208 mil body), 8-lead
Pattern
* JW Devices are UV erasable and can be programmed to any device configuration. JW Devices meet the electrical requirement of
each oscillator type.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
DS41109D-page 32
Preliminary
2002 Microchip Technology Inc.
Microchip’s Secure Data Products are covered by some or all of the following patents:
Code hopping encoder patents issued in Europe, U.S.A., and R.S.A. — U.S.A.: 5,517,187; Europe: 0459781; R.S.A.: ZA93/4726
Secure learning patents issued in the U.S.A. and R.S.A. — U.S.A.: 5,686,904; R.S.A.: 95/5429
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.
2002 Microchip Technology Inc.
Preliminary
DS41109D - page 33
WORLDWIDE SALES AND SERVICE
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ASIA/PACIFIC
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03/01/02
DS41109D-page 34
Preliminary
2002 Microchip Technology Inc.