MK5814 Low EMI Clock Generator Description Features The MK5814 device generates a low EMI output clock from a clock or crystal input. The device is designed to dither a high emissions clock to lower EMI in consumer applications. Using ICS’ proprietary mix of analog and digital Phase Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output and reduces the frequency amplitude peaks by several dB. The MK5814 offers both centered and down spread from a high-speed clock input. The multiplier is a fixed 4x. • • • • Packaged in 8-pin SOIC • • • • • Input frequency range of 4 to 32 MHz • • • • Low EMI feature can be disabled For different multiplier configurations, use the MK5811 (1x) or MK5812 (2x). ICS offers many other clocks for computers and computer peripherals. Consult ICS when you need to remove crystals and oscillators from your board. Provides a spread spectrum output clock Supports flat panel controllers Accepts a clock or crystal input (provides same frequency dithered output) Output frequency range of 16 to 128 MHz 4X frequency multiplication Center and down spread Peak reduction by 8 dB to 16 dB typical on 3rd through 19th odd harmonics Includes power down Operating voltage of 3.3 V Advanced, low-power CMOS process Block Diagram VDD S1:0 2 Spread Direction PLL Clock Synthesis and Spread Spectrum Circuitry FRSEL X1/CLK SSCLK Clock Buffer/ Crystal Ocsillator X2 The crystal requires external capacitors for accurate tuning of the clock 1 MDS 5814 A Integrated Circuit Systems, Inc. GND z 525 Race Street, San Jose, CA 95126 Revision 020204 z tel (408) 297-1201 z www.icst.com MK5814 Low EMI Clock Generator Pin Assignment X1/ICLK Spread Direction and Spread Percentage 1 8 X2 GND 2 7 VDD S1 3 6 FRSEL S0 4 5 SSCLK 8-pin (150 mil) SOIC S1 Pin 3 S0 Pin 4 Spread Direction Spread Percentage 0 0 0 M M M 1 1 1 0 M 1 0 M 1 0 M 1 Center Center Center Center No Spread Down Down Down Down ±1.4 ±1.1 ±0.6 ±0.5 -1.6 -2.0 -0.7 -3.0 0 = connect to GND M = unconnected (floating) 1 = connect directly to VDD Frequency Selection Product FRSEL (pin 6) Input Freq. Range Multiplier Output Freq. Range MK58111 0 4.0 to 8.0 MHz X1 4.0 to 8.0 MHz 1 8.0 to 16.0MHz X1 8.0 to 16.0MHz M 16.0 to 32.0MHz X1 16.0 to 32.0MHz 0 4.0 to 8.0 MHz X2 8.0 to 16.0MHz 1 8.0 to 16.0MHz X2 16.0 to 32.0MHz M 16.0 to 32.0MHz X2 32.0 to 64.0MHz 0 4.0 to 8.0 MHz X4 16.0 to 32.0MHz 1 8.0 to 16.0MHz X4 32.0 to 64.0MHz M 16.0 to 32.0MHz X4 64.0 to 128MHz MK58121 MK5814 0 = connect to GND M = unconnected (floating) 1 = connect directly to VDD Note 1: The information in this datasheet does not apply to the MK5811 and MK5812 as each have independent datasheets available at www.icst.com. 2 MDS 5814 A Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 Revision 020204 z tel (408) 297-1201 z www.icst.com MK5814 Low EMI Clock Generator Pin Descriptions Pin Number Pin Name Pin Type Pin Description 1 X1/ICLK Input Connect to 4-32 MHz crystal or clock. 2 GND Power Connect to ground. 3 S1 Input Function select 1 input. Selects spread amount and direction per table above. (default-internal mid-level). 4 S0 Input Function select 0 input. Selects spread amount and direction per table above. (default-internal mid-level). 5 SSCLK Output 6 FRSEL Input Function select for input frequency range. Default to mid-level “M”. 7 VDD Power Connect to +3.3 V. 8 X2 XO Clock output with Spread spectrum Crystal connection to 4-32 MHz crystal. Leave unconnected for clock External Components PCB Layout Recommendations The MK5814 requires a minimum number of external components for proper operation. Decoupling Capacitor A decoupling capacitor of 0.01µF must be connected between VDD and GND on pins 7 and 2. Connect the capacitor as close to these pins as possible. For optimum device performance, mount the decoupling capacitor on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Series Termination Resistor Use series termination when the PCB trace between the clock output and the load is over 1 inch. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line. Place the resistor as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω. Tri-level Select Pin Operation The S1 and S0 select pins are tri-level, meaning that they have three separate states to make the selections shown in the table on page 2. To select the M (mid) level, the connection to these pins must be eliminated by either floating them originally, or tri-stating the GPIO pins which drive the select pins. 1) Mount the 0.01µF decoupling capacitor on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to the VDD pin and the PCB trace to the ground via should be kept as short as possible. 2) To minimize EMI, place the 33Ω series-termination resistor (if needed) close to the clock output. 3) An optimum layout is one with all components on the same side of the board, thus minimizing vias through other signal layers. Other signal traces should be routed away from the MK5814 device. This includes signal traces located underneath the device, or on layers adjacent to the ground plane layer used by the device. Crystal Information The crystal used should be a fundamental mode (do not use third overtone), parallel resonant crystal. To optimize the initial accuracy, connect crystal capacitors from pins X1 to ground and X2 to ground. The value of these capacitors is given by the following equation: Crystal caps (pF) = (CL - 6) x 2 3 MDS 5814 A Integrated Circuit Systems, Inc. For optimum device performance and lowest output phase noise, observe the following guidelines: z 525 Race Street, San Jose, CA 95126 Revision 020204 z tel (408) 297-1201 z www.icst.com MK5814 Low EMI Clock Generator In the equation, CL is the crystal load capacitance. For example, a crystal with a 16 pF load capacitance uses two 20 pF [(16-6) x 2] capacitors. Modulation Rate The MK5814 is a low EMI clock generator using a optimized frequency slew rate algorithm to facilitate down stream tracking of zero delay buffers and other PLL devices. Frequency Spread Spectrum Profile Time Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK5814. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device, at these or any other conditions, above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +85°C Storage Temperature -65 to +150°C Junction Temperature 125°C Soldering Temperature 260°C Recommended Operation Conditions Parameter Min. Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Max. Units 0 +85 °C +3.0 3.63 V 4 MDS 5814 A Integrated Circuit Systems, Inc. Typ. z 525 Race Street, San Jose, CA 95126 Revision 020204 z tel (408) 297-1201 z www.icst.com MK5814 Low EMI Clock Generator DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +85°C Parameter Symbol Operating Voltage VDD Supply Current IDD Input High Voltage Conditions Min. Typ. Max. Units 3.0 3.3 3.63 V 23 25 mA No load, at 3.3 V, Fin=24 MHz 30 mA No load, at 3.3 V, Fin=32 MHz 35 mA No load, at 3.3 V, Fin=12 MHz VIH 0.85VDD VDD VDD V VIHM 0.4VDD 0.5VDD 0.6VDD V Input Low Voltage VIL 0.0 0.0 0.15VDD V Output High Voltage VOH CMOS, IOH = -4 mA 2.4 V Output High Voltage VOH IOH = -6 mA 2.0 V Output Low Voltage VOL IOL = -4 mA 0.4 V IOL = -10 mA 1.2 V Input Middle Voltage Input Capacitance CIN1 S0, S1, FRSEL pins 4 6 pF CIN2 X1, X2 pins 6 9 pF AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V ±10%, Ambient Temperature 0 to +85° C, CL = 15 pF Parameter Symbol Conditions Min. Typ. Max. Units Input Clock Frequency 4 32 MHz Output Clock Frequency 16 128 MHz 60 % 50 55 % Input Clock Duty Cycle Time above VDD/2 40 Output Clock Duty Cycle Time above 1.5 V 45 Cycle-to-cycle Jitter1 Fin=16 MHz, Fout=32 MHz 250 380 ps Cycle-to-cycle Jitter1 Fin=32 MHz, Fout=128 MHz 250 380 ps Output Rise Time Output Fall Time tR FSEL=M, 0.4 to 2.4 V 0.8 2.2 ns tR FSEL=1,0; 0.4 to 2.4 V 2.0 5.0 ns tF FSEL=M, 0.4 to 2.4 V 0.8 2.2 ns tF FSEL=1,0; 0.4 to 2.4 V 2.0 4.4 ns EMI Peak Frequency Reduction 8 to 16 dB Note 1: Spread is enabled. 5 MDS 5814 A Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 Revision 020204 z tel (408) 297-1201 z www.icst.com MK5814 Low EMI Clock Generator Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 8 Symbol E Min A A1 B C D E e H h L α H INDEX AREA 1 2 D A Inches Max Min 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) C Thermal Characteristics for 8-pin SOIC Parameter Symbol Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Min. Typ. Max. Units θJA Still air 150 °C/W θJA 1 m/s air flow 140 °C/W θJA 3 m/s air flow 120 °C/W 40 °C/W θJC 6 MDS 5814 A Integrated Circuit Systems, Inc. Conditions z 525 Race Street, San Jose, CA 95126 Revision 020204 z tel (408) 297-1201 z www.icst.com MK5814 Low EMI Clock Generator Ordering Information Part / Order Number Marking Shipping packaging Package Temperature MK5814S MK5814STR MK5814SLF MK5814SLFTR 5814S 5814S 5814SL 5814SL Tubes Tape and Reel Tubes Tape and Reel 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 0 to +85° C 0 to +85° C 0 to +85° C 0 to +85° C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc. (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 7 MDS 5814 A Integrated Circuit Systems, Inc. z 525 Race Street, San Jose, CA 95126 Revision 020204 z tel (408) 297-1201 z www.icst.com