INTEGRAL IN74HC123

IN74HC123
DUAL RETRIGGERABLE MONOSTABLE
MULTIVIBRATOR
•
•
•
•
The IN74HC123 is identical in pinout to the LS/ALS123. The
device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
There are two trigger inputs, A INPUT (negative edge) and
B INPUT (positive edge). These inputs are valid for rising/falling
signals.
The device may also be triggered by using the CLR input
(positive-edge) because of the Schmitt-trigger input; after triggering
the output maintains the MONOSTABLE state for the time period
determined by the external resistor RX and capacitor CX. Taking
CRL low breaks this MONOSTABLE STATE. If the next trigger
pulse occurs during the MONOSTABLE period it makes the
MONOSTABLE period longer.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 3.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
LOGIC DIAGRAM
ORDERING INFORMATION
IN74HC123N Plastic
IN74HC123D SOIC
TA = -55° to 125° C for all
packages
PIN ASSIGNMENT
PIN 16 =VCC
PIN 8 = GND
FUNCTION TABLE
Inputs
Outputs
Note
A
B CRL
Q
Q
H
H
Output
Enable
X
L
H
L* H*
Inhibit
*
*
H
X
H
L
H
Inhibit
L
H
Output
Enable
L
H
Output
Enable
X
X
L
L
H
Inhibit
X = don’t care
*
- except for monostable period
Note
(1) CX, RX, DX are external components.
(2) DX is a clamping diode.
The external capacitor is charged to VCC in the
stand-by state, i.e. no trigger. When the supply
voltage is turned off CX is discharged mainly
through an internal parasitic diode. If CX is
sufficiently large and VCC decreases rapidy, there
will be some possibility of damaging the I.C. with
a surge current or latch-up. If the voltage supply
filter capacitor is large enough and VCC decrease
slowly, the surge current is automatically limited
and damage the I.C. is avoided. The maximum
forward current of the parasitic diode is
approximately 20 mA.
1
IN74HC123
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
-1.5 to VCC +1.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
A, B, CLR
mA
±20
CX, RX
±30
IOUT
DC Output Current, per Pin
mA
±25
ICC
DC Supply Current, VCC and GND Pins
mA
±50
PD
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
Tstg
Storage Temperature
-65 to +150
°C
260
TL
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
DC Supply Voltage (Referenced to GND)
VIN, VOUT DC Input Voltage, Output Voltage (Referenced to
GND)
TA
Operating Temperature, All Package Types
t r, tf
Input Rise and Fall Time
CRL VCC =2.0 V
VCC =4.5 V
(Figure 2)
VCC =6.0 V
A or B
Min
3.0 **
0
Max
6.0
VCC
Unit
V
V
+125
°C
ns
1000
500
400
No
Limit
RX
External Timing Resistor
VCC <4.5 V
10
1000
kΩ
2.0
1000
VCC ≥ 4.5 V
CX
External Timing Capacitor
0
No
µF
Limit
**
The In74HC123 will function at 2.0 V but for optimum pulse width stability, VCC should be above
3.0 V.
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and
VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
VCC). Unused outputs must be left open.
2
-55
0
0
0
-
IN74HC123
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
Guaranteed Limit
VCC
Symbol
Parameter
Test Conditions
V
≤85
≤125
25 °C
to
°C
°C
-55°C
1.5
1.5
1.5
2.0
VIH
Minimum High- VOUT=0.1 V or VCC-0.1
3.15
3.15
3.15
4.5
Level Input
V
4.2
4.2
4.2
6.0
Voltage
IOUT≤ 20 µA
0.5
0.5
0.5
2.0
VIL
Maximum Low - VOUT=0.1 V or VCC-0.1
1.35
1.35
1.35
4.5
Level Input
V
1.8
1.8
1.8
6.0
Voltage
IOUT ≤ 20 µA
1.9
1.9
1.9
2.0
VOH
Minimum High- VIN=VIH or VIL
4.4
4.4
4.4
4.5
Level Output
IOUT ≤ 20 µA
5.9
5.9
5.9
6.0
Voltage
VIN=VIH or VIL
3.7
3.84
3.98
4.5
IOUT ≤ 4.0 mA
5.2
5.34
5.48
6.0
IOUT ≤ 5.2 mA
0.1
0.1
VIN=VIH or VIL
0.1
VOL
Maximum
2.0
0.1
0.1
0.1
Low-Level
4.5
IOUT ≤ 20 µA
0.1
0.1
0.1
Output Voltage
6.0
VIN=VIH or VIL
0.4
0.33
0.26
4.5
IOUT ≤ 4.0 mA
0.4
0.33
0.26
6.0
IOUT ≤ 5.2 mA
VIN=VCC or GND
IIN
Maximum
6.0
±0.1
±1.0
±1.0
Input Leakage
Current (A, B,
CRL )
IIN
Maximum
6.0
VIN=VCC or GND
±50
±500
±500
Input Leakage
Current (RX,
CX)
VIN=VCC or GND
6.0
130
220
350
ICC
Maximum
Quiescent
Q1 and Q2 = Low
Supply Current IOUT=0µA
(per Package)
Standby State
25°C
-45°C to -55°C
to
85°C
125°C
VIN=VCC or GND
6.0
400
600
800
ICC
Maximum
Supply Current Q1 and Q2 = High
(per Package) IOUT=0µA
Active State
Pins 15 and 7 = 0.5
VCC
3
Unit
V
V
V
V
µA
nA
µA
µA
IN74HC123
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)
Guaranteed Limit
VCC
Symbol
Parameter
V
≤85
≤125
25 °C
to
°C
°C
-55°C
385
320
255
tPLH,
Maximum Propagation Delay, Input A or 2.0
75
65
50
tPHL
4.5
B to Q or Q (Figures 1 and 3)
65
55
45
6.0
325
270
215
tPLH,
2.0
Maximum Propagation Delay , CRL to Q
65
55
45
tPHL
4.5
or Q (Figures 2 and 3)
55
45
35
6.0
110
95
75
tTLH, tTHL Maximum Output Transition Time, Any 2.0
22
20
16
Output(Figures 2 and 3)
4.5
20
17
14
6.0
CIN
Maximum
Input A , B, CRL
10
10
10
Capacitance
25
25
25
CX, RX
CPD
Power
Dissipation
Capacitance
(Per Multivibrator)
Used to determine the no-load dynamic
power consumption:
PD=CPDVCC2f+ICCVCC
ns
ns
ns
pF
Typical @25°C,VCC=5.0 V
150
TIMING REQUIREMENTS(CL=50pF,Input tr=tf=6.0 ns)
Guaranteed Limit
VCC
Symbol
Parameter
V
25 °C to
≤85°C
-55°C
0
0
trec
Minimum
Recovery 2.0
0
0
4.5
Time, Inactive to A or
0
0
6.0
B
(Figure 2)
125
100
tw
Minimum Pulse Width, 2.0
25
20
4.5
Input A or B (Figure
20
17
6.0
1)
125
100
tw
Minimum Pulse Width, 2.0
25
20
4.5
CRL (Figure 2)
20
17
6.0
1000
1000
tr, tr
Maximum Input Rise 2.0
500
500
4.5
and Fall Times, CRL
400
400
6.0
(Figure 2)
A or B (Figure 2)
2.0
No Limit
4.5
6.0
4
Unit
pF
≤125°C
Unit
0
0
0
ns
150
30
25
150
30
25
1000
500
400
ns
ns
ns
IN74HC123
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Test Circuit
5
IN74HC123
TIMING DIAGRAM
EXPANDED LOGIC DIAGRAM
6