IZ0066 DOT MATRIX LCD CONTROLLER & DRIVER FEATURES FUNCTION • Internal Memory • Character type dot matrix LCD driver & controller - Character Generator ROM: 8320 bits • Internal driver: 16 common and 40 segment signal output - Character Generator RAM: 512 bit • Display character format: 5 x 7 dots + cursor, - Display Data RAM: 80 x 8 bits for 80 digits 5 x 10 dots + cursor • Internal automatic reset circuit at power ON • Easy interface with a 4-bit or 8-bit MPU • Internal oscillation circuit • Display character pattern: • Power Supply Voltage: +5V ± 10% 5 x 7 dots format: 192 kinds, 5 x 10 dots format: 32 kinds • LCD Driving Voltage for display: 0 ~ -5V(V5) • The special character pattern can be programmable by • Duty factor selection (selected by programs) Character Generator RAM directly • A customer character pattern can be programmable by mask 1/8 duty: 5 x 7 dots format 1 line, 1/11 duty: 5 x 10 dots format 1 line option • Wide range of instruction function: 1/16 duty: 5 x 7 dots format 2 line • Bare chip available Display clear, Cursor home, Display ON/OFF, Display shift • Pin-to-Pin replacement for KS0066, HD44780, SED1278 Cursor ON/OFF, Display character blink, Cursor shift DESCRIPTION The IZ0066 is a dot matrix liquid crystal display controller & driver LSI that displays alphanumerics, characters and symbols. It drives dot matrix LCD under microcomputer control. All functions needed for dot matrix LCD drive are internally provided on one chip. ODERING INFORMATION Type CGROM IZ0066 - 00 English Numberal Japanese IZ0066 - 01 English Numberal Cyrillic IZ0066 - XX Custom font (XX – ROM code) ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Value Unit Power Supply Voltage VDD - 0.3 ~ 7.0 V Driver Supply Voltage V1 ~ V5 VDD - 13.5 ~ VDD + 0.3 V VI -0.3 ~VDD + 0.3 Input Voltage V Operating Temperature Ta - 20 ~ + 75 o Storage Temperature Tstg - 55 ~ + 125 o C C Notes: Must keep the relation of VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5 1 1 IZ0066 DOT MATRIX LCD CONTROLLER & DRIVER BLOCK DIAGRAM P ow er su p p ly for LCD D riv e V1 P arallel/S erial D ata con v ersion C ircu it V2 V3 V4 V5 5 5 B u sy F lag C h aracter G en erator ROM 8320 b its C u rsor B lin k C on trol C ircu it C h aracter G en erator RAM 512 b its D B 0 ~D B 3 4 D B 4 ~D B 7 4 8 8 8 I/O B u ffer SEG 1 D ata R egister 8 4 0 - b it S h ift 40 R eg ister S eg m en t to 4 0 - b it S E G 40 L a tch 40 S ig n a l 40 D riv er C ircu it 7 R /W RS E 7 8 In stru ction R egister 8 7 In stru ction D ecod er 7 D isp lay D ata R A M 80 x 8 b its D 7 A d d ress C ou n ter 7 16 - b it S h ift 16 R egister CO M 1 to C om m on C O M 16 S ign al 16 D riv er O SC1 O SC2 T im in g G en eration C ircu it CLK 1 CLK 2 M V DD V SS 2 2 DOT MATRIX LCD CONTROLLER & DRIVER IZ0066 ELECTRICAL CHARACTERISTICS (Ta = 25oC, VDD = +5V, VSS = 0V unless otherwise specified) Characteristic Symbol Operating Voltage VDD Operating Current (*1) IDD HIGH Input Voltage VIH Test Condition Applicable Terminals Min 4.5 Internal oscillation or external clock fOSC = 270KHz 0.35 E, DB0 ~ DB7, R/W, RS OSC1 LOW Input Voltage VIL HIGH Output Voltage VOH LOW Output Voltage Driver Voltage Descending Input LOW Current Frequency(*1) 2.2 VDD-1.0 5.5 V 0.6 0.6 1.0 -0.2 2.4 IOH = -40µA CLK1, CLK2, M, D 0.9VDD DB0 ~ DB7 IOL = 40µA CLK1, CLK2, M, D IO = ± 0.1mA COM1 ~ COM16 1.0 SEG1 ~ SEG40 1.0 VIN =0V ~ VDD IIL VCC = 5V (test pull up R) 0.4 E V V IOL = 1.2mA ILKG V VDD -0.3 OSC1 VCOM Unit E, DB0 ~ DB7, R/W, RS DB0 ~ DB7 VOL Max VDD IOH = -0.205 mA VSEG Input Leakage Current Typ V 0.1VDD -1 V 1 µA -50 -125 -250 µA fEC 125 250 350 KHz DUTY 46 50 55 % RS, R/W, DB7 DB0 ~ External Duty Clock Rise time tR 0.2 µs Fall time tF 0.2 µs KHz OSC1 Rf = 91KΩ ± 2% Internal Clock Frequency(*1) fOSC1 Ceramic Resonator Oscillation Frequency (*1) fOSC2 LCD Driving Voltage (*2) VLCD1 VDD – V5 VLCD2 Notes: *1). OSC1, OSC2 1/5 bias V1 ~ V5 1/4 bias 190 270 350 245 250 255 4.6 10.0 3.0 10.0 V Oscillation circuit Resistor circuit O SC 1 External clock circuit O SC 1 O SC 2 O SC 2 Rf R f: 91k Ω+ 2% F requ en cy inp u t open *2). Input the voltage listed in table below to V1 ~ V5 Duty 1/8, 1/11 1/16 Bias 1/4 1/5 Power supply V1 VDD – VLCD/4 V2 VDD – VLCD/2 V3 VDD – VLCD/2 V4 VDD – 3VLCD/4 V5 VDD – VLCD *VLCD is the LCD driving voltage, refer to the initial set of the instruction code. VDD – VLCD/5 VDD – 2VLCD/5 VDD – 3VLCD/5 VDD – 4VLCD/5 VDD – VLCD 3 3 DOT MATRIX LCD CONTROLLER & DRIVER IZ0066 AC CHARACTERISTICS (VDD = 5V, VSS = 0V, Ta = 25oC) (1) Write mode (Writing data from MPU to IZ0066) Characteristic Symbol Test pin Min E Cycle Time tC E 500 E Rise Time tR E 25 ns E Fall Time tF E 25 ns E Pulse Width (High, Low) tW E 220 ns R/W and RS Set-up Time tSU1 R/W, RS 40 ns R/W and RS Hold Time tH1 R/W, RS 10 ns Data Set-up Time tSU2 DB0 ~ DB7 60 ns Data Hold Time tH2 DB0 ~ DB7 10 ns RS V IH 1 V V IL 1 V IL 1 tS U 1 Typ Max Unit ns IH 1 tH 1 R /W V IL 1 V IL 1 tH 1 tW V IL 1 E tR tS U 2 tH 2 V IH 1 V IH 1 D B0 ~ D B7 V alid D ata V IL 1 V IL 1 tC (2) Read mode (Reading data from IZ0066 to MPU) Characteristic Symbol Test pin Min Typ Max Unit E Cycle Time tC E 500 E Rise Time tR E 25 ns E Fall Time tF E 25 ns ns E Pulse Width (High, Low) tW E 220 ns R/W and RS Set-up Time tSU1 R/W, RS 40 ns R/W and RS Hold Time tH1 R/W, RS 10 ns Data Output Delay Time tD DB0 ~ DB7 Data Hold Time tH2 DB0 ~ DB7 120 20 ns ns 4 4 DOT MATRIX LCD CONTROLLER & DRIVER RS IZ0066 V IH 1 V IH 1 V IL 1 V tS U IL 1 tH R /W V IL 1 tW tH tF V IH 1 V IL 1 E V V IL 1 IL 1 tR tD tD H V IH 1 D B0 ~ D B7 V IH 1 V IL 1 V alid D ata V IL 1 tC (3) Interface mode with IZ0065 Characteristic Symbol Test pin Min Clock Pulse Width High tWCKH CLK 800 Clock Pulse Width Low Typ Max Unit ns tWCKL CLK 800 ns Data Set-up Time tSU D 300 ns Data Hold Time tDH D 300 ns Clock Set-up Time tCSU CLK 500 M Delay Time tDM M -1000 0.9V D D 0.9V ns 1000 ns DD CLK 1 tW CK H tW CK H tC S U CLK 2 0.9V 0.1V 0.9V D D DD 0.1V DD 0.1V DD tW tC S U D M 0.9V D D 0.1V D D tS U 0.9V DD CK 1 0.9V 0.1V DD DD tD M DD tD M 5 5 DOT MATRIX LCD CONTROLLER & DRIVER IZ0066 TERMINAL DESCRIPTION Pin INPUT/OUTPUT VDD VSS Name INTERFACE Operating Voltage For logical circuit (+5V ± 10%) Power 0V(GND) Supply Negative Supply Voltage Bias voltage level for LCD driving Power V1 – V5 DESCRIPTION SEG1– SEG40 Output Segment output Segment signal output for LCD driving LCD COM1– COM16 Output Common output Common signal output for LCD driving LCD OSC1 Input Oscillator Both pin connected to Rf resistor or ceramic resonator for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. Resistor or OSC2 Output CLK1 Data latch clock Clock output terminal for the serially transferred data to be latched to the driver. Data shift clock Clock output terminal used when D terminal data output shifts the inside of the driver. M Alternated signal for LCD driver output The alternating signal to convert LCD drive waveform to AC. D Display data interface Character pattern data, which is corresponding to each common signal, is supplied to driver serially. CLK2 E Output Input R/W RS DB0 – DB7 Selection Low Non selection Enable Start anable signal to read or write the data Read/Write R/W signal input is used to select the read/write mode Register select Input/Output High Data interface High Read mode Low Write mode Ceramic Resonator IZ0065 MPU Register selection input High Data register and write) (for read Low Instruction register (for write), Busy flag, address counter (for read) Used for data transfer between the MPU and IZ0066. These terminals are for data bus with bidirectional three-state. Initial 4 bit (DB0-DB3) are not used during 4 bit operation (DB7 can be used as a busy flag) 6 6 DOT MATRIX LCD CONTROLLER & DRIVER IZ0066 CONTROL and DISPLAY COMMANDS Command DISPLAY CLEAR RETURN HOME ENTRY MODE SET RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Execution time (fOSC=250KHz) L L L L L L L L L H 1.64 ms L L L L L L L L H X 1.64 ms L L L L L L L H I/D SH 40µs Remark Cursor move to first digit *I/D: set cursor move direction I/D H L Increase Decrease *SH: Specifies shift of display SH H Display is shifted Display is not shifted L DISPLAY ON/OFF L L L L L L H D C B 40µs *Display D H L Display on Display off H L Cursor on Cursor off *Cursor C *Blinking SHIFT L L L L L H S/C R/L X X 40µs B H L SC H L R/L SET FUNCTION SET CG RAM ADDRESS SET DD RAM ADDRESS READ BUSY FLAG & ADDRESS WRITE DATA READ DATA L L L L L L L L H L H H DL N F X X CG RAM address (corresponds to cursor address) 40µs H BF H L Right shift Left shift DL H L 8 bits interface 4 bits interface N H L 2 line display 1 line display F H L 5x10 dots 5x7 dots CG RAM Data is sent and received after this setting 40µs DD RAM Data is sent and received after this setting 0µs Address Counter used for CG RAM address Display shift Cursor move 40µs DD RAM address L Blinking on Blinking off Both DD & H L Write Data 46µs H H Read Data 46µs BF H L Busy Ready -Reads BF indication internal operating is being performed. -Reads address counter contents Write data DD or CG RAM Read data from DD or CG RAM Note: X – Don’t care. 7 7 C O M 1~ C O M 16 SEG 1~ SEG 40 D O SC 1 O SC 2 V SS M C LK1 D L1 FC S SHL1 SC 1 ~ SC 40 IZ006 5 D L2 D R1 D R2 LC D Pa nel D L1 SC 1 ~ SC 40 D L2 D R1 D R2 FC S C L1 C L1 IZ00 65 C L2 SH L1 C L2 SH L2 M V SS VD D V6 V 5 V 4 V 3 V2 V1 VEE D L1 FC S SHL1 SC 1 ~ SC 40 IZ00 65 C L1 D L2 D R1 D R2 C L2 SHL2 M VSS VD D V6 V 5 V4 V3 V2 V1 VEE V1 SHL2 M V SS VD D V 6 V5 V4 V3 V 2 V1 VEE V1 V2 VD D V2 V3 C LK2 VD D V3 V4 V5 V4 V5 V LC D (1 /5 b ia s) G N D or othervoltage 8 IZ0066 D B 0 ~ D B7 To M PU IZ0066 DOT MATRIX LCD CONTROLLER & DRIVER APPLICATION CIRCUIT When IZ0065 is externally connected to the IZ0066, you can increase the number of display digits up to 80 characters. 8 DOT MATRIX LCD CONTROLLER & DRIVER IZ0066 PAD LAYOUT (0 ,0 ) IZ0 0 6 6 PA D D IA G R A M C h ip size : 4 0 0 0 x 4 9 0 0 Pa d size : 1 2 0 x 1 2 0 U n it : µm The chip substrate is connected to VDD. PAD LOCATION Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Pad Name SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 GND OSC1 OSC2 V1 V2 ( Unit: µm) X Y Pad No. -2221 -2041 -1804 -1624 -1444 -1264 -1084 -904 -724 -544 -364 -184 -4 176 35 536 716 896 1076 1256 1436 1616 1920 2100 2299 2299 2299 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1830 -1552 -1372 -1192 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 Pad Name V3 V4 V5 CL1 CL2 VCC M D RS R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 X Y Pad No. 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2188 2008 1812 1632 1436 1256 961 781 601 421 241 61 -119 -299 -1012 -832 -862 -472 -292 -112 68 248 428 608 788 1090 1270 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 Pad Name COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 X Y -530 -710 -941 -1121 -1301 -1481 -1661 -1841 -2036 -2216 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1404 1224 1044 864 684 504 324 144 -36 -216 -396 -576 -756 -936 -1116 -1296 9 9