TI TPS6734IP

TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
D
D
D
D
D
D
D
D
D
D OR P PACKAGE
(TOP VIEW)
Pin-for-Pin Compatible With MAX734
Programming Voltage for Flash Memory
2.7-V to 11-V Input Operating Range
Output Current of 120 mA or Greater From
3.75-V or Higher Input
3-µA Maximum Supply Current in
Shutdown
Only 5 External Components Required
High Efficiency . . . 85% Typical (5-V Input,
120-mA Output)
8-Pin SOIC and DIP Packages
– 40°C to 85°C Free-Air Operating
Temperature Range
EN
REF
SS
COMP
1
8
2
7
3
6
4
5
VCC
FB
OUT
GND
description
The TPS6734 is a fixed 12-V output boost converter capable of delivering 120 mA from inputs as low as
3.75 V. The device is pin-for-pin compatible with the MAX734 regulator and offers the following advantages:
lower supply current, wider operating input-voltage range, and higher output currents. As shown in Figure 1,
the only external components required are: an inductor, a Schottky rectifier, an output filter capacitor, an input
filter capacitor, and a small capacitor for loop compensation. The entire converter occupies less than 0.7 in2 of
PCB space when implemented with surface-mount components. An enable input is provided to shut down the
converter and reduce the supply current to 3 µA when 12 V is not needed.
The TPS6734 is a 170-kHz current-mode PWM ( pulse-width modulation) controller with an n-channel MOSFET
power switch. Gate drive for the switch is derived from the 12-V output after start-up to minimize the die area
needed to realize the 0.7-Ω MOSFET and improve efficiency at input voltages below 5 V. Soft start is
accomplished with the addition of one small capacitor. A 1.22-V reference (pin 2) is brought out for external use.
High efficiency at low supply voltages and low supply current in shutdown make the TPS6734 particularly
attractive for flash memory programming supplies, PCMCIA cards, and operational amplifiers in
battery-powered equipment. The TPS6734 is available in 8-pin DIP and SOIC packages and operates over a
free-air temperature range of – 40°C to 85°C.
VI
3.75 V to 12 V
ENABLE
TPS6734
1
2
3
4
EN
VCC
REF
SS
FB
OUT
COMP GND
8
18 µH
7
1A, 20 V
6
+
5
33 µF
0.001 µF
VO
12 V, 120 mA
Figure 1. Typical Operating Circuit
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
AVAILABLE OPTIONS
PACKAGE
TA
SMALL OUTLINE
(D)
– 40°C to 85°C
TPS6734ID
PLASTIC DIP
(P)
TPS6734IP
The D package is available taped and reeled. Add the suffix R
to the device type (e.g., TPS6734IDR).
TPS6734 chip information
Thermal compression or ultrasonic bonding can be used on the doped-aluminum bonding pad. Chips can be
mounted with conductive epoxy or a gold-silicon preform. Contact factory for die sales.
BONDING PAD ASSIGNMENTS
(1)
1
(8)
8
EN
REF
7
(7)
SS
(2)
2
COMP
1
8
2
7
3
4
TPS6734
6
5
VCC
FB
OUT
GND
(7)
7
92
CHIP THICKNESS: 15 TYPICAL
(6)
6
BONDING PADS: 4X4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%
ALL DIMENSIONS ARE IN MILS.
(3)
3
(4)
4
(5)
5
(5)
5
75
2
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TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
functional block diagram
EN
1
8
VCC
EN
VCC
EN
FB
7
170-kHz
Oscillator
COMP
6
_
R
Error
Amplifier
Voltage
Reference
2
1 MΩ
SS
OUT
S
+
REF
Power Switch
4
Q
Drive Latch
PWM
Comparator
x6
Driver
Σ
Current
Sense Amplifier
5
3
GND
x3.5
SS
Clamp
Overcurrent
Comparator
+
–
Terminal Functions
TERMINAL
NAME
DESCRIPTION
NO.
EN
1
Enable. EN ≥ 2 V turns on the TPS6734. EN ≤ 0.4 V turns it off and reduces the supply current to 3 µA max.
REF
2
1.22-V reference voltage output. REF can source 100 µA for external loads.
SS
3
Soft Start. A capacitor between SS and GND brings the output voltage up slowly at power-up.
COMP
4
Compensation connection. A 0.001-µF capacitor between COMP and FB stabilizes the feedback loop.
GND
5
Ground
OUT
6
N-channel MOSFET drain connection
FB
7
Feedback voltage. FB is connected to the converter output for the feedback loop.
VCC
8
Supply voltage input
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3
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
detailed description
The following descriptions refer to the functional block diagram.
reference
The internal 1.22-V reference is brought out on REF and can source 100 µA maximum to external loads. A
0.01-µF to 0.1-µF decoupling capacitor connected between REF and GND is recommended to minimize noise
pickup.
oscillator and ramp generator
The oscillator circuit provides a 170-kHz clock, to set the converter operating frequency, and a timing ramp for
slope compensation. The clock waveform is a pulse, a few hundred nanoseconds in duration, that is used to
limit the maximum power-switch duty cycle to 95%. The timing ramp is summed with the current-sense signal
at the input to the current-sense amplifier.
driver latch
The latch, which consists of a set/reset flip-flop and associated logic, is used to control the state of the power
switch by turning the driver on and off. A high output from the latch turns the switch on; a low output from the
latch turns it off. In normal operation, the flip-flop is set high during the clock pulse, but gating keeps the latch
output low until the clock pulse is over. The latch is reset when the PWM comparator output goes high.
current-sense amplifier
The current-sense amplifier has a fixed gain of 6. It amplifies the slope-compensated current-sense voltage (a
summation of the voltage on the current-sense resistor and the oscillator ramp) and feeds it to the PWM
comparator.
error amplifier
The error amplifier is a high-gain differential amplifier used to regulate the converter output voltage. The
amplifier generates an error signal, which is fed to the PWM comparator. The error signal is generated when
a sample of the output voltage is compared to the internal reference and the difference is amplified. The output
sample is obtained from a resistive divider connected between FB and GND. FB is externally connected to the
converter output, and the divider output is connected to both the error amplifier input and COMP. A 0.001-µF
capacitor connected between FB and COMP stabilizes the voltage control loop.
PWM comparator
The PWM comparator resets the drive latch and turns off the power switch whenever the slope-compensated
current-sense signal from the current-sense amplifier exceeds the error signal.
power switch
The power switch is a 0.7-Ω n-channel MOSFET with current-sensing. The drain is connected to OUT and the
current sense is connected to a resistor. The voltage across the resistor is proportional to the current in the
power switch and is tied to the overcurrent comparator and the current-sense amplifier. In normal operation,
the power switch is turned on at the start of each clock cycle and turned off when the PWM comparator resets
the drive latch.
SS clamp
The SS (soft-start) clamp circuit limits the signal level on error-amplifier output during start-up. The voltage on
SS is amplified and used to momentarily override the error-amplifier output until it rises above that output, at
which point the error-amplifier takes over. This prevents the input to the PWM comparator from exceeding its
common-mode range (the error-amplifier output too high to be reached by the current ramp) by limiting the
maximum voltage on the error-amplifier output during start-up.
4
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TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
soft start
Soft start causes the output voltage to increase to the regulation point at a controlled rate of rise. The voltage
on the charging soft-start capacitor gradually raises the clamp on the error-amplifier output voltage, limiting
surge currents at power-up by increasing the current-limit threshold on a cycle-by-cycle basis. Even if SS has
no capacitor installed, some distributed capacitance will always be present. A soft-start cycle is initiated when
either the enable signal (EN) is switched high, or an overcurrent fault condition triggers the discharge of the
soft-start capacitor.
overcurrent comparator
The overcurrent comparator monitors the current in the power switch. The comparator trips and initiates a
soft-start cycle if the power-switch current exceeds 1.5-A peak. On each clock cycle, the power switch turns on
and attempts to deliver current until the overcurrent limits are exceeded.
enable (EN)
A logic low on EN puts the TPS6734 in shutdown mode. In shutdown, the output power switch, voltage
reference, and other functions are shut off, the supply current is reduced to 3 µA maximum, and the soft-start
capacitor is discharged through a 1-MΩ resistance. The output voltage falls to a diode drop below the input
voltage because of the current path from input to output through the inductor and diode.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
D
725 mW
5.8 mW/°C
464 mW
377 mW
P
1175 mW
9.4 mW/°C
752 mW
611 mW
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Pin voltages: VCC, OUT (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 15 V
SS, COMP, EN (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VCC+ 0.3 V
Peak switch current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 A
Reference current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 mA
Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network terminal ground.
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TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
recommended operating conditions
Supply voltage
MIN
NOM
MAX
2.7
5
12
Compensation capacitor
0
Reference capacitor
100
– 40
µA
µF
0.01
Operating free-air temperature, TA
V
µF
0.001
Output current at REF
UNIT
85
°C
electrical characteristics over recommended operating free-air temperature range, VCC = 5 V,
IO(LOAD) = 0 mA, EN = 5 V, typical values are at TA = 25°C (unless otherwise noted) (refer to circuit
shown in Figure 13)
PARAMETER
Operating
Supply current
Standby
TEST CONDITIONS
MIN
Entire circuit
TYP
MAX
1.2
2.5
mA
EN = 0.4 V, entire circuit
3
µA
EN = 0.4 V, into VCC
3
µA
High-level input threshold voltage at EN
2
V
Low-level input threshold voltage at EN
Shutdown input leakage current at EN
–1
On resistance at OUT
Current at OUT = 500 mA
Leakage current at OUT
VDS = 12 V
Reference voltage
Reference drift
UNITS
TA = – 40°C to 85°C
Oscillator frequency
Compensation pin impedance
0.4
V
1
µA
0.7
Ω
1
µA
1.22
V
6.7
ppm/°C
170
kHz
7500
Ω
performance characteristics over recommended operating free-air temperature range, typical
circuit connected as shown in Figure 13, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
Output voltage
Load current
Line regulation
Load regulation
Efficiency
6
TEST CONDITIONS
VCC = 4.75 V,
VCC = 3.75 V
0 mA < IO(LOAD) < 120 mA
VCC = 3.0 V,
VCC = 5 V to 12 V,
Figure 11
IO(LOAD) = 50 mA
IO(LOAD) = 0 mA to 120 mA
VCC = 5 V,
IO(LOAD) = 120 mA
POST OFFICE BOX 655303
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MIN
TYP
MAX
UNITS
11.64
12.12
12.6
V
120
150
150
0.20%
0.0042%
86%
mA
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
TYPICAL CHARACTERISTICS
I L – Load Current – mA
LOAD TRANSIENT RESPONSE
200
150
VI = 5 V
VO = 12 V
IL = 0 mA to 120 mA
100
50
12.1
12
11.9
0
2
4
6
8
10
12
14
16
VO – Output Voltage – V
0
18
t – Time – ms
Figure 2
ÁÁ
6
4
2
0
12.05
12
11.95
0
2
4
6
8
10
12
14
16
VO – Output Voltage – V
VI – Input Voltage – V
LINE TRANSIENT RESPONSE
8
18
t – Time – ms
Figure 3
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7
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
TYPICAL CHARACTERISTICS
OSCILLATOR FREQUENCY
vs
SUPPLY VOLTAGE
EN RESPONSE TIME
200
Fosc – Oscillator Frequency – kHz
14
VI = 5 V
VO = 5 V to 12 V
IL = 120 mA at 12 V
Voltage – V
12
Output
Voltage
10
8
190
180
170
ÁÁ
ÁÁ
ÁÁ
6
4
EN Voltage
2
160
150
140
0
0
1
2
3
4
5
6
7
8
3
9
4
5
6
7
8
9
10
VCC – Supply Voltage – V
t – Time – mS
Figure 4
Figure 5
MAXIMUM OUTPUT CURRENT
vs
SUPPLY VOLTAGE
INPUT SUPPLY CURRENT
vs
SUPPLY VOLTAGE
18
180
IO = 0
Á
Á
I O – Maximum Output Current – mA
I CC – Input Supply Current – mA
16
14
Bootstrap
12
10
8
6
4
2
0
0.1 0.5
160
140
120
100
80
60
40
20
Typical
0
0.9
1.3 1.7 2.1 2.5 2.9 4.5
VCC – Supply Voltage – V
6.5 8.5
3
Figure 6
8
4.5
3.5
4
VCC – Supply Voltage – V
Figure 7
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5
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
APPLICATION INFORMATION
The TPS6734 operates in a boost circuit as shown in Figures 1 and 11. Figure 1 shows the typical application
circuit, which generates 12 V from a nominal 5-V source. The circuit is ideal for processor interface for energy
management, because EN can be controlled by logic signals to place the 12-V source into the shutdown mode
(3-µA current drain) when 12 V is not needed. An example of such an application is a flash memory device that
requires 12 V for the erase cycle.
discontinuous mode
The circuit shown in Figure 1 operates in discontinuous mode over most of the range of input voltage and output
current. In discontinuous mode, current through the inductor begins at zero, rises to a peak value, then ramps
down to zero each cycle as shown by the voltage and current waveforms in Figure 8. The ringing in the voltage
waveform on OUT results from a resonance between the inductor and the power switch capacitance and is
normal for discontinuous operation.
DISCONTINUOUS MODE
15
VI = 5 V
VO = 12 V
IL = 50 mA
10
5
0
1
0.5
0
0
2
4
6
8
10
12
14
16
I – Inductor Current – A
Voltage at Out – V
20
18
t – Time – µs
Figure 8
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9
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
APPLICATION INFORMATION
continuous mode
When the converter is delivering heavy loads from low voltage sources, it operates in continuous mode. As
shown in Figure 9, the inductor current does not drop to zero and the ringing is gone from the OUT voltage
waveform.
CONTINUOUS MODE
Voltage at Out – V
20
15
VI = 5 V
VO = 12 V
IL = 150 mA
10
5
1
0.5
0
0
2
4
6
8
10
12
14
16
I– Inductor Current – A
0
18
t – Time –µs
Figure 9
pulse-skipping mode
At very light load currents, the TPS6734 cannot generate drive pulses sufficiently narrow to maintain regulation
and operate at 170 kHz. Under these circumstances, the converter operates in a pulse-skipping mode, in which
cycles are skipped. In pulse-skipping mode, the waveforms are irregular and the output ripple contains a
low-frequency component that may exceed 50 mV peak-to-peak.
10
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TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
APPLICATION INFORMATION
efficiency
Typical efficiency for the converter circuit shown in Figure 13 is plotted in Figure 10. The efficiency falls off rapidly
at very light currents because the supply current is a significant percentage of the load.
EFFICIENCY
vs
OUTPUT CURRENT
88
VCC = 5.5 V
86
% – Efficiency
84
VCC = 4.5 V
VCC = 5 V
82
80
78
76
74
10 20 30 40 50 60 70 80 90 100 110 120 130 140
IO – Output Current – mA
Figure 10
inductor selection
Inductance value is directly proportional to the input voltage and inversely proportional to the output power. The
18 µH shown in the typical circuit is the proper value for operation from 5-V sources up to 2-W loads. A lower
inductance value should be used when operating from 3-V sources. Operation from 7 V and higher sources may
require inductance values greater than 18 µH. The inductor’s saturation current rating should be greater than
three times the dc load current for 5-V inputs and five times the dc load for 3-V inputs.
output filter capacitor selection
The output filter capacitor should be selected for minimum ESR (equivalent series resistance). Capacitor
ESR × ∆IL (change in inductor current) determines the amplitude of the high-frequency ripple on the output
voltage. The ESR of the capacitor should be less than 0.25 Ω to keep the output ripple less than 50 mV
peak-to-peak over the entire current range (using 18-µH inductor).
diode
A Schottky diode or a high-speed silicon rectifier should be used. The continuous current rating of the diode
should be at least 300 mA for full load (120 mA) operation.
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11
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
APPLICATION INFORMATION
soft-start capacitor
Soft-start timing is controlled by the value of the SS capacitor. Table 1 lists soft-start time intervals for selected
capacitor values and circuit conditions. If the circuit starts up with no load (e.g. in flash-memory programming
supplies), no soft start is needed. Omitting the soft-start capacitor provides a minimum output-voltage rise time
from the shutdown state, improving the output start-up time.
Table 1. Typical Soft-Start Times
SOFT-START TIME† (ms) VERSUS CAPACITANCE (µF)
SUPPLY
VOLTAGE (V)
NO. CAP
0.047
0.1
0.47
1.0
5
0.70
22
42
220
400
7
0.46
15
37
185
225
9
0.38
10
17
88
155
† Soft-start times are ±35%
printed-circuit layout
Printed-circuit-board (PCB) layout is critical to quiet operation. A ground plane is recommended. Special
attention should be given to minimizing the lengths of the switching loops. The first loop is formed by OUT, the
diode, the output capacitor, and GND, the length of which can be minimized by connecting the anode of the diode
close to OUT. The output capacitor should be connected directly between the diode cathode and GND with the
shortest possible path. The second loop is formed by OUT, the inductor, the input capacitor, and GND. This loop
is less critical than the first; however, the connection of OUT, the inductor and the anode of the diode must be
minimized. Bypass capacitors should be located as close to the device as possible to prevent instability and
noise pickup. If a large VCC-to-GND bypass capacitor cannot be placed adjacent to the IC pins, the pins should
be bypassed directly with a small ceramic capacitor (e.g., 0.1 µF). The recommended layout, shown in
Figures 14 through 17, can provide guidance for PCB configuration (the ground plane beneath the TPS6734
and the short loops should be noted).
Plastic plug-in-type proto boards, or any construction scheme that allows long leads and the possibility of noise
pickup, should not be used when assembling a breadboard or prototype application circuit implementing the
TPS6734.
12
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TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
APPLICATION INFORMATION
bootstrapped output circuit
For operation below 2.7 V, the TPS6734 may be connected in a bootstrap configuration as shown in Figure 11.
The bootstrap configuration is less efficient (requires more supply current and suffers a loss in efficiency at
voltages below 5 V; see Figure 12) and is not recommended except for very low voltage operating conditions.
Because the output-driver stage, which benefits most from higher voltages, is diode-coupled to the output
voltage (see Figure 2), the bootstrapped configuration provides no benefit except at very low voltages. In the
shutdown mode (EN = low), no-load quiescent current is unchanged (3 µA max) whether in the bootstrap or the
typical configuration.
VI
2 V to 12 V
TPS6734
1
ENABLE
2
3
4
EN
VCC
REF
SS
FB
OUT
COMP GND
8
7
18 µH
1 A, 20 V
6
+
5
0.0047 µF
33 µF
VO
12 V, 120 mA
0.001 µF
Figure 11. TPS6734 Bootstrap Configuration
EFFICIENCY
vs
OUTPUT CURRENT FOR TYPICAL AND BOOTSTRAP
86
Typical
84
VCC = 5 V
82
Bootstrap
% – Efficiency
80
78
76
74
72
70
68
66
10 20 30 40 50 60 70 80 90 100 110 120 130 140
IO – Output Current – mA
Figure 12
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13
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
APPLICATION INFORMATION
TPS6734 converter design with recommended layout
The following schematic (Figure 13) and a required-components table are provided for a 12-V-output boost
converter. The converter is capable of delivering 120 mA of output current over an input voltage range of 3.75 V
to 12 V. Recommended layout and detailed artwork for a PCB are provided in Figures 14 through 17.
P1
VI
GND
GND
ENABLE
1
2
R1
10 kΩ
TPS6734
1
3
C1
33 µF, 20 V
4
EN
VCC
+
2
FB
REF
8
7
U1
3
SS
OUT
COMP
C2
0.01 µF
D1
6
5
4
GND
C3
0.047 µF
P2
1
L1
18 µH
VO
SS12
2
VO
C5
3
+
33 µF, 20 V
GND
4
GND
C4 0.001 µF
NOTE A: A jumper between pins P1-3 and P1-4 shuts off the TPS7634. Remove the jumper to resume normal operation.
Figure 13. Schematic for Printed Circuit Board (shown in Figures 14 through 17)
Required Components
QTY.
14
DESCRIPTION
REF DES
MANUFACTURER’S
PART NO.
MANUFACTURER
1
IC, power supply, 12 V for flash memory
U1
TPS6734ID
Texas Instruments
1
Diode, Schottky
D1
SS12
General Instruments
1
Inductor, 18 µH, 150 mΩ, 1.23 A(DC)
L1
CD54180MC
Sumida
2
Capacitor, 33 µF, 20 V, tantalum
TAPSD336M020R0200
AVX
1
Capacitor, 0.01 µF, 50 V, ceramic, 0805
C2
1
Capacitor, 0.047 µF, 50 V, ceramic, 1206
C3
1
Capacitor, 0.001 µF, 50 V, ceramic, 0805
C4
2
Connector, header, 4-pin
1
PCB, TPS6734
C1,5
P1,2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
Molex
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
APPLICATION INFORMATION
REDUCE TO 2.000 +/– .005
REDUCE TO 2.500 +/– .005
1
P1
R1 C1
C2 C3
D1
SLVP081
P2
1
L1
U1
C4 C5
4
4
TPS6734 EVALUATION BOARD
SILKSCREEN – TOP
Figure 14. Component Placement
REDUCE TO 2.000 +/– .005
REDUCE TO 2.500 +/– .005
1
P1
C2 C3
4
R1 C1
SLVP081
1
P2
L1
D1
U1
C4 C5
4
SS
JMPR
TPS6734 EVALUATION BOARD
SILKSCREEN – TOP
Figure 15. Solder Paste Mask
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
APPLICATION INFORMATION
REDUCE TO 2.000 +/– .005
REDUCE TO 2.500 +/– .005
COMPONENT SIDE
Figure 16. Printed Circuit, Component Side
REDUCE TO 2.000 +/– .005
REDUCE TO 2.500 +/– .005
Figure 17. Printed Circuit, Wiring Side
(Viewed from Component Side)
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047 / D 10/96
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
TPS6734I
FIXED 12-V 120-mA BOOST-CONVERTER SUPPLY
SLVS127A – AUGUST 1995 – REVISED JANUARY 1999
MECHANICAL DATA
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE PACKAGE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0°– 15°
0.010 (0,25) M
0.010 (0,25) NOM
4040082 / B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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