IRF IRL1104PBF

PD - 95404
IRL1104PbF
Logic-Level Gate Drive
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
Description
HEXFET® Power MOSFET
l
D
VDSS = 40V
RDS(on) = 0.008Ω
G
ID = 104A…
S
Fifth Generation HEXFET ® power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve the lowest possible on-resistance
per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET® power MOSFETs are well known for, provides
the designer with an extremely efficient device for use in a
wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ‚
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
104…
74
416
167
1.1
±16
340
62
17
5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
www.irf.com
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Min.
Typ.
Max.
Units
––––
––––
––––
––––
0.50
––––
0.9
––––
62
°C/W
1
6/17/04
IRL1104PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
V(BR)DSS
RDS(on)
Static Drain-to-Source On-Resis-
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
Qg
Q gs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min.
40
–––
–––
–––
1.0
53
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.04
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
18
257
32
64
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.008
VGS = 10V, ID = 62A „
Ω
0.012
VGS = 4.5V, ID = 52A „
–––
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 62A
25
VDS = 40V, VGS = 0V
µA
250
VDS = 32V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
68
ID = 62A
24
nC VDS = 32V
33
VGS = 4.5V, See Fig. 6 and 13 „
–––
VDD = 20V
–––
ID = 62A
ns
–––
RG = 3.6Ω, VGS = 4.5V
–––
RD = 0.4Ω, See Fig. 10 „
Between lead,
––– 4.5 –––
6mm (0.25in.)
nH
from package
––– 7.5 –––
and center of die contact
––– 3445 –––
VGS = 0V
––– 1065 –––
pF
VDS = 25V
––– 270 –––
ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
IS
I SM
VSD
trr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ VDD = 15V, starting TJ = 25°C, L = 0.18mH
RG = 25Ω, IAS =62A. (See Figure 12)
ƒ ISD ≤ 62A, di/dt ≤ 217A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
2
Min. Typ. Max. Units
Conditions
MOSFET symbol
––– ––– 104…
showing the
A
G
integral reverse
––– ––– 416
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 62A, VGS = 0V „
––– 84 126
ns
TJ = 25°C, IF = 62A
––– 223 335
nC di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
D
S
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… Calculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
www.irf.com
IRL1104PbF
1000
1000
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
100
100
10
2.7V
20µs PULSE WIDTH
TJ = 25 °C
1
0.1
1
10
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25 ° C
TJ = 175 ° C
100
10
V DS = 25
50V
20µs PULSE WIDTH
10.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
www.irf.com
10
100
Fig 2. Typical Output Characteristics
2.5
8.0
1
VDS , Drain-to-Source Voltage (V)
1000
6.0
20µs PULSE WIDTH
TJ = 175 °C
1
0.1
100
Fig 1. Typical Output Characteristics
4.0
2.7V
10
VDS , Drain-to-Source Voltage (V)
1
2.0
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 2.7V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
ID = 104A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRL1104PbF
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
5000
4000
Ciss
3000
2000
Coss
1000
10
VGS , Gate-to-Source Voltage (V)
6000
ID = 62 A
VDS = 32V
VDS = 20V
8
6
4
2
Crss
0
1
10
0
100
VDS , Drain-to-Source Voltage (V)
0
20
40
60
80
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
TJ = 175 ° C
1000
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
FOR TEST CIRCUIT
SEE FIGURE 13
10
TJ = 25 ° C
1
0.1
0.2
VGS = 0 V
0.8
1.4
2.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
2.6
10us
100
100us
1ms
10
1
10ms
TC = 25 °C
TJ = 175 °C
Single Pulse
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
www.irf.com
IRL1104PbF
120
100
ID , Drain Current (A)
RD
VDS
LIMITED BY PACKAGE
V GS
D.U.T.
RG
+
-V DD
80
4.5V
60
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
0.00001
PDM
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com
5
15V
DRIVER
L
VDS
D.U.T
RG
IAS
10V
5
tp
+
V
- DD
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
IRL1104PbF
800
TOP
BOTTOM
600
400
200
0
25
V(BR)DSS
tp
ID
25A
44A
62A
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
175
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF
.3µF
4.5 V
QGS
QGD
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
+
V
- DS
D.U.T.
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
www.irf.com
IRL1104PbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by R G
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® power MOSFETs
www.irf.com
7
IRL1104PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
3- EMITTER
4 - DRAIN
HEXFET
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
LOT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
Data and specifications subject to change without notice.
8
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/04
www.irf.com
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/