OPA362 www.ti.com ........................................................................................................................................................................................ SBOS480 – SEPTEMBER 2009 3V VIDEO AMPLIFIER with Internal Gain and Filter in SC70 Check for Samples: OPA362 FEATURES 1 • • • • 23 • • • • • • • • • (1) EXCELLENT VIDEO PERFORMANCE INTERNAL GAIN: 5.2V/V SUPPORTS TV-DETECTION COMPATIBLE WITH OMAP343x and DaVINCI™ PROCESSORS TWO-POLE RECONSTRUCTION FILTER INPUT RANGE INCLUDES GROUND – DC-Coupled Input INTEGRATED LEVEL SHIFTER – DC-Coupled Output(1) – No Output Capacitors Needed RAIL-TO-RAIL OUTPUT LOW QUIESCENT CURRENT: 4.3mA SHUTDOWN CURRENT: 1.5μA SINGLE-SUPPLY: 2.5V to 3.3V SC70-6 PACKAGE: 2.0mm x 2.1mm RoHS COMPLIANT Internal circuitry avoids output saturation, even with 0V sync tip level at the input video signal. APPLICATIONS • V+ The output swings within 5mV of GND and 250mV to V+ with a standard back-terminated video load (150Ω). An internal level shift circuit prevents the output from saturating with 0V input, thus preventing sync-pulse clipping in common video circuits. Therefore, the OPA362 is ideally suited for dc-coupling to the video load. The OPA362 has been optimized for space-sensitive applications by integrating internal gain setting resistors (G = 5.2V/V) and a two-pole video-DAC reconstruction filter. The OPA362 is available in the tiny 2mm × 2.1mm SC70-6 package. 10mV RELATED LOW-VOLTAGE VIDEO AMPS Two-Pole Filter +In Out 872W RSET 3750W Enable The OPA362 high-speed amplifier is optimized for 3V portable video applications. It is specifically designed to be compatible with the video encoders embedded in Texas Instruments’ OMAP3430 and DaVinci processors or other application processors with 0.5VPP video output. The input common-mode range includes GND, which allows a video-DAC (digital-to-analog converter) to be dc-coupled to the OPA362. The TV-detection feature simplifies the end-user interface significantly by facilitating the automatic start/stop of video transmission. In shutdown mode, quiescent current is reduced to less than 1.5μA, dramatically reducing power consumption and prolonging battery life. CAMERA PHONES OPA362 DESCRIPTION G = 5.2V/V Shutdown Control FEATURES PRODUCT 2.7V to 3.3V, 70MHz, 6mA IQ, 5μA Sleep, SC70 OPA358 2.7V to 3.3V, Filter, SAG, G = 2, 5μA Sleep, SC70 OPA360 2.7V to 5.5V, 200MHz, 300V/μs, 6μA Sleep, SOT23 OPA355 2.7V to 5.5V, 100MHz, 150V/μs, 6μA Sleep, SOT23 OPA357 3V Video Amplifier with Internal Gain and Filter, SC70 OPA361 (See note 1) GND NOTE (1)(1):Closed when enabled during normal operation; open when shut down. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DaVINCI is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated OPA362 SBOS480 – SEPTEMBER 2009 ........................................................................................................................................................................................ www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. Supply Voltage, V+ to V– Signal Input Terminals VALUE UNIT +3.6 V Voltage (2) – 0.5 to (V+) + 0.5 V Current (2) ±10 mA Output Short-Circuit through 75Ω to GND (3) Continuous Operating Temperature –40 to +125 °C Storage Temperature –65 to +150 °C Junction Temperature ESD Ratings (1) (2) (3) +160 °C Human Body Model (HBM) 5000 V Charged Device Model (CDM) 2000 V Machine Model (MM) 400 V Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current-limited to 10mA or less. Short-circuit to ground. PACKAGE INFORMATION (1) (1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING OPA362 SC70-6 DCK OEA For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. DCK PACKAGE SC70-6 (TOP VIEW) 2 1 GND 2 RSET 3 OEA Note: +In 6 V+ 5 Enable 4 Out The location of pin 1 on the OPA362 is determined by orienting the package marking as shown in the illustration. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 OPA362 www.ti.com ........................................................................................................................................................................................ SBOS480 – SEPTEMBER 2009 ELECTRICAL CHARACTERISTICS: VS = +2.5V to +3.3V Boldface limits apply over the temperature range, TA = –40°C to +125°C. At TA = +25°C and RL = 150Ω connected to ground, unless otherwise noted. OPA362 PARAMETER CONDITIONS MIN TYP MAX UNIT VS = +2.8V, VIN = GND –3 11 55 mV OFFSET LEVEL-SHIFT VOLTAGE Output Level-Shift Voltage (1) VOLS Over Temperature vs Power Supply PSRR VS = +2.5V to +3.3V 20 mV ±80 μV/V INPUT VOLTAGE RANGE Input Voltage Range (2) Input Resistance (+In) RSET Resistance VCM VS = 2.5V GND 0.42 V VS = 2.8V GND 0.48 V VS = 3.3V GND 0.55 V Ω RIN 776 872 968 RSET 3337 3750 4163 2 0.5 ΔVOUT/ΔVIN, VS = +2.5V, VINMIN = 0V, VINMAX = 0.42V 5.06 5.17 5.28 V/V ΔVOUT/ΔVIN, VS = +2.8V, VINMIN = 0V, VINMAX = 0.48V 5.06 5.17 5.28 V/V ΔVOUT/ΔVIN, VS = +3.3V, VINMIN = 0V, VINMAX = 0.55V 5.06 5.17 5.28 V/V Matching of RIN and RSET Ω % VOLTAGE GAIN FREQUENCY RESPONSE Filter Response Cutoff Frequency f−3dB 8.5 MHz Normalized Gain: fIN = 4.5MHz VO = 2VPP –1 dB fIN = 27MHz VO = 2VPP –18 dB fIN = 54MHz VO = 2VPP –25 dB Differential Gain Error RL = 150Ω 1.2 % Differential Phase Error RL = 150Ω 1.6 Degrees 100kHz, 4.5MHz 26 ns 100% White Signal 65 dB Group Delay Variation Signal-to-Noise Ratio SNR OUTPUT Positive Voltage Output Swing from Rail VS = +2.8V, VIN = 0.7V, RL = 150Ω to GND 130 250 mV Negative Voltage Output Swing from Rail VS = +2.8V, VIN = –0.05V, RL = 150Ω to GND 0.15 5 mV Positive Voltage Output Swing from Rail VS = +2.8V, VIN = 0.7V, RL = 75Ω to GND 260 Negative Voltage Output Swing from Rail VS = +2.8V, VIN = –0.05V, RL = 75Ω to GND 2 VS = +2.8V, Disabled, VO = 2V 0.1 VS = +2.8V ±80 Output Leakage Output Current (3) IO mV mV 100 nA mA POWER SUPPLY Specified Voltage Range Quiescent Current Over Temperature (1) (2) (3) VS IQ 2.5 VS = +2.8V, Enabled, IO = 0, VOUT = 1.4V Specified Temperature Range 4.3 3.3 V 7.5 mA 9 mA Output-referred. Limited by output swing and internal G = 5.2V/V. See typical characteristic graph, Output Voltage Swing vs Output Current. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 3 OPA362 SBOS480 – SEPTEMBER 2009 ........................................................................................................................................................................................ www.ti.com ELECTRICAL CHARACTERISTICS: VS = +2.5V to +3.3V (continued) Boldface limits apply over the temperature range, TA = –40°C to +125°C. At TA = +25°C and RL = 150Ω connected to ground, unless otherwise noted. OPA362 PARAMETER CONDITIONS MIN TYP MAX UNIT 0.5 V ENABLE/SHUTDOWN FUNCTION Disabled (logic-LOW threshold) 0 Enabled (logic-HIGH threshold) 1.3 Enable Time VS Disable Time Shutdown Current VS = +2.8V, Disabled V μs 1.5 50 ns 1.5 μA TEMPERATURE RANGE Specified/Operating Range Thermal Resistance –40 SC70 4 +125 °C θ JA 250 Submit Documentation Feedback °C/W Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 OPA362 www.ti.com ........................................................................................................................................................................................ SBOS480 – SEPTEMBER 2009 TYPICAL CHARACTERISTICS At TA = +25°C, VS = 2.8V, and RL = 150Ω, unless otherwise noted. RIN vs TEMPERATURE RSET vs TEMPERATURE 4000 920 3950 900 3900 RSET (W) RIN (W) 880 860 840 3850 3800 3750 3700 820 3650 800 -50 -25 0 25 75 50 100 125 3600 -50 150 0 -25 Temperature (°C) Figure 1. 50 75 125 150 GAIN vs TEMPERATURE 5.5 4.7 5.4 4.6 5.3 4.5 5.2 Gain (V/V) 4.8 4.4 4.3 4.2 5.1 5.0 4.9 4.1 4.8 4.0 4.7 3.9 4.6 4.5 3.8 -50 -25 0 25 50 75 100 125 150 -50 -25 0 Temperature (°C) 25 50 75 100 125 150 Temperature (°C) Figure 3. Figure 4. OUTPUT VOLTAGE vs TEMPERATURE OUTPUT VOLTAGE vs TEMPERATURE 0.005 2.80 VIN = 700mV VIN = -50mV 2.75 Output Voltage (V) 0.004 Output Voltage (V) 100 Figure 2. RSET/RIN RATIO vs TEMPERATURE RSET/RIN Ratio 25 Temperature (°C) 0.003 0.002 0.001 2.70 2.65 2.60 2.55 0 -50 -25 0 25 50 75 100 125 150 2.50 -50 Temperature (°C) -25 0 25 50 75 100 125 150 Temperature (°C) Figure 5. Figure 6. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 5 OPA362 SBOS480 – SEPTEMBER 2009 ........................................................................................................................................................................................ www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 2.8V, and RL = 150Ω, unless otherwise noted. VOUT LEVEL SHIFT vs TEMPERATURE 0.05 QUIESCENT CURRENT vs TEMPERATURE 7.0 VIN = 0V 6.5 Quiescent Current (mA) VOUT Level Shift (V) 0.04 0.03 0.02 0.01 0 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 -0.01 -50 -25 0 25 50 75 100 125 2.0 -50 150 0 -25 Figure 7. Enable = 0V VPULLUP = 2.0V 10000 1000 100 10 1 -50 150 100 80 60 40 20 0 -25 0 25 50 75 100 125 150 0 0.5 1.0 AC Response (dB) 10 0.65 0.70 0.75 0.80 2.5 3.0 AC RESPONSE AT VARIOUS TEMPERATURES -40°C 0°C +25°C +85°C +125°C 100 2.0 Figure 10. 10000 1000 1.5 VPULLUP (V) SHUTDOWN QUIESCENT CURRENT HYSTERESIS vs TEMPERATURE Current (mA) 125 Enable = 0V Figure 9. 0.85 0.90 0.95 1.0 3 0 -3 -6 -9 -12 -15 -18 -21 -24 -27 -30 -33 -36 100k -55°C -40°C -25°C 0°C +25°C +55°C +85°C +125°C +140°C +150°C 1M +150°C 10M 100M Frequency (Hz) VENABLE (V) Figure 11. 6 100 120 Temperature (°C) 1 0.60 75 OUTPUT LEAKAGE IN SHUTDOWN 140 Output Leakage Current (pA) Output Leakage Current (pA) 100000 50 Figure 8. OUTPUT LEAKAGE CURRENT vs TEMPERATURE 1000000 25 Temperature (°C) Temperature (°C) Figure 12. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 OPA362 www.ti.com ........................................................................................................................................................................................ SBOS480 – SEPTEMBER 2009 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 2.8V, and RL = 150Ω, unless otherwise noted. TURN-OFF TIME Voltage (500mV/div) Voltage (500mV/div) TURN-ON TIME Time (1ms/div) Time (25ns/div) Figure 13. Figure 14. OUTPUT VOLTAGE vs OUTPUT CURRENT GROUP DELAY vs FREQUENCY 40 3.0 35 2.5 Group Delay (ns) 30 VOUT (V) 2.0 1.5 1.0 +125°C 0.5 +85°C +25°C 0°C 25 20 15 10 -25°C -40°C 5 0 100k 0.15 0.13 0.14 0.11 0.12 0.09 0.10 0.07 0.08 0.05 0.06 0.03 0.04 0.02 0 0.01 0 1M 10M 100M Frequency (Hz) IOUT (A) Figure 15. Figure 16. DIFFERENTIAL GAIN AND PHASE DIFFERENTIAL GAIN INP = A - C SYNC = INT -5 DG1 -0.6 %1 DG2 -1.0 %. DG3 -1.1 %. DG4 -1.2 %. DG5 -0.8 %5 STEPS 4 5 DIFFERENTIAL PHASE INP = A - C SYNC = INT -5 DP1 1.1 dg1 DP2 1.6 dg. DP3 1.6 dg. DP4 1.5 dg. DP5 1.1 dg5 STEPS 4 5 MTIME = 10s 0 0 ZOOM 1 2 MTIME = 10s 0 0 ZOOM 1 2 LINE = 330 +5 MODE 1 LINE = 330 +5 MODE 1 Figure 17. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 7 OPA362 SBOS480 – SEPTEMBER 2009 ........................................................................................................................................................................................ www.ti.com APPLICATION INFORMATION The OPA362 video amplifier has been optimized to fit seamlessly with Texas Instruments’ OMAP343x multimedia processor. The following features have been integrated to provide excellent video performance: • Internal gain setting resistors (G = 5.2V/V) reduce the number of external components needed in the video circuit. • Integration of the 872Ω video encoder load resistor and 3750Ω RSET resistor used by the OMAP343x helps minimize the number of external components and also ensures excellent ratio and temperature tracking. This feature helps to keep the overall gain accurate and stable over temperature. • TV-detection support in connection with an OMAP343x multimedia processor. This feature helps to automate start/stop operation of the TV-out function and minimizes power • • • consumption. A two-pole filter is incorporated for DAC signal reconstruction. The OPA362 employs an internal level shift circuit that avoids sync pulse clipping and allows dc-coupled output. A shutdown feature reduces quiescent current to less than 1.5μA—crucial for portable applications. Although the OPA362 is optimized for the OMAP343x processor, it is also well-suited to interface with any digital media processor that outputs a video signal on the order of 0.4VPP to 0.5VPP. Figure 18 shows a typical application drawing with the OMAP343x processor and the TWL92230 Energy Management Chip. TWL92230 1.8V DAC Regulator VAUX 0.5V VREF V+ 2.8V OMAP3430 1.8V OPA362 Pull-up 10kW 10mV +In Video DAC Two-Pole Filter (4) Out 75W + 872W 75W RSET G = 5.2V/V 3750W Enable Shutdown Control TV Detect (See note 1) (3) GPIO GND GPIO (2) 100kW TV Detect (1) Closed when enabled during normal operation; open when shut down. (2) Protects GPIO against overvoltage conditions during active video transmission. (3) GPIO must be able to generate an interrupt. (4) External 75Ω resistor is necessary when driving 75Ω terminated loads. Figure 18. Typical Application Using the OMAP343x and the TWL92230 8 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 OPA362 www.ti.com ........................................................................................................................................................................................ SBOS480 – SEPTEMBER 2009 Operating Voltage Enable pin enables the op amp. The logic levels are compatible with 1.8V CMOS logic levels. A valid logic high is defined as greater than 1.3V above GND. A valid logic low is defined as less than 0.5V above GND. If the Enable pin is not connected, internal pull-up circuitry enables the amplifier. The OPA362 is fully specified from 2.5V to 3.3V over a temperature range of –40°C to +125°C. Parameters that vary significantly with operating voltages or temperature are shown in the Typical Characteristics. Power-supply pins should be bypassed with 100nF ceramic capacitors. When disabling the OPA362, internal circuitry also disconnects the internal gain setting feedback. This feature supports the TV-detection function; see the TV-Detect Function section for more detailed information. Input Voltage The input common-mode range of the OPA362 series extends from GND to 0.55V on a 3.3V supply. The input range is limited by the internal gain in conjunction with the maximum output swing capability and the power-supply voltage. Internal Two-Pole Filter The OPA362 filter is a Sallen-Key topology with an 8.5MHz cutoff frequency. Figure 19 shows a detailed drawing of the filter components. This filter allows video signals to pass without any visible distortion, as shown in Figure 20 through Figure 23. The video encoder embedded in the OMAP343x processor typically samples at 54MHz. At this frequency, the attenuation is typically 23dB, which effectively attenuates the sampling aliases. Input Overvoltage Protection All OPA362 pins are static-protected with internal ESD protection diodes connected to the supplies. These diodes provide input overdrive protection if the current is externally limited to 10mA. Enable/Shutdown The internal 872Ω resistor on the input to GND converts the output current of the OMAP3430 internal video DAC into a voltage. It is also part of the Sallen-Key filter. Using an external resistor to adjust the input voltage range also changes the filter characteristics. The OPA362 has a shutdown feature that disables the output and reduces the quiescent current to less than 1.5μA. This feature is especially useful for portable video applications, where the device is infrequently connected to a television (TV) or other video device. The Enable logic input voltage is referenced to the OPA362 GND pin. A logic level high applied to the 3.6pF OPA362 1838W ( Television 2.5kW ) VO 872W 75W 12.5pF 75W 4.22kW 1kW Figure 19. OPA362 Filter Structure Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 9 OPA362 SBOS480 – SEPTEMBER 2009 ........................................................................................................................................................................................ www.ti.com Video Performance The color bar signal in Figure 20 shows excellent amplitude characteristics and no attenuation of colors with respect to the luminance signal. D: 2.02V @: 30.0mV The multiburst test patterns have different sine-wave burst sections with the following frequencies: 0.5MHz, 1MHz, 2MHz, 4MHz, 4.8MHz and 5.8MHz with 420mVPP. There is no visible attenuation even at the highest frequencies, which indicates a very flat frequency response of the OPA362. As shown in Figure 22 and Figure 23, the top line illustrates the full signal and the bottom line is a more detailed view of the last three sine wave bursts. Figure 20. 100/75 Color Bar Signal at OPA362 Output The CCIR330/5 test pattern requires one of the greatest dynamic ranges, and therefore tests the OPA362 output voltage swing capability. The scope plot shown in Figure 21 has been taken with a 2.8V supply and shows no clipping on the top side of the signal. D: 2.30V @2.31mV Figure 22. Multiburst Signal (CCIR 18/1) Shows Very Flat Frequency Response The CCIR17 test pattern contains a 2T and a 20T pulse, as shown in Figure 23. The 2T pulse is used to check for pulse distortion and reflection, and the 20T pulse is used to check for amplitude and group delay between chrominance and luminance. Neither pulse exhibits any distortion or group delay artifacts. Figure 21. CCIR330/5: No Clipping, Even on 2.8V Supply Figure 23. CCIR 17 2T and 20T Pulses Show Little Distortion 10 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 OPA362 www.ti.com ........................................................................................................................................................................................ SBOS480 – SEPTEMBER 2009 Internal Level Shift Many common video DACs embedded in digital media processors, such as the OMAP343x processors from Texas Instruments, operate on a single supply (no negative supply). Typically, the lowest point of the sync pulse output by these video DACs is close to 0V. With a 0V input, the output of a common single-supply op amp saturates at a voltage greater than 0V. This effect would clip the sync pulse, and therefore degrade the video signal integrity. The OPA362 employs an internal level shift circuit to avoid clipping. The input signal is typically shifted by approximately 11mV. This shift is well within the linear output voltage range of the OPA362 with a standard 150Ω video load. vertical sync pulse. For the detection, a simple pull-up resistor to the processor logic supply is used on the output of the OPA362. The voltage level is pulled low if the TV (or other video equipment) is connected, or high if nothing is connected. A GPIO in the processor can be used to read this logic level and decide if a video load is connected. Figure 25 shows a scope plot with the TV disconnected and Figure 26 shows a scope plot with the TV connected; the upper line in both figures is the disable pulse. See Figure 27 for a circuit drawing that shows how to use the TV-detect signal to disable or enable the OPA362. OPA362 Disable Pulse D: 1.84V @: 1.84V Output Swing Capability Figure 24 shows the true output swing capability of the OPA362 by taking the tip of the input sync pulse to a slightly negative voltage. Even when the output sync tip is at 3mV, the output after the 75Ω series termination continues to show no clipping of the sync pulse. OPA362 Ouput Pulled HIGH; No Video Load Connected Equalization Pulses D: 305mV @: 3.00mV 1st Vertical Sync Pulse Vertical Sync Pulses Figure 25. Output of OPA362 Pulled Up to 1.8V During Disable: TV Disconnected OPA362 Disable Pulse OPA362 Output Pulled LOW Because of Video Load Figure 24. No Clipping of the Sync Pulse TV-Detect Function Equalization Pulses The TV-detection feature of the OPA362 works in conjunction with the OMAP343x (or other processor) to detect if a television is connected to the video output of the device. In order to detect a TV load, the OPA362 is briefly turned off, ideally during the first First Vertical Sync Pulse Vertical Sync Pulses Figure 26. Output of OPA362 Pulled Down: TV Connected Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 11 OPA362 SBOS480 – SEPTEMBER 2009 ........................................................................................................................................................................................ www.ti.com TWL92230 1.8V DAC 0.5V VREF Regulator VAUX V+ 2.5V or 2.8V OMAP3430 1.8V OPA362 Pull-up 10kW 10mV +In Video DAC Two-Pole Filter Out 75W + 872W 75W RSET G = 5.2V/V 3750W Enable TV Detect Shutdown Control (See note 1) (3) GPIO GND GPIO (2) 100kW TV Detect (1) Closed when enabled during normal operation; open when shut down. (2) Protects GPIO against overvoltage conditions during active video transmission. (3) GPIO must be able to generate interrupt. Figure 27. Using TV-Detect Signal to Disable/Enable the OPA362 Disabling the OPA362 also disconnects the internal feedback resistor path to GND, and therefore there is no current flowing from the logic supply through the pull-up resistor to GND if no video load is connected; this architecture helps to conserve battery life. The typical leakage when the output is pulled high and OPA362 is disabled is approximately 300pA. The following functionality can be achieved by implementing TV-detection: 12 • • Automatic video start by polling the video line periodically. Automatic video stop if the TV (or other equipment) is disconnected. Proper implementation allows to significantly simplify the user interface. For more information, see Application Report SBOA109, OPA361 and TV Detection, available for download at www.ti.com. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): OPA362 PACKAGE OPTION ADDENDUM www.ti.com 5-Oct-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty OPA362AIDCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA362AIDCKT ACTIVE SC70 DCK 6 250 CU NIPDAU Level-2-260C-1 YEAR Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Oct-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant OPA362AIDCKR SC70 DCK 6 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 OPA362AIDCKT SC70 DCK 6 250 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Oct-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA362AIDCKR SC70 DCK 6 3000 195.0 200.0 45.0 OPA362AIDCKT SC70 DCK 6 250 195.0 200.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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