TI SN74ALS2541N

SN74ALS2541
OCTAL LINE DRIVER/MOS DRIVER
WITH 3-STATE OUTPUTS
SDAS273 – DECEMBER 1994
•
•
•
•
DW OR N PACKAGE
(TOP VIEW)
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
pnp Inputs Reduce dc Loading
Outputs Have 25-Ω Series Resistor
So No External Resistors Are Required
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (N) 300-mil DIPs
OE1
A1
A2
A3
A4
A5
A6
A7
A8
GND
description
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
VCC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
12
This octal line driver/MOS driver is designed to
10
11
drive the capacitive input characteristics of MOS
devices and to have the performance of the
popular SN74ALS240 series. At the same time, this device offers a pinout with inputs and outputs on opposite
sides of the package. This arrangement greatly facilitates printed-circuit-board layout.
The 3-state output-control gate is a 2-input NOR. If either output-enable (OE1 or OE2) input is high, all eight
outputs are in the high-impedance state.
The SN74ALS2541 provides true data at the outputs.
The SN74ALS2541 is characterized for operation from 0°C to 70°C.
logic symbol†
&
1
OE1
19
EN
OE2
A1
A2
A3
A4
A5
A6
A7
A8
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
Y1
Y3
Y3
Y4
Y5
Y6
Y7
Y8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Copyright  1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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• DALLAS, TEXAS 75265
1
SN74ALS2541
OCTAL LINE DRIVER/MOS DRIVER
WITH 3-STATE OUTPUTS
SDAS273 – DECEMBER 1994
logic diagram (positive logic)
1
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
All output resistors are 25 Ω.
absolute maximum rating over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
High-level output current
– 0.4
mA
IOL
TA
Low-level output current
12
mA
70
°C
2
High-level input voltage
2
V
0.8
Operating free-air temperature
0
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
V
V
SN74ALS2541
OCTAL LINE DRIVER/MOS DRIVER
WITH 3-STATE OUTPUTS
SDAS273 – DECEMBER 1994
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
MIN
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = –18 mA
IOH = – 0.4 mA
VOL
VCC = 4
4.5
5V
IOL = 1 mA
IOL = 12 mA
IOZH
IOZL
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.7 V
VO = 0.4 V
IOH
IOL
VCC = 4.5 V,
VCC = 4.5 V,
VO = 2 V
VO = 2 V
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IO‡
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.4 V
VO = 2.25 V
ICC
VCC = 5.5 V
TYP †
MAX
UNIT
–1.2
V
VCC – 2
V
0.15
0.5
0.35
0.8
V
20
µA
– 20
µA
–15
mA
30
mA
0.1
–15
20
µA
– 0.1
mA
–70
mA
Outputs high
6
14
Outputs low
15
25
13.5
22
Outputs disabled
mA
mA
† All typical values are VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX§
MIN
MAX
2
15
2
12
5
15
8
20
1
10
2
12
UNIT
ns
ns
ns
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
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3
SN74ALS2541
OCTAL LINE DRIVER/MOS DRIVER
WITH 3-STATE OUTPUTS
SDAS273 – DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V
RL = R1 = R2
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
Data
Input
tw
th
tsu
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
[3.5 V
1.3 V
tPHZ
tPZH
Waveform 2
S1 Open
(see Note B)
1.3 V
VOL
0.3 V
VOH
1.3 V
0.3 V
[0 V
3.5 V
1.3 V
Input
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
4
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