LSI/CSI UL LS7223 LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405 ® A3800 KEYPAD PROGRAMMABLE DIGITAL LOCK V SS (-V) 1 RC-OSC 2 19 CAP-K X1 3 18 LOCK DISPLAY X2 4 17 X3 5 X4 6 15 ALARM Y1 7 14 MOM Y2 8 13 TAMPER Y3 9 12 CAP-M Y4 10 20 V DD (+V) LS7223 GENERAL DESCRIPTION: The LS7223 is a programmable electronic lock implemented in a monolithic CMOS integrated circuit. The circuit contains all the necessary memory, decoder and control logic to make a programmable "keyless" lock system to control electromechanical locks. Input is provided by a matrix keypad whose maximum allowable size is 4 x 4. CONNECTION DIAGRAM - TOP VIEW LSI FEATURES: • Stand alone lock logic • 38416, 4-digit combinations • 3 different user programmable codes • Momentary and static lock control outputs • Internal key debounce circuit • Tamper detection output • Status outputs • Low current consumption • +4V to +15V operation (VDD -VSS) • LS7223 (DIP), LS7223-S (SOIC) - See Figure 1 December 2002 LOCK 1 16 LOCK 2 11 PROGRAM FIGURE 1 The LS7223 can be programmed to recognize 3 different codes: one to toggle an output and generate a pulse (Primary), one to toggle an output (Secondary), and one to toggle an output and trigger an alarm (Duress). Programming 2. The Secondary code, when entered from the keypad, causes the Lock 2 output to toggle. The first 3 is done via the keypad inputs. Any entry from the keypad digits of the Secondary code must be identical to the (when not in the program mode) which does not match one of first 3 digits of the Primary code; the 4th digit may or the 3 programmed codes causes the Tamper output to may not be identical for the two codes. When the become active. two codes are the same in all 4 digits, the entry of the code will cause both the Lock 1 and the Lock 2 The monolithic, low power CMOS design of the LS7223 outputs to toggle. Whenever power is first applied enables it to be designed into typical battery backed-up and to the LS7223, the circuit defaults to the Secondary automotive type security systems. code corresponding to the keys X1 Y1, X1 Y2, X2 Y2, X1 Y1. The code can then be altered by DETAILED DESCRIPTION: entering the Program mode. CODES - There are 3 different function codes which the LS7223 can store in memory. Each code consists of a 4 digit number which must be entered in exact sequence and before 3. The Duress code, when entered from the keypad, causes the Lock 1 output to toggle; at the same time the keypad entry enable time expires. The 3 codes and their the Alarm output will latch high to enable an external functions are explained below. alarm. The first 3 digits of the Duress code must be identical to the first 3 digits of the Primary and 1. The Primary code, when entered from the keypad, causes Secondary codes; the 4th digit must be different to the Lock 1 output to toggle and the Momentary output to activate the Alarm output. Whenever power is first momentarily go high. Whenever power is first applied to applied to the LS7223, the circuit defaults to the the LS7223, the circuit defaults to the Primary code Duress code corresponding to the keys X1 Y1, X1 corresponding to the keys X1 Y1, X1 Y2, X2 Y2, X2 Y1. Y2, X2 Y2, X1 Y2. The code can then be altered The code can then be altered to any other 4 digit code by the same way as the other two codes. entering the Program mode and keying in the new code. 7223-121102-1 PROGRAM MODE The current Primary/Secondary/Duress codes may be altered to any value by initializing the Program Mode. The steps involved for altering the codes are: 1. Enter the current Secondary code causing the Lock 2 output to toggle. 2. Before the keypad entry enable time expires, enter the key corresponding to matrix position X4 Y1 two times. This will cause the Program Mode output to latch high, indicating that the circuit is now in the Program mode. The keypad entry enable timer is disabled during the Program mode. 3. Enter a 6-digit number from the keypad. The Program Mode output will latch low, indicating that the new codes have successfully been programmed. Of the 6 digits, the first 4 constitute the Primary code; the first 3 and the 5th constitute the Secondary code and the first 3 and the 6th constitute the Duress code. If an error is introduced or it is desired to change the codes before the 6th digit is typed, enter the key X4 Y3. This will reset the internal memory pointer of the LS7223 and a new 6-digit number can be entered. KEYPAD INTERFACE The four X inputs and four Y outputs are designed for keypad interface (see Fig. 2). Since the X inputs have internal pull-ups, the maximum matrix size of 4 by 4 does not have to be utilized. During normal operation, the LS7223 will scan the matrix looking for a switch closure. Once a closure has been detected, the internal key debounce logic determines if a "valid" key has been pressed or that if noise is just present. Only one valid input will be generated with any key closure. The use of internal key debouncing and Schmitt triggers on the inputs provides the LS7223 with very high noise immunity. TAMPER When a valid key has been detected by the LS7223, the entry is compared against the appropriate reference in the internal memory. If the requirements of digit value and code sequential position are not fulfilled, the Tamper output will momentarily go high; this indicates that an illegal code entry was attempted. The keypad entry enable timer and memory pointer will both be reset so that entry of the code can be attempted again. TABLE 1. PIN DESCRIPTIONS PIN 1 FUNCTION Vss 2 RC-OSC DESCRIPTION Supply voltage negative. Determines the LS7223's internal clock frequency, which is used for keypad scanning and debounce. A resistor (to VDD) and a capacitor (to Vss) connected to this input sets the frequency. With a 1.5MΩ resistor and a 100pF capacitor, the internal frequency is typically 10KHz and the internal anti-bounce is typically 25ms. 3, 4, 5, 6 X1, X2, X3, X4 The four X inputs and four Y outputs are designed to interface to a keypad matrix 7, 8, 9, 10 Y1, Y2, Y3, Y4 whose maximum allowable size is 4 by 4. 11 PROGRAM MODE This output goes high when the program mode is initiated. It resets to a low state after the 6digit Primary/Secondary/Duress combination code has been programmed. 12 CAP-M A capacitor connected between this input and Vss controls the duration of the Momentary and Tamper outputs. 13 TAMPER 14 MOMEMTARY 15 ALARM Whenever a key is entered that is not a valid code element, this output goes high for a period determined by the capacitor on the CAP-M input. This output generates an active high output every time the Primary code is entered. The duration of this output is determined by the capacitor on the CAP-M input. When the Duress code is entered, this output latches high to enable an external alarm. The Alarm output resets to a low state when the Primary code is entered again. This output powers-up to a low state. 16 LOCK 2 17 LOCK1 18 LOCK STATUS Whenever the Secondary code is entered, this output toggles. The output powers-up into a low state. When ever the Primary code or the Duress code is entered, this output toggles. The output powers-up into a low state. Functionally, this output is identical to the Lock 1 output, with the exception that its polarity is reversed with respect to the Lock 1 output. This output is intended for driving a display lamp to indicate the lock status. 19 CAP-K 20 VDD A capacitor connected between this input and Vss sets the time limit for entering a 4 digit code from the keypad. (6 digits when initiating the Program Mode.) 7223-013001-2 Supply voltage positive. Quiescent supply current: (100pF capacitor to Vss and 1.5MΩ resistor to VDD, connected to the RC-OSC input) SYMBOL VDD MAX UNIT IDD 5V 15 µA IDD 9V 25 µA IDD 12V 30 µA MAXIMUM RATINGS: (Voltages references to Vss) RATING SYMBOL DC supply voltage VDD Operating temperature range TA Storage temperature TSTG VALUE +4 to +18 -25 to +70 -65 to +150 UNIT V °C °C DC Electrical Characteristics: (Vss = 0V, VDD = +4V to +15V, = 25°C ≤ TA ≤ +70°C unless otherwise specified) PARAMETER CONDITIONS VDD MIN Output source current Logic 1 Output 5V 1.50 Momentary, Alarm, Lock 1, VOUT ≥ VDD - 2V 12V 5.60 Lock 2, Program Mode Outputs 15V 7.25 TYP 2.50 8.25 10.7 MAX - UNIT mA mA mA Output Sink Current Momentary, Alarm, Lock 1, Lock 2, Program Mode Outputs Logic 0 Output VOUT ≤ Vss + 0.4V 5V 12V 15V .400 1.20 1.50 .60 1.70 2.25 - mA mA mA Output Source Current Tamper Output Logic 1 Output VOUT ≥ VDD - 2V 5V 12V 15V .25 .90 1.10 .400 1.30 1.70 - mA mA mA Output Sink Current Tamper Output Logic 0 Output VOUT ≤ Vss + 0.4V 5V 12V 15V .060 .200 .250 .100 .290 .370 - mA mA mA Input Level Detection All Inputs VIH = Logic 1 5V 12V 15V 3.5 8.0 10.0 - VDD VDD VDD V V V VIL = Logic 0 5V 12V 15V Vss Vss Vss - 1.6 4.0 5.0 V V V FIGURE 4. FIGURE 3. LS7223 PULSE WIDTH ON MOMENTARY AND TAMPER OUTPUTS vs. CAPACITOR ON CAP-M INPUT KEYPAD ENTRY TIME vs. CAPACITOR ON CAP-K INPUT 10-5 5.0 D VD 2.0 1.0 V DD 0 1 2 3 4 V 12 = D -9 10 V = 5V D 2V = 1 5 10 -10 6 7 8 ENTRY TIME IN SECONDS 7223-013001-3 10-8 D 9V = -7 10 D 5V D D = 3.0 V CAPACITANCE IN µF 4.0 10-6 V CAPACITANCE IN FARADS V DD 9 10 10-6 10 -5 10-4 10-3 10 -2 PULSE WIDTH TIME IN SECONDS 10 -1 = 9V LOCK #1 TO MASTER ALARM SYSTEM CONTROLLER LOCK #2 LOCK INDICATOR PROGRAM MODE INDICATOR 11 12 CAP-M PROGRAM 13 TAMPER MOM 14 15 ALARM LOCK 2 16 17 LOCK 1 19 LOCK DISPLAY18 CAP-K V DD 20 +V R R R Y2 Y3 8 9 10 Y4 Y1 7 6 X4 5 X3 X2 4 3 X1 RC-0SC 2 1 Vss LS7223 R * # Ø X4 +V 7 8 9 X3 SEE NOTE 3 4 5 6 X2 1 2 3 X1 FIGURE 2. Typical Application Y1 Y2 Y3 Y4 NOTES: 1. Keypad is typical 4 x 3 matrix type. Switch resistance should be ≤ 1kΩ. 2. Configuration shown is typical. The outputs of the LS7223 are functionally designed to provide either status or display information. 3. Resistors may be added in series with X inputs to provide protection against ESD from the keypad. R = 10kΩ, 1/4 W 7223-013001-4