MAXWELL 54LVTH162245RPFB

54LVTH162245
16-Bit Bus Transceivers with
3-State Outputs
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Memory
Logic Diagram
FEATURES:
DESCRIPTION:
• A-Port outputs have equivalent 22-Ω series resistors, so
no external resistors are required
• Support mixed-mode signal operation (5V input and output
voltages with 3.3V VCC)
• Support unregulated battery operation down to 2.7V
• Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V,
TA = 25° C
• IOFF and power-up 3-state support hot insertion
• Bus hold on data inputs eliminates the need for external
pullup/pulldown resistors
• Distributed VCC and GND pin configuration minimizes highspeed switching noise
• Flow-through architecture optimizes PCB layout
• Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Package: 48 pin RAD-PAK® flat pack
Maxwell Technologies’ 54LVTH162245 devices are 16-bit
(dual-octal) non-inverting 3-state transceivers designed for
low-voltage (3.3V) VCC operation, but with the capability to
provide a TTL interface to a 5V system environment. These
devices can be used as two 8-bit transceivers or one 16-bit
transceiver. The devices allow data transmission from the A
bus to the B bus or form the B bus to the A bus, depending on
the logic level at the direction-control (DIR) input. The output
enable (OE) input can be used to disable the device so that
the buses are effectively isolated. The A-port outputs, which
are designed to source or sink up to 12 mA, include equivalent
22-Ω series resistors to reduce overshoot and undershoot.
Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, RAD-PAK provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
11.15.02 Rev 2
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
All data sheets are subject to change without notice
1
©2002 Maxwell Technologies
All rights reserved.
54LVTH162245
16-Bit Bus Transceivers with 3-State Outputs
.
TABLE 1. PINOUT DESCRIPTION
PIN
SYMBOL
DESCRIPTION
1, 24
1DIR - 2DIR
2, 3, 5, 6, 8, 9, 11, 12
1B1 - 1B8
Output
4, 10, 15, 21, 28, 34, 39, 45
GND
Ground
7, 18, 31, 42
VCC
Supply Voltage
13, 14, 16, 17, 19, 20, 22, 23
2B - 2B8
25, 48
2OE - 1OE
Output Enable
26, 27, 29, 30, 32, 33, 35, 36
2A8 - 2A1
Input
37, 38, 40, 41, 43, 44, 46, 47
1A8 - 1A1
Input
Direction Control
Output
PARAMETER
SYMBOL
MIN
MAX
UNIT
VCC
-0.5
4.6
V
VI
-0.5
7
V
Voltage range applied to any output in the high-impedance or
power-off state 2
VO
-0.5
7
V
Voltage range applied to any output in the high state 2
VO
-0.5
VCC + 0.5
V
Current into any output in the low state
B Port
A Port
IO
---
96
30
Current into any output in the high state 3
B Port
A Port
IO
---
48
30
Supply voltage range
Input voltage range
2
mA
mA
Input clamp current
IIK (VI < 0)
-50
--
Output clamp current
IOK (VO < 0)
-50
--
mA
mA
ΘJC
--
5
° C/W
Operating temperature range
TA
-55
125
°C
Storage temperature range
TS
-65
150
°C
Power Dissipation
PD
--
1
W
Thermal resistance
Memory
TABLE 2. 54LVTH162245 ABSOLUTE MAXIMUM RATINGS 1
1. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. This current flows only when the output is in the high state and VO > VCC.
11.15.02 Rev 2
All data sheets are subject to change without notice
2
©2002 Maxwell Technologies
All rights reserved.
54LVTH162245
16-Bit Bus Transceivers with 3-State Outputs
TABLE 3. DELTA LIMITS
PARAMETER
VARIATION
ICC(OL)
±10% of specified value in Table 5
ICC(OH)
±10% of specified value in Table 5
ICC(OD)
±10% of specified value in Table 5
TABLE 4. 54LVTH162245 RECOMMENDED OPERATING CONDITIONS 1
PARAMETER
MIN
MAX
UNIT
Supply voltage
VCC
2.7
3.6
V
High-level input voltage
VIH
2
--
V
Low-level input voltage
VIL
--
0.8
V
Input voltage
VI
--
5.5
V
IOH
--
-12
mA
--
-24
--
12
--
48
∆t/∆v
--
10
ns/V
∆t/∆VCC
200
--
µ s/V
TA
-55
125
°C
High-level output current
A port
B port
Low-level output current
A port
IOL
B port
Input transition rise or fall rate
Outputs
enabled
Power-up ramp rate
Operating temperature
Memory
SYMBOL
mA
1. All unused control inputs of the device must be held at high or low ensure proper device operation.
TABLE 5. 54LVTH162245 DC ELECTRICAL CHARACTERISTICS
(VCC = 3.3V ±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED)
PARAMETER
SYMBOL
Input Clamp Voltage
VIK
VCC = 2.7
High-Level Output
Voltage
VOH
VCC = 2.7V to
3.6V
IOH = -100 µ A
VCC = 3V
IOH = -12 mA
VCC = 2.7V to
3.6V
IOH = -100 µ A
TEST CONDITIONS
II = -18 mA
A Port
B Port
SUBGROUPS
MIN
MAX
UNIT
1, 2, 3
--
-1.2
V
1, 2, 3
VCC -0.2
--
V
2
--
VCC -0.2
--
1, 2, 3
VCC = 2.7V
IOH = -8 mA
2.4
VCC = 3V,
IOH = -24 mA
2
11.15.02 Rev 2
All data sheets are subject to change without notice
3
©2002 Maxwell Technologies
All rights reserved.
54LVTH162245
16-Bit Bus Transceivers with 3-State Outputs
TABLE 5. 54LVTH162245 DC ELECTRICAL CHARACTERISTICS
(VCC = 3.3V ±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED)
PARAMETER
SYMBOL
Low-Level Output
Voltage
VOL
TEST CONDITIONS
II
MIN
MAX
UNIT
1, 2, 3
--
0.2
V
--
0.8
--
0.2
IOL = 24 mA
--
0.5
IOL = 16 mA
--
0.4
VCC = 2.7V to
3.6V
IOL = 100 µ A
VCC = 3V
IOL = 12 mA
VCC = 2.7V
IOL = 100 µ A
VCC = 3V
Input Current
SUBGROUPS
A Port
B Port
1, 2, 3
IOL = 32 mA
0.5
IOL = 48 mA
0.55
VI = VCC or GND
VCC = 0 or
3.6V
VI = 5.5V
VCC = 3.6V
VI = 5.5V
VI = VCC
Control
inputs
1, 2, 3
A or B
Ports
1, 2, 3
II(HOLD) VCC = 3V
VI = 0.8V
A Inputs
±1
--
10
--
20
µA
5
VI = 0
Hold Current
--
1, 2, 3
VI = 2V
--
-10
75
--
-75
--
µA
Power Up Current
IOZPU2
VCC = 0 to 1.5V, VO = 0.5V to 3V, OE = don’t care
1, 2, 3
--
±100
µA
Power Down Current
IOZPD2
VCC = 1.5V to 0, VO = 0.5V to 3V, OE = don’t care
1, 2, 3
--
±100
µA
VCC = 3.6V
Outputs
high
1, 2, 3
--
0.19
mA
IO = 0
Outputs
low
1, 2, 3
--
5
VI = VCC or GND
Outputs
disabled
1, 2, 3
--
0.19
∆ICC 1 VCC = 3V to 3.6V, One input at VCC -0.6V, Other
1, 2, 3
--
0.3
mA
Supply Current
Delta Supply Current
ICC
Memory
VCC = 3.6V
inputs at VCC or GND
Input Capacitance
CI2
VI = 3V or 0
1, 2, 3
--
8
pF
Input Output Capacitance
CO2
VO = 3V or 0
1, 2, 3
--
15
pF
1. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
2. Guaranteed by design.
11.15.02 Rev 2
All data sheets are subject to change without notice
4
©2002 Maxwell Technologies
All rights reserved.
54LVTH162245
16-Bit Bus Transceivers with 3-State Outputs
TABLE 6. 54LVTH162245 AC ELECTRICAL CHARACTERISTICS
(VCC = 3.3V ±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED)
SYMBOL
PARAMETER
Propagation Delay Time
A to B
VCC = 3.3V ± 0.3
VCC = 2.7V
UNIT
SUBGROUPS
MIN
MAX
MIN
MAX
9, 10, 11
1
3.5
--
4
tPHL
9, 10, 11
1
3.5
--
3.9
Propagation Delay Time
B to A
tPLH
9, 10, 11
1
4.3
--
5.3
tPHL
9, 10, 11
1
4.2
--
4.5
Output Enable Time
OE to B
tPZH
9, 10, 11
1
4.8
--
5.9
tPZL
9, 10, 11
1
4.8
--
5.5
Output Enable Time
OE to A
tPZH
9, 10, 11
1
5.5
--
7.2
tPZL
9, 10, 11
1
5.4
--
6.4
Output Disable Time
OE to B
tPHZ
9, 10, 11
1
5.5
--
5.8
tPLZ
9, 10, 11
1
5.5
--
5.8
Output Disable Time
OE to A
tPHZ
9, 10, 11
1
5.8
--
6.5
tPLZ
9, 10, 11
1
6.3
--
6.3
Output Skew
tsk(o)
9, 10, 11
--
--
--
--
ns
ns
ns
ns
ns
Memory
tPLH
ns
ns
TABLE 7. FUNTION TABLE
(EACH 8-BIT SECTION)
INPUTS
OPERATION
OE
DIR
L
L
B data to A bus
l
H
A data to B bus
H
X
Isolation
11.15.02 Rev 2
All data sheets are subject to change without notice
5
©2002 Maxwell Technologies
All rights reserved.
54LVTH162245
16-Bit Bus Transceivers with 3-State Outputs
FIGURE 1. LOAD CIRCUIT
Figure Note:
1. CL includes probe and jig capacitance.
PARAMETER MEASUREMENT INFORMATION
S1
tPLH/tPHL
Open
tPLZ/tPZL
6V
tPHZ/tPZH
GND
Memory
TEST
FIGURE 2. PULSE DURATION
FIGURE 3. SETUP AND HOLD TIMES
11.15.02 Rev 2
All data sheets are subject to change without notice
6
©2002 Maxwell Technologies
All rights reserved.
16-Bit Bus Transceivers with 3-State Outputs
54LVTH162245
FIGURE 4. PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS
FIGURE 5. ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING
Memory
Figure Note:
2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by
The output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by
the output control.
11.15.02 Rev 2
All data sheets are subject to change without notice
7
©2002 Maxwell Technologies
All rights reserved.
54LVTH162245
16-Bit Bus Transceivers with 3-State Outputs
48 LDFP
Memory
48 PIN RAD-PAK® FLAT PACKAGE
SYMBOL
DIMENSION
MIN
NOM
MAX
A
0.144
0.160
0.165
b
0.008
0.010
0.014
c
0.004
0.006
0.007
D
--
0.620
0.640
E
0.370
0.380
0.390
E1
--
--
0.410
E2
0.200
0.210
0.220
E3
0.075
0.085
--
e
0.025 BSC
L
0.275
0.285
0.295
Q
0.013
0.019
0.025
S1
0.005
0.018
--
N
48
Note: All dimensions in inches
11.15.02 Rev 2
All data sheets are subject to change without notice
8
©2002 Maxwell Technologies
All rights reserved.
16-Bit Bus Transceivers with 3-State Outputs
54LVTH162245
Important Notice:
These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies
functionality by testing key parameters either by 100% testing, sample testing or characterization.
The specifications presented within these data sheets represent the latest and most accurate information available to
date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no
responsibility for the use of this information.
Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems
without express written approval from Maxwell Technologies.
Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
Memory
11.15.02 Rev 2
All data sheets are subject to change without notice
9
©2002 Maxwell Technologies
All rights reserved.
54LVTH162245
16-Bit Bus Transceivers with 3-State Outputs
Product Ordering Options
Model Number
54LVTH162245 RP
F
X
Option Details
Feature
Monolithic
S = Maxwell Class S
B = Maxwell Class B
I = Industrial (testing @ -55°C,
+25°C, +125°C)
E = Engineering (testing @ +25°C)
Package
F = Flat Pack
Radiation Feature
RP = RAD-PAK® package
Base Product
Nomenclature
16-Bit Bus Transceivers with 3State Outputs
11.15.02 Rev 2
All data sheets are subject to change without notice
Memory
Screening Flow
10
©2002 Maxwell Technologies
All rights reserved.