CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com ® 2.4-GHz Bluetooth low energy System-on-Chip Check for Samples: CC2540F128, CC2540F256 FEATURES 1 • True Single-Chip BLE Solution: CC2540 Can Run Both Application and BLE Protocol Stack, Includes Peripherals to Interface With Wide Range of Sensors, Etc. • 6-mm × 6-mm Package • RF – Bluetooth low energy technology Compatible – Excellent Link Budget (up to 97 dB), Enabling Long-Range Applications Without External Front End – Accurate Digital Received Signal-Strength Indicator (RSSI) – Suitable for Systems Targeting Compliance With Worldwide Radio Frequency Regulations: ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan) • Layout – Few External Components – Reference Design Provided – 6-mm × 6-mm QFN40 Package • Low Power – Active Mode RX Down to 19.6 mA – Active Mode TX (–6 dBm): 24 mA – Power Mode 1 (3-μs Wake-Up): 235 μA – Power Mode 2 (Sleep Timer On): 0.9 μA – Power Mode 3 (External Interrupts): 0.4 μA – Wide Supply Voltage Range (2 V–3.6 V) – Full RAM and Register Retention in All Power Modes A • 23456 • • TPS62730 Compatible Low Power in Active Mode – RX Down to 15.8 mA (3 V Supply) – TX (-6 dBm): 18.6 mA (3 V Supply) A Microcontroller – High-Performance and Low-Power 8051 Microcontroller Core – In-System-Programmable Flash, 128 KB or 256 KB – 8-KB SRAM A Peripherals – 12-Bit ADC with Eight Channels and Configurable Resolution – Integrated High-Performance Op-Amp and Ultralow-Power Comparator – General-Purpose Timers (One 16-Bit, Two 8-Bit) – 21 General-Purpose I/O Pins (19× 4 mA, 2× 20 mA) – 32-kHz Sleep Timer With Capture – Two Powerful USARTs With Support for Several Serial Protocols – Full-Speed USB Interface – IR Generation Circuitry – Powerful Five-Channel DMA – AES Security Coprocessor – Battery Monitor and Temperature Sensor – Each CC2540 Contains a Unique 48-bit IEEE Address 1 2 3 4 5 6 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SmartRF is a trademark of Texas Instruments. Bluetooth is a registered trademark of Bluetooth SIG, Inc. Supported by IAR Embedded Workbench is a trademark of IAR Systems AB. ZigBee is a registered trademark of ZigBee Alliance. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com SOFTWARE FEATURES APPLICATIONS • • • • • • • Bluetooth v4.0 Compliant Protocol Stack for Single-Mode BLE Solution – Complete Power-Optimized Stack, Including Controller and Host – GAP – Central, Peripheral, Observer, or Broadcaster (Including Combination Roles) – ATT / GATT – Client and Server – SMP – AES-128 Encryption and Decryption – L2CAP – Sample Applications and Profiles – Generic Applications for GAP Central and Peripheral Roles – Proximity, Accelerometer, Simple Keys, and Battery GATT Services – Multiple Configuration options – Single-Chip Configuration, Allowing Application to Run on CC2540 – Network Processor Interface for Applications Running on an External Microcontroller – BTool – Windows PC Application for Evaluation, Development, and Test Development Tools – CC2540 Mini Development Kit – SmartRF™ Software – Supported by IAR Embedded Workbench™ Software for 8051 • • 2.4-GHz Bluetooth low energy Systems Mobile Phone Accessories Sports and Leisure Equipment Consumer Electronics Human Interface Devices (Keyboard, Mouse, Remote Control) USB Dongles Health Care and Medical CC2540 WITH TPS62730 • • • • • • • TPS62730 is a 2 MHz Step Down Converter with Bypass Mode Extends Application Run Time by up to 20% Reduced Current in TX and RX 30 nA Bypass Mode Current to Support Low Power Modes RF Performance Unchanged Small Package Allows for Small Solution Size CC2540 Controllable DESCRIPTION The CC2540 is a cost-effective, low-power, true system-on-chip (SoC) for Bluetooth low energy applications. It enables robust BLE master or slave nodes to be built with very low total bill-of-material costs. The CC2540 combines an excellent RF transceiver with an industry-standard enhanced 8051 MCU, in-system programmable flash memory, 8-KB RAM, and many other powerful supporting features and peripherals. The CC2540 is suitable for systems where very low power consumption is required. Very low-power sleep modes are available. Short transition times between operating modes further enable low power consumption. The CC2540 comes in two different versions: CC2540F128/F256, with 128 and 256 KB of flash memory, respectively. Combined with the Bluetooth low energy protocol stack from Texas Instruments, the CC2540F128/F256 forms the market’s most flexible and cost-effective single-mode Bluetooth low energy solution. 2 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com XOSC_Q2 32-MHz CRYSTAL OSC XOSC_Q1 P2_4 32.768-kHz CRYSTAL OSC P2_3 P2_2 HIGHSPEED RC-OSC DEBUG INTERFACE P2_1 DCOUPL POWER-ON RESET BROWN OUT CLOCK MUX and CALIBRATION SFR Bus RESET VDD (2 V–3.6 V) ON-CHIP VOLTAGE REGULATOR WATCHDOG TIMER RESET_N SLEEP TIMER 32-kHz RC-OSC POWER MANAGEMENT CONTROLLER P2_0 PDATA P1_7 P1_6 XRAM 8051 CPU CORE P1_5 IRAM P1_4 SFR RAM SRAM FLASH FLASH MEMORY ARBITRATOR P1_3 P1_2 DMA P1_1 UNIFIED P1_0 IRQ CTRL FLASH CTRL P0_7 P0_6 1 KB SRAM FIFOCTRL ANALOG COMPARATOR P0_5 Radio Arbiter P0_4 OP-AMP P0_2 AES ENCRYPTION AND DECRYPTION DS ADC AUDIO/DC RADIO REGISTERS Link Layer Engine SFR Bus P0_0 I/O CONTROLLER P0_1 SRAM DEMODULATOR SYNTH P0_3 MODULATOR USB_N USB USB_P RECEIVE USART 1 FREQUENCY SYNTHESIZER USART 0 TRANSMIT TIMER 1 (16-Bit) TIMER 2 (BLE LL TIMER) RF_P RF_N TIMER 3 (8-Bit) DIGITAL ANALOG TIMER 4 (8-Bit) MIXED B0301-05 Copyright © 2010–2011, Texas Instruments Incorporated 3 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS (1) Supply voltage All supply pins must have the same voltage Voltage on any digital pin MIN MAX –0.3 3.9 V –0.3 VDD + 0.3, ≤ 3.9 V Input RF level –40 (1) (2) 10 dBm 125 °C All pads, according to human-body model, JEDEC STD 22, method A114 2 kV According to charged-device model, JEDEC STD 22, method C101 750 V Storage temperature range ESD (2) UNIT Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. CAUTION: ESD sensitive device. Precautions should be used when handing the device in order to prevent permanent damage. RECOMMENDED OPERATING CONDITIONS MIN Operating ambient temperature range, TA MAX UNIT –40 85 °C 2 3.6 V Operating supply voltage ELECTRICAL CHARACTERISTICS Measured on Texas Instruments CC2540 EM reference design with TA = 25°C and VDD = 3 V PARAMETER Icore Iperi 4 Core current consumption Peripheral current consumption (Adds to core current Icore for each peripheral unit activated) TEST CONDITIONS MIN TYP MAX UNIT Power mode 1. Digital regulator on; 16-MHz RCOSC and 32-MHz crystal oscillator off; 32.768-kHz XOSC, POR, BOD and sleep timer active; RAM and register retention 235 Power mode 2. Digital regulator off; 16-MHz RCOSC and 32-MHz crystal oscillator off; 32.768-kHz XOSC, POR, and sleep timer active; RAM and register retention 0.9 Power mode 3. Digital regulator off; no clocks; POR active; RAM and register retention 0.4 Low MCU activity: 32-MHz XOSC running. No radio or peripherals. No flash access, no RAM access. 6.7 mA Timer 1. Timer running, 32-MHz XOSC used 90 μA Timer 2. Timer running, 32-MHz XOSC used 90 μA Timer 3. Timer running, 32-MHz XOSC used 60 μA Timer 4. Timer running, 32-MHz XOSC used 70 μA Sleep timer, including 32.753-kHz RCOSC 0.6 μA ADC, when converting 1.2 mA µA Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com GENERAL CHARACTERISTICS Measured on Texas Instruments CC2540 EM reference design with TA = 25°C and VDD = 3 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT WAKE-UP AND TIMING Power mode 1 → Active Digital regulator on, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of 16-MHz RCOSC 4 μs Power mode 2 or 3 → Active Digital regulator off, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of regulator and 16-MHz RCOSC 120 μs Crystal ESR = 16 Ω. Initially running on 16-MHz RCOSC, with 32-MHz XOSC OFF 410 μs With 32-MHz XOSC initially on 160 μs 150 μs Active → TX or RX RX/TX turnaround RADIO PART RF frequency range Programmable in 2-MHz steps Data rate and modulation format 1 Mbps, GFSK, 250 kHz deviation 2402 2480 MHz RF RECEIVE SECTION Measured on Texas Instruments CC2540 EM reference design with TA = 25°C, VDD = 3 V, fc = 2440 MHz 1 Mbps, GFSK, 250-kHz deviation, Bluetooth low energy mode, and 0.1% BER (1) TYP MAX UNIT Receiver sensitivity (2) PARAMETER High-gain mode –93 dBm (2) Standard mode –87 dBm 6 dBm –5 dB dB Receiver sensitivity TEST CONDITIONS MIN Saturation (3) Co-channel rejection (3) (3) ±1 MHz –5 Alternate-channel rejection (3) ±2 MHz 30 dB –30 dBm Adjacent-channel rejection Blocking (3) Frequency error tolerance (4) Symbol rate error tolerance Including both initial tolerance and drift (5) Conducted measurement with a 50-Ω single-ended load. Spurious emission. Only largest spurious Complies with EN 300 328, EN 300 440 class 2, FCC CFR47, emission stated within each band. Part 15 and ARIB STD-T-66 Current consumption (1) (2) (3) (4) (5) –250 250 kHz –80 80 ppm –75 RX mode, standard mode, no peripherals active, low MCU activity, MCU at 250 kHz 19.6 RX mode, high-gain mode, no peripherals active, low MCU activity, MCU at 250 kHz 22.1 dBm mA 0.1% BER maps to 30.8% PER The receiver sensitivity setting is programmable using a TI BLE stack vendor-specific API command. The default value is standard mode. Results based on standard gain mode Difference between center frequency of the received RF signal and local oscillator frequency Difference between incoming symbol rate and the internally generated symbol rate Copyright © 2010–2011, Texas Instruments Incorporated 5 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com RF TRANSMIT SECTION Measured on Texas Instruments CC2540 EM reference design with TA = 25°C, VDD = 3 V and fc = 2440 MHz PARAMETER Output power Programmable output power range Spurious emissions Current consumption Optimum load impedance (1) TEST CONDITIONS MIN Delivered to a single-ended 50-Ω load through a balun using maximum recommended output power setting TYP MAX UNIT 4 dBm Delivered to a single-ended 50-Ω load through a balun using minimum recommended output power setting –20 Delivered to a single-ended 50 Ω load through a balun 24 dB Conducted measurement with a 50-Ω single-ended load. Complies with EN 300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB STD-T-66 (1) –41 dBm TX mode, –23-dBm output power, no peripherals active, low MCU activity, MCU at 250 kHz 21.1 TX mode, –6-dBm output power, no peripherals active, low MCU activity, MCU at 250 kHz 23.8 mA TX mode, 0-dBm output power, no peripherals active, low MCU activity, MCU at 250 kHz 27 TX mode, 4-dBm output power, no peripherals active, low MCU activity, MCU at 250 kHz 31.6 Differential impedance as seen from the RF port (RF_P and RF_N) toward the antenna Ω 70 + j30 Designs with antenna connectors that require conducted ETSI compliance at 64 MHz should insert an LC resonator in front of the antenna connector. Use a 1.6-nH inductor in parallel with a 1.8-pF capacitor. Connect both from the signal trace to a good RF ground. CURRENT CONSUMPTION WITH TPS62730 Measured on Texas Instruments CC2540TPS62730 EM reference design with TA = 25°C, VDD = 3 V, and fc = 2440 MHZ. 1 Mbps, GFSK, 250 kHz deviation, Bluetooth™ low energy mode, 1% BER (1) PARAMETER Current Consumption (1) 6 TEST CONDITIONS MIN TYP RX mode, standard mode, no peripherals active, low MCU activity, MCU at 1 MHZ 15.8 RX mode, high-gain mode, no peripherals active, low MCU activity, MCU at 1 MHZ 17.8 TX mode, -23 dBm output power, no peripherals active, low MCU activity, MCU at 1 MHZ 16.5 TX mode, -6 dBm output power, no peripherals active, low MCU activity, MCU at 1 MHZ 18.6 MAX UNIT mA TX mode, 0 dBm output power, no peripherals active, low MCU activity, MCU at 1 MHZ 21 TX mode, 4 dBm output power, no peripherals active, low MCU activity, MCU at 1 MHZ 24.6 0.1% BER maps to 30.8% PER Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com 32-MHz CRYSTAL OSCILLATOR Measured on Texas Instruments CC2540 EM reference design with TA = 25°C and VDD = 3 V PARAMETER TEST CONDITIONS MIN Crystal frequency TYP MAX 32 Crystal frequency accuracy requirement (1) MHz –40 40 ppm 6 60 Ω pF ESR Equivalent series resistance C0 Crystal shunt capacitance 1 7 CL Crystal load capacitance 10 16 Start-up time 0.25 Power-down guard time (1) UNIT The crystal oscillator must be in power down for a guard time before it is used again. This requirement is valid for all modes of operation. The need for power-down guard time can vary with crystal type and load. pF ms 3 ms Including aging and temperature dependency, as specified by [1] 32.768-kHz CRYSTAL OSCILLATOR Measured on Texas Instruments CC2540 EM reference design with TA = 25°C and VDD = 3 V PARAMETER TEST CONDITIONS MIN Crystal frequency TYP MAX 32.768 Crystal frequency accuracy requirement (1) –40 UNIT kHz 40 ppm ESR Equivalent series resistance 40 130 kΩ C0 Crystal shunt capacitance 0.9 2 pF CL Crystal load capacitance 12 16 pF Start-up time 0.4 (1) s Including aging and temperature dependency, as specified by [1] 32-kHz RC OSCILLATOR Measured on Texas Instruments CC2540 EM reference design with Tω = 25°C and VDD = 3 V. PARAMETER Calibrated frequency (1) Temperature coefficient (2) (3) Calibration time (4) (1) (2) (3) (4) MIN TYP 32.753 Frequency accuracy after calibration Supply-voltage coefficient TEST CONDITIONS MAX UNIT kHz ±0.2% 0.4 %/°C 3 %/V 2 ms The calibrated 32-kHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 977. Frequency drift when temperature changes after calibration Frequency drift when supply voltage changes after calibration When the 32-kHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator is performed while SLEEPCMD.OSC32K_CALDIS is set to 0. Copyright © 2010–2011, Texas Instruments Incorporated 7 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com 16-MHz RC OSCILLATOR Measured on Texas Instruments CC2540 EM reference design with TA = 25°C and VDD = 3 V PARAMETER Frequency TEST CONDITIONS MIN (1) TYP 16 Uncalibrated frequency accuracy ±18% Calibrated frequency accuracy ±0.6% Start-up time Initial calibration time (1) (2) MAX (2) UNIT MHz 10 μs 50 μs The calibrated 16-MHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 2. When the 16-MHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator is performed while SLEEPCMD.OSC_PD is set to 0. RSSI CHARACTERISTICS Measured on Texas Instruments CC2540 EM reference design with TA = 25°C and VDD = 3 V PARAMETER TEST CONDITIONS Useful RSSI range (1) Absolute uncalibrated RSSI accuracy (1) MIN MAX UNIT –99 to –44 Standard mode –90 to –35 High-gain mode ±4 dB 1 dB Step size (LSB value) (1) TYP High-gain mode dBm Assuming CC2540 EM reference design. Other RF designs give an offset from the reported value. FREQUENCY SYNTHESIZER CHARACTERISTICS Measured on Texas Instruments CC2540 EM reference design with TA = 25°C, VDD = 3 V and fc = 2440 MHz PARAMETER Phase noise, unmodulated carrier TEST CONDITIONS MIN TYP At ±1-MHz offset from carrier –109 At ±3-MHz offset from carrier –112 At ±5-MHz offset from carrier –119 MAX UNIT dBc/Hz ANALOG TEMPERATURE SENSOR Measured on Texas Instruments CC2540 EM reference design with TA = 25°C and VDD = 3 V PARAMETER TEST CONDITIONS MIN Output Temperature coefficient Voltage coefficient Initial accuracy without calibration Measured using integrated ADC, internal band-gap voltage reference, and maximum resolution TYP MAX UNIT 1480 12-bit 4.5 mv/°C 1 / 0.1 V ±10 °C Accuracy using 1-point calibration ±5 °C Current consumption when enabled 0.5 mA 8 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com OP-AMP CHARACTERISTICS TA = 25°C, VDD = 3 V, . All measurement results are obtained using the CC2540 reference designs post-calibration. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Chopping Configuration, Register APCFG = 0x07, OPAMPMC = 0x03, OPAMPC = 0x01 Output maximum voltage VDD – 0.07 Output minimum voltage 0.07 V Open-loop gain 108 dB Gain-bandwidth product Slew rate CMRR V 2 MHz 107 V/μs Input maximum voltage VDD + 0.13 Intput minimum voltage V –55 mV Input offset voltage 40 μV Common-mode rejection ratio 90 dB 0.4 mA Supply current Input noise voltage f = 0.01 Hz to 1 Hz 1.1 f = 0.1 Hz to 10 Hz 1.7 nV/√(Hz) Non-Chopping Configuration, Register APCFG = 0x07, OPAMPMC = 0x00, OPAMPC = 0x01 Output maximum voltage VDD – 0.07 Output minimum voltage 0.07 V Open-loop gain 108 dB Gain-bandwidth product Slew rate CMRR V 2 MHz 107 V/μs Input maximum voltage VDD + 0.13 Intput minimum voltage –55 mV Input offset voltage 0.8 mV Common-mode rejection ratio 90 dB Supply current 0.4 mA Input noise voltage f = 0.01 Hz to 1 Hz 60 f = 0.1 Hz to 10 Hz 65 V nV/√(Hz) COMPARATOR CHARACTERISTICS TA = 25°C, VDD = 3 V. All measurement results are obtained using the CC2540 reference designs, post-calibration. PARAMETER TEST CONDITIONS MIN TYP MAX Common-mode maximum voltage VDD Common-mode minimum voltage –0.3 Input offset voltage Offset vs temperature Offset vs operating voltage UNIT V 1 mV 16 µV/°C 4 mV/V Supply current 230 nA Hysteresis 0.15 mV Copyright © 2010–2011, Texas Instruments Incorporated 9 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com ADC CHARACTERISTICS TA = 25°C and VDD = 3 V PARAMETER ENOB (1) TEST CONDITIONS MIN VDD is voltage on AVDD5 pin 0 VDD V VDD is voltage on AVDD5 pin 0 VDD V External reference voltage differential VDD is voltage on AVDD5 pin 0 VDD Input resistance, signal Simulated using 4-MHz clock speed 197 kΩ Full-scale signal (1) Peak-to-peak, defines 0 dBFS 2.97 V Effective number of bits Single-ended input, 7-bit setting 5.7 Single-ended input, 9-bit setting 7.5 Single-ended input, 10-bit setting 9.3 Single-ended input, 12-bit setting 10.3 Differential input, 7-bit setting 6.5 Differential input, 9-bit setting 8.3 Differential input, 10-bit setting 10 Differential input, 12-bit setting 11.5 Total harmonic distortion 10.9 7-bit setting, both single and differential 0–20 Single ended input, 12-bit setting, –6 dBFS (1) –75.2 Differential input, 12-bit setting, –6 dBFS (1) –86.6 Single-ended input, 12-bit setting (1) 70.2 (1) Differential input, 12-bit setting, –6 dBFS (1) 88.9 Common-mode rejection ratio Differential input, 12-bit setting, 1-kHz sine (0 dBFS), limited by ADC resolution >84 dB Crosstalk Single ended input, 12-bit setting, 1-kHz sine (0 dBFS), limited by ADC resolution >84 dB Offset Midscale –3 mV Differential nonlinearity Integral nonlinearity Signal-to-noise-and-distortion dB 0.68% 12-bit setting, mean (1) 0.05 12-bit setting, maximum (1) 0.9 12-bit setting, mean (1) 4.6 12-bit setting, maximum (1) 13.3 12-bit setting, mean, clocked by RCOSC 10 12-bit setting, max, clocked by RCOSC 29 (1) 35.4 Single ended input, 9-bit setting (1) 46.8 Single ended input, 10-bit setting (1) 57.5 (1) 66.6 Single ended input, 12-bit setting Differential input, 7-bit setting (1) 40.7 Differential input, 9-bit setting (1) 51.6 Differential input, 10-bit setting (1) 61.8 (1) 70.8 Differential input, 12-bit setting 10 dB 78.8 Single ended input, 7-bit setting (1) kHz 79.3 Gain error SINAD (–THD+N) bits Single-ended input, 12-bit setting, –6 dBFS (1) Signal to nonharmonic ratio INL V 9.7 12-bit setting, clocked by RCOSC Differential input, 12-bit setting DNL UNIT External reference voltage Useful power bandwidth CMRR MAX Input voltage 10-bit setting, clocked by RCOSC THD TYP LSB LSB dB Measured with 300-Hz sine-wave input and VDD as reference. Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com ADC CHARACTERISTICS (continued) TA = 25°C and VDD = 3 V PARAMETER TEST CONDITIONS Conversion time MIN TYP 7-bit setting 20 9-bit setting 36 10-bit setting 68 12-bit setting 132 Power consumption MAX μs 1.2 Internal reference VDD coefficient mA 4 Internal reference temperature coefficient Internal reference voltage UNIT mV/V 0.4 mV/10°C 1.15 V CONTROL INPUT AC CHARACTERISTICS TA = –40°C to 85°C, VDD = 2 V to 3.6 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 32 MHz System clock, fSYSCLK tSYSCLK = 1/ fSYSCLK The undivided system clock is 32 MHz when crystal oscillator is used. The undivided system clock is 16 MHz when calibrated 16-MHz RC oscillator is used. 16 RESET_N low duration See item 1, Figure 1. This is the shortest pulse that is recognized as a complete reset pin request. Note that shorter pulses may be recognized but do not lead to complete reset of all modules within the chip. 1 µs Interrupt pulse duration See item 2, Figure 1.This is the shortest pulse that is recognized as an interrupt request. 20 ns RESET_N 1 2 Px.n T0299-01 Figure 1. Control Input AC Characteristics Copyright © 2010–2011, Texas Instruments Incorporated 11 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com SPI AC CHARACTERISTICS TA = –40°C to 85°C, VDD = 2 V to 3.6 V PARAMETER t1 TEST CONDITIONS SCK period SCK duty cycle MIN Master, RX and TX 250 Slave, RX and TX 250 Master TYP MAX UNIT ns 50% Master 63 Slave 63 Master 63 Slave 63 t2 SSN low to SCK t3 SCK to SSN high t4 MOSI early out Master, load = 10 pF 7 ns t5 MOSI late out Master, load = 10 pF 10 ns t6 MISO setup Master 90 t7 MISO hold Master 10 SCK duty cycle Slave t10 MOSI setup Slave 35 ns t11 MOSI hold Slave 10 ns t9 MISO late out Slave, load = 10 pF Operating frequency ns ns ns ns 50% ns 95 Master, TX only 8 Master, RX and TX 4 Slave, RX only 8 Slave, RX and TX 4 ns MHz SCK t2 t3 SSN t4 D0 MOSI t6 MISO X t5 X D1 t7 D0 X T0478-01 Figure 2. SPI Master AC Characteristics 12 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com SCK t2 t3 SSN t8 D0 MISO X t10 MOSI X t9 D1 t11 D0 X T0479-01 Figure 3. SPI Slave AC Characteristics Copyright © 2010–2011, Texas Instruments Incorporated 13 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com DEBUG INTERFACE AC CHARACTERISTICS TA = –40°C to 85°C, VDD = 2 V to 3.6 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 12 MHz fclk_dbg Debug clock frequency (see Figure 4) t1 Allowed high pulse on clock (see Figure 4) 35 ns t2 Allowed low pulse on clock (see Figure 4) 35 ns t3 EXT_RESET_N low to first falling edge on debug clock (see Figure 6) 167 ns t4 Falling edge on clock to EXT_RESET_N high (see Figure 6) 83 ns t5 EXT_RESET_N high to first debug command (see Figure 6) 83 ns t6 Debug data setup (see Figure 5) 2 ns t7 Debug data hold (see Figure 5) 4 ns t8 Clock-to-data delay (see Figure 5) Load = 10 pF 30 ns Time DEBUG_ CLK P2_2 t1 t2 1/fclk_dbg T0436-01 Figure 4. Debug Clock – Basic Timing Time DEBUG_ CLK P2_2 RESET_N t3 t4 t5 T0437-01 Figure 5. Debug Enable Timing 14 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com Time DEBUG_ CLK P2_2 DEBUG_DATA (to CC2540) P2_1 DEBUG_DATA (from CC2540) P2_1 t6 t8 t7 T0438-02 Figure 6. Data Setup and Hold Timing TIMER INPUTS AC CHARACTERISTICS TA = –40°C to 85°C, VDD = 2 V to 3.6 V PARAMETER Input capture pulse duration TEST CONDITIONS Synchronizers determine the shortest input pulse that can be recognized. The synchronizers operate at the current system clock rate (16 MHz or 32 MHz). MIN TYP MAX 1.5 UNIT tSYSCLK DC CHARACTERISTICS TA = 25°C, VDD = 3 V PARAMETER TEST CONDITIONS MIN TYP Logic-0 input voltage MAX 0.5 Logic-1 input voltage 2.5 Input equals 0 V –50 50 Logic-1 input current Input equals VDD –50 50 20 Logic-0 output voltage, 4- mA pins Output load 4 mA Logic-1 output voltage, 4-mA pins Output load 4 mA Copyright © 2010–2011, Texas Instruments Incorporated nA nA kΩ 0.5 2.4 V V Logic-0 input current I/O-pin pullup and pulldown resistors UNIT V V 15 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com DEVICE INFORMATION PIN DESCRIPTIONS The CC2540 pinout is shown in Figure 7 and a short description of the pins follows. DVDD1 P1_6 P1_7 P2_0 P2_1 P2_2 P2_3 / XOSC32K_Q2 P2_4 / XOSC32K_Q1 40 39 38 37 36 35 34 33 32 AVDD6 DCOUPL CC2540 RHA Package (Top View) 31 30 R_BIAS 2 29 AVDD4 3 28 AVDD1 DVDD_USB 4 27 AVDD2 P1_5 5 26 RF_N P1_4 6 25 RF_P P1_3 7 24 AVDD3 P1_2 8 23 XOSC_Q2 P1_1 9 22 XOSC_Q1 12 13 14 15 16 17 18 19 P0_3 P0_2 P0_1 P0_0 21 20 AVDD5 RESET_N 10 11 P0_4 DVDD2 GND Ground Pad P0_5 USB_N P0_6 USB_P P1_0 1 P0_7 DGND_USB P0076-05 NOTE: The exposed ground pad must be connected to a solid ground plane, as this is the ground connection for the chip. Figure 7. Pinout Top View 16 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com PIN DESCRIPTIONS PIN NAME PIN PIN TYPE DESCRIPTION AVDD1 28 Power (analog) 2-V–3.6-V analog power-supply connection AVDD2 27 Power (analog) 2-V–3.6-V analog power-supply connection AVDD3 24 Power (analog) 2-V–3.6-V analog power-supply connection AVDD4 29 Power (analog) 2-V–3.6-V analog power-supply connection AVDD5 21 Power (analog) 2-V–3.6-V analog power-supply connection AVDD6 31 Power (analog) 2-V–3.6-V analog power-supply connection DCOUPL 40 Power (digital) 1.8-V digital power-supply decoupling. Do not use for supplying external circuits. DGND_USB 1 Ground pin Connect to GND DVDD_USB 4 Power (digital) 2-V–3.6-V digital power-supply connection DVDD1 39 Power (digital) 2-V–3.6-V digital power-supply connection DVDD2 10 Power (digital) 2-V–3.6-V digital power-supply connection GND — Ground The ground pad must be connected to a solid ground plane. P0_0 19 Digital I/O Port 0.0 P0_1 18 Digital I/O Port 0.1 P0_2 17 Digital I/O Port 0.2 P0_3 16 Digital I/O Port 0.3 P0_4 15 Digital I/O Port 0.4 P0_5 14 Digital I/O Port 0.5 P0_6 13 Digital I/O Port 0.6 P0_7 12 Digital I/O Port 0.7 P1_0 11 Digital I/O Port 1.0 – 20-mA drive capability P1_1 9 Digital I/O Port 1.1 – 20-mA drive capability P1_2 8 Digital I/O Port 1.2 P1_3 7 Digital I/O Port 1.3 P1_4 6 Digital I/O Port 1.4 P1_5 5 Digital I/O Port 1.5 P1_6 38 Digital I/O Port 1.6 P1_7 37 Digital I/O Port 1.7 P2_0 36 Digital I/O Port 2.0 P2_1 35 Digital I/O Port 2.1 P2_2 34 Digital I/O Port 2.2 P2_3/ XOSC32K_Q2 33 Digital I/O, Analog I/O Port 2.3/32.768 kHz XOSC P2_4/ XOSC32K_Q1 32 Digital I/O, Analog I/O Port 2.4/32.768 kHz XOSC RBIAS 30 Analog I/O External precision bias resistor for reference current RESET_N 20 Digital input Reset, active-low RF_N 26 RF I/O Negative RF input signal to LNA during RX Negative RF output signal from PA during TX RF_P 25 RF I/O Positive RF input signal to LNA during RX Positive RF output signal from PA during TX USB_N 3 Digital I/O USB N USB_P 2 Digital I/O USB P XOSC_Q1 22 Analog I/O 32-MHz crystal oscillator pin 1 or external-clock input XOSC_Q2 23 Analog I/O 32-MHz crystal oscillator pin 2 Copyright © 2010–2011, Texas Instruments Incorporated 17 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com BLOCK DIAGRAM A block diagram of the CC2540 is shown in Figure 8. The modules can be roughly divided into one of three categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related modules. In the following subsections, a short description of each module is given. XOSC_Q2 32-MHz CRYSTAL OSC XOSC_Q1 P2_4 32.768-kHz CRYSTAL OSC P2_3 P2_2 HIGHSPEED RC-OSC DEBUG INTERFACE P2_1 DCOUPL POWER-ON RESET BROWN OUT CLOCK MUX and CALIBRATION SFR Bus RESET VDD (2 V–3.6 V) ON-CHIP VOLTAGE REGULATOR WATCHDOG TIMER RESET_N SLEEP TIMER 32-kHz RC-OSC POWER MANAGEMENT CONTROLLER P2_0 PDATA P1_7 P1_6 XRAM 8051 CPU CORE P1_5 IRAM P1_4 SFR RAM SRAM FLASH FLASH MEMORY ARBITRATOR P1_3 P1_2 DMA P1_1 UNIFIED P1_0 IRQ CTRL FLASH CTRL P0_7 P0_6 1 KB SRAM FIFOCTRL ANALOG COMPARATOR P0_5 Radio Arbiter P0_4 OP-AMP P0_2 AES ENCRYPTION AND DECRYPTION DS ADC AUDIO/DC RADIO REGISTERS Link Layer Engine SFR Bus P0_0 I/O CONTROLLER P0_1 SRAM DEMODULATOR SYNTH P0_3 MODULATOR USB_N USB_P USB RECEIVE USART 1 FREQUENCY SYNTHESIZER USART 0 TRANSMIT TIMER 1 (16-Bit) TIMER 2 (BLE LL TIMER) RF_P RF_N TIMER 3 (8-Bit) DIGITAL ANALOG TIMER 4 (8-Bit) MIXED B0301-05 Figure 8. CC2540 Block Diagram 18 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 www.ti.com SWRS084B – OCTOBER 2010 – REVISED JULY 2011 BLOCK DESCRIPTIONS CPU and Memory The 8051 CPU core is a single-cycle 8051-compatible core. It has three different memory access busses (SFR, DATA, and CODE/XDATA), a debug interface, and an 18-input extended interrupt unit. The memory arbiter is at the heart of the system, as it connects the CPU and DMA controller with the physical memories and all peripherals through the SFR bus. The memory arbiter has four memory-access points, access of which can map to one of three physical memories: an SRAM, flash memory, and XREG/SFR registers. It is responsible for performing arbitration and sequencing between simultaneous memory accesses to the same physical memory. The SFR bus is drawn conceptually in Figure 8 as a common bus that connects all hardware peripherals to the memory arbiter. The SFR bus in the block diagram also provides access to the radio registers in the radio register bank, even though these are indeed mapped into XDATA memory space. The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. The SRAM is an ultralow-power SRAM that retains its contents even when the digital part is powered off (power modes 2 and 3). The 128/256 KB flash block provides in-circuit programmable non-volatile program memory for the device, and maps into the CODE and XDATA memory spaces. Peripherals Writing to the flash block is performed through a flash controller that allows page-wise erasure and 4-bytewise programming. See User Guide for details on the flash controller. A versatile five-channel DMA controller is available in the system, accesses memory using the XDATA memory space, and thus has access to all physical memories. Each channel (trigger, priority, transfer mode, addressing mode, source and destination pointers, and transfer count) is configured with DMA descriptors that can be located anywhere in memory. Many of the hardware peripherals (AES core, flash controller, USARTs, timers, ADC interface, etc.) can be used with the DMA controller for efficient operation by performing data transfers between a single SFR or XREG address and flash/SRAM. Each CC2540 contains a unique 48-bit IEEE address that can be used as the public device address for a Bluetooth device. Designers are free to use this address, or provide their own, as described in the Bluetooth specfication. The interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each of which is associated with one of four interrupt priorities. I/O and sleep timer interrupt requests are serviced even if the device is in a sleep mode (power modes 1 and 2) by bringing the CC2540 back to the active mode. The debug interface implements a proprietary two-wire serial interface that is used for in-circuit debugging. Through this debug interface, it is possible to erase or program the entire flash memory, control which oscillators are enabled, stop and start execution of the user program, execute instructions on the 8051 core, set code breakpoints, and single-step through instructions in the code. Using these techniques, it is possible to perform in-circuit debugging and external flash programming elegantly. The I/O controller is responsible for all general-purpose I/O pins. The CPU can configure whether peripheral modules control certain pins or whether they are under software control, and if so, whether each pin is configured as an input or output and if a pullup or pulldown resistor in the pad is connected. Each peripheral that connects to the I/O pins can choose between two different I/O pin locations to ensure flexibility in various applications. The sleep timer is an ultralow-power timer that can either use an external 32.768-kHz crystal oscillator or an internal 32.753-kHz RC oscillator. The sleep timer runs continuously in all operating modes except power mode 3. Typical applications of this timer are as a real-time counter or as a wake-up timer to get out of power modes 1 or 2. A built-in watchdog timer allows the CC2540 to reset itself if the firmware hangs. When enabled by software, the watchdog timer must be cleared periodically; otherwise, it resets the device when it times out. Copyright © 2010–2011, Texas Instruments Incorporated 19 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com Timer 1 is a 16-bit timer with timer/counter/PWM functionality. It has a programmable prescaler, a 16-bit period value, and five individually programmable counter/capture channels, each with a 16-bit compare value. Each of the counter/capture channels can be used as a PWM output or to capture the timing of edges on input signals. It can also be configured in IR generation mode, where it counts timer 3 periods and the output is ANDed with the output of timer 3 to generate modulated consumer IR signals with minimal CPU interaction. Timer 2 is a 40-bit timer used by the Bluetooth low energy stack. It has a 16-bit counter with a configurable timer period and a 24-bit overflow counter that can be used to keep track of the number of periods that have transpired. A 40-bit capture register is also used to record the exact time at which a start-of-frame delimiter is received/transmitted or the exact time at which transmission ends. There are two 16-bit timer-compare registers and two 24-bit overflow-compare registers that can be used to give exact timing for start of RX or TX to the radio or general interrupts. Timer 3 and timer 4 are 8-bit timers with timer/counter/PWM functionality. They have a programmable prescaler, an 8-bit period value, and one programmable counter channel with an 8-bit compare value. Each of the counter channels can be used as PWM output. USART 0 and USART 1 are each configurable as either an SPI master/slave or a UART. They provide double buffering on both RX and TX and hardware flow control and are thus well suited to high-throughput full-duplex applications. Each USART has its own high-precision baud-rate generator, thus leaving the ordinary timers free for other uses. When configured as SPI slaves, the USARTs sample the input signal using SCK directly instead of using some oversampling scheme, and are thus well-suited for high data rates. The AES encryption/decryption core allows the user to encrypt and decrypt data using the AES algorithm with 128-bit keys. The AES core also supports ECB, CBC, CFB, OFB, CTR, and CBC-MAC, as well as hardware support for CCM. The ADC supports 7 to 12 bits of resolution with a corresponding range of bandwidths from 30-kHz to 4-kHz, respectively. DC and audio conversions with up to eight input channels (I/O controller pins) are possible. The inputs can be selected as single-ended or differential. The reference voltage can be internal, AVDD, or a single-ended or differential external signal. The ADC also has a temperature-sensor input channel. The ADC can automate the process of periodic sampling or conversion over a sequence of channels. The operational amplifier is intended to provide front-end buffering and gain for the ADC. Both inputs as well as the output are available on pins, so the feedback network is fully customizable. A chopper-stabilized mode is available for applications that need good accuracy with high gain. The ultralow-power analog comparator enables applications to wake up from PM2 or PM3 based on an analog signal. Both inputs are brought out to pins; the reference voltage must be provided externally. The comparator output is connected to the I/O controller interrupt detector and can be treated by the MCU as a regular I/O pin interrupt. 20 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS RX CURRENT IN WAIT FOR SYNC vs TEMPERATURE TX CURRENT vs TEMPERATURE 32.5 20.5 32 Current (mA) 20 Current (mA) TX Power Setting = 4 dBm VCC = 3 V Gain = Standard Setting Input = -70 dBm VCC = 3 V 19.5 31.5 31 19 18.5 -40 -20 0 20 40 Temperature (°C) 60 30.5 -40 80 -20 0 G001 20 40 Temperature (°C) Figure 9. Figure 10. RX SENSITIVITY vs TEMPERATURE TX POWER vs TEMPERATURE 60 80 G002 7 -83 Gain = Standard Setting VCC = 3 V -84 TX Power Setting = 4 dBm VCC = 3 V 6 -85 5 Level (dBm) Level (dBm) -86 -87 -88 -89 4 3 2 -90 1 -91 -92 -40 -20 0 20 40 Temperature (°C) 60 0 -40 80 0 20 40 Temperature (°C) Figure 11. Figure 12. RX CURRENT IN WAIT FOR SYNC vs SUPPLY VOLTAGE TX CURRENT vs SUPPLY VOLTAGE 19.7 60 80 G004 32 Gain = Standard Setting Input = -70 dBm T A = 25°C 19.68 19.66 T A = 25°C TX Power Setting = 4 dBm 31.9 31.8 19.64 31.7 Current (mA) Current (mA) -20 G003 19.62 19.6 19.58 31.6 31.5 31.4 19.56 31.3 19.54 31.2 19.52 31.1 19.5 31 2 2.2 2.4 2.6 2.8 3 Supply Voltage (V) Figure 13. Copyright © 2010–2011, Texas Instruments Incorporated 3.2 3.4 3.6 G005 2 2.2 2.4 2.6 2.8 3 Supply Voltage (V) 3.2 3.4 3.6 G006 Figure 14. 21 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) RX SENSITIVITY vs SUPPLY VOLTAGE TX POWER vs SUPPLY VOLTAGE 5 -87 Gain = Standard Setting T A = 25°C -87.4 4.6 -87.6 4.4 -87.8 -88 -88.2 4.2 4 3.8 -88.4 3.6 -88.6 3.4 -88.8 3.2 3 -89 2 2.2 2.4 2.6 2.8 3 Supply Voltage (V) 3.2 3.4 2 3.6 -87.4 2.4 2.6 2.8 3 Supply Voltage (V) 3.2 3.4 3.6 Figure 15. Figure 16. RX SENSITIVITY vs FREQUENCY RX INTERFERER REJECTION (SELECTIVITY) vs INTERFERER FREQUENCY G008 60 Gain = Standard Setting T A = 25°C VCC = 3 V 50 40 Rejection (dB) -87.6 Level (dBm) 2.2 G007 -87 -87.2 T A = 25°C TX Power Setting = 4 dBm 4.8 Level (dBm) Level (dBm) -87.2 -87.8 -88 -88.2 30 20 -88.4 Gain = Standard Setting T A = 25°C VCC = 3 V Wanted Signal at 2426 MHz with -67 dBm Level 10 -88.6 0 -88.8 -89 2400 2410 2420 2430 2440 2450 2460 2470 2480 Frequency (MHz) -10 2400 2410 2420 2430 2440 2450 2460 2470 2480 Frequency (MHz) G009 Figure 17. G010 Figure 18. TX POWER vs FREQUENCY 5 4.8 4.6 T A = 25°C TX Power Setting = 4 dBm VCC = 3 V Level (dBm) 4.4 4.2 4 3.8 3.6 3.4 3.2 3 2400 2410 2420 2430 2440 2450 2460 2470 2480 Frequency (MHz) G011 Figure 19. 22 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) Table 1. Output Power and Current Consumption (1) (2) (1) Typical Output Power (dBm) Typical Current Consumption (mA) Typical Current Consumption With TPS62730 (mA) 4 32 24.6 0 27 21 –6 24 18.5 –23 21 16.5 Measured on Texas Instruments CC2540 EM reference design with TA = 25°C, VDD = 3 V and fc = 2440 MHz. See SWRU191 for recommended register settings Measured on Texas Instruments CC2540TPS62730 EM reference design with TA = 25°C, VDD = 3 V and fc = 2440 MHz. See SWRU191 for recommended register settings (2) TYPICAL CURRENT SAVINGS 35 40 25 35 30 35 20 20 20 15 15 10 30 DC/DC ON DC/DC OFF % Current Savings Current (mA) 25 Current Savings (%) 30 25 Current (mA) CC2540 Current Consumption RX SG CLKCONMOD0x80 40 25 15 20 10 15 10 Current Savings (%) CC2540 Current Consumption TX 4dBm DC/DC ON DC/DC OFF Current Savings 10 5 5 5 5 0 0 2.1 2.4 2.7 3 3.3 3.6 Supply (V) 0 0 2.1 2.4 2.7 3 3.3 3.6 Supply (V) Figure 20. Current Savings in TX at Room Temperature Figure 21. Current Savings in RX at Room Temperature The application note (SWRA365) has information regarding the CC2540 and TPS62730 como board and the current savings that can be achieved using the como board. Copyright © 2010–2011, Texas Instruments Incorporated 23 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com APPLICATION INFORMATION Few external components are required for the operation of the CC2540. A typical application circuit is shown in Figure 22. Optional 32-kHz Crystal (1) C331 2-V to 3.6-V Power Supply XTAL2 C401 2 USB_P 3 USB_N 4 DVDD_USB 5 P1_5 6 P1_4 8 P1_2 9 P2_2 34 P2_1 35 P2_0 36 P1_7 37 P1_6 38 AVDD6 31 R301 RBIAS 30 L251 AVDD4 29 AVDD1 28 C251 Antenna (50 W) C252 AVDD2 27 L252 RF_N 26 L253 CC2540 RF_P 25 DIE ATTACH PAD C261 L261 AVDD3 24 XOSC_Q2 23 C262 C253 XOSC_Q1 22 P1_1 19 P0_0 17 P0_2 18 P0_1 16 P0_3 15 P0_4 14 P0_5 13 P0_6 12 P0_7 11 P1_0 10 DVDD2 20 RESET_N 7 P1_3 P2_4/XOSC32K_Q1 32 DGND_USB P2_3/XOSC32K_Q2 33 1 DVDD1 39 DCOUPL 40 C321 AVDD5 21 XTAL1 Power Supply Decoupling Capacitors are Not Shown Digital I/O Not Connected C231 C221 S0383-03 (1) 32-kHz crystal is mandatory when running the chip in low-power modes, except if the link layer is in the standby state (Vol. 6 Part B Section 1.1 in [1]). NOTE: Different antenna alternatives will be provided as reference designs. Figure 22. CC2540 Application Circuit Table 2. Overview of External Components (Excluding Supply Decoupling Capacitors) Component 24 Description Value C221 32-MHz xtal loading capacitor 12 pF C231 32-MHz xtal loading capacitor 12 pF C251 Part of the RF matching network 18 pF C252 Part of the RF matching network 1 pF C253 Part of the RF matching network 1 pF C261 Part of the RF matching network 18 pF C262 Part of the RF matching network 1 pF C321 32-kHz xtal loading capacitor 15 pF C331 32-kHz xtal loading capacitor 15 pF C401 Decoupling capacitor for the internal digital regulator 1 µF Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com Table 2. Overview of External Components (Excluding Supply Decoupling Capacitors) (continued) Component Description Value L251 Part of the RF matching network 2 nH L252 Part of the RF matching network 1 nH L253 Part of the RF matching network 3 nH L261 Part of the RF matching network 2 nH R301 Resistor used for internal biasing 56 kΩ Input/Output Matching When using an unbalanced antenna such as a monopole, a balun should be used to optimize performance. The balun can be implemented using low-cost discrete inductors and capacitors. The recommended balun shown consists of C262, L261, C252, and L252. Crystal An external 32-MHz crystal, XTAL1, with two loading capacitors (C221 and C231) is used for the 32-MHz crystal oscillator. See 32-MHz CRYSTAL OSCILLATOR for details. The load capacitance seen by the 32-MHz crystal is given by: 1 CL = + Cparasitic 1 1 + C221 C231 (1) XTAL2 is an optional 32.768-kHz crystal, with two loading capacitors (C321 and C331) used for the 32.768-kHz crystal oscillator. The 32.768-kHz crystal oscillator is used in applications where both very low sleep-current consumption and accurate wake-up times are needed. The load capacitance seen by the 32.768-kHz crystal is given by: 1 CL = + Cparasitic 1 1 + C321 C331 (2) A series resistor may be used to comply with the ESR requirement. On-Chip 1.8-V Voltage Regulator Decoupling The 1.8-V on-chip voltage regulator supplies the 1.8-V digital logic. This regulator requires a decoupling capacitor (C401) for stable operation. Power-Supply Decoupling and Filtering Proper power-supply decoupling must be used for optimum performance. The placement and size of the decoupling capacitors and the power supply filtering are very important to achieve the best performance in an application. TI provides a compact reference design that should be followed very closely. References 1. Bluetooth® Core Technical Specification document, version 4.0 http://www.bluetooth.com/SiteCollectionDocuments/Core_V40.zip 2. CC253x System-on-Chip Solution for 2.4-GHz IEEE 802.15.4 and ZigBee® Applications/CC2540 System-on-Chip Solution for 2.4-GHz Bluetooth low energy Applications (SWRU191) 3. Current Savings in CC254x Using the TPS62730 (SWRA365) Copyright © 2010–2011, Texas Instruments Incorporated 25 CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com Additional Information Texas Instruments offers a wide selection of cost-effective, low-power RF solutions for proprietary and standard-based wireless applications for use in industrial and consumer applications. Our selection includes RF transceivers, RF transmitters, RF front ends, and System-on-Chips as well as various software solutions for the sub-1- and 2.4-GHz frequency bands. In addition, Texas Instruments provides a large selection of support collateral such as development tools, technical documentation, reference designs, application expertise, customer support, third-party and university programs. The Low-Power RF E2E Online Community provides technical support forums, videos and blogs, and the chance to interact with fellow engineers from all over the world. With a broad selection of product solutions, end application possibilities, and a range of technical support, Texas Instruments offers the broadest low-power RF portfolio. We make RF easy! The following subsections point to where to find more information. Texas Instruments Low-Power RF Web Site • • • Forums, videos, and blogs RF design help E2E interaction Join us today at www.ti.com/lprf-forum. Texas Instruments Low-Power RF Developer Network Texas Instruments has launched an extensive network of low-power RF development partners to help customers speed up their application development. The network consists of recommended companies, RF consultants, and independent design houses that provide a series of hardware module products and design services, including: • RF circuit, low-power RF, and ZigBee® design services • Low-power RF and ZigBee module solutions and development tools • RF certification services and RF circuit manufacturing Need help with modules, engineering services or development tools? Search the Low-Power RF Developer Network tool to find a suitable partner. www.ti.com/lprfnetwork Low-Power RF eNewsletter The Low-Power RF eNewsletter keeps the user up-to-date on new products, news releases, developers’ news, and other news and events associated with low-power RF products from TI. The Low-Power RF eNewsletter articles include links to get more online information. Sign up today on www.ti.com/lprfnewsletter 26 Copyright © 2010–2011, Texas Instruments Incorporated CC2540F128, CC2540F256 SWRS084B – OCTOBER 2010 – REVISED JULY 2011 www.ti.com REVISION HISTORY Changes from Revision Original (October 2010) to Revision A Page • Changed several items in Features list ................................................................................................................................ 1 • Changed upper limit of storage temperature range .............................................................................................................. 4 • Changed ESD rating for charged-device model ................................................................................................................... 4 • Changed adjacent-channel rejection from 5 dB to –5 dB ..................................................................................................... 5 Changes from Revision A (May 2011) to Revision B Page • Added the TPS62730 Compatible Features List .................................................................................................................. 1 • Added the CC2540 WITH TPS62730 Applications .............................................................................................................. 2 • Added CURRENT CONSUMPTION WITH TPS62730 characteristics ................................................................................ 6 • Changed Table 1 ................................................................................................................................................................ 23 • Added the TYPICAL CURRENT SAVINGS section ........................................................................................................... 23 Copyright © 2010–2011, Texas Instruments Incorporated 27 PACKAGE OPTION ADDENDUM www.ti.com 2-Jul-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) CC2540F128RHAR ACTIVE VQFN RHA 40 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR CC2540F128RHAT ACTIVE VQFN RHA 40 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR CC2540F256RHAR ACTIVE VQFN RHA 40 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR CC2540F256RHAT ACTIVE VQFN RHA 40 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Jul-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing CC2540F128RHAR VQFN RHA 40 CC2540F128RHAT VQFN RHA CC2540F256RHAR VQFN RHA SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2500 330.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2 40 250 330.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2 40 2500 330.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Jul-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CC2540F128RHAR VQFN RHA 40 2500 333.2 345.9 28.6 CC2540F128RHAT VQFN RHA 40 250 333.2 345.9 28.6 CC2540F256RHAR VQFN RHA 40 2500 333.2 345.9 28.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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