74AC11640 OCTAL BUS TRANSCEIVER WITH 3–STATE OUTPUTS SCAS052A – JULY 1987 – REVISED APRIL 1993 • • • • • • DW OR NT PACKAGE (TOP VIEW) Bidirectional Bus Transceivers in High-Density 24-Pin Packages Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs A1 A2 A3 A4 GND GND GND GND A5 A6 A7 A8 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 DIR B1 B2 B3 B4 VCC VCC B5 B6 B7 B8 OE description These octal bus transceivers are designed for asynchronous communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The 74AC11640 is characterized for operation from – 40°C to 85°C. FUNCTION TABLE INPUTS OPERATION OE DIR L L B data to A bus L H A data to B bus H X Isolation EPIC is a trademark of Texas Instruments Incorporated. Copyright 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 74AC11640 OCTAL BUS TRANSCEIVER WITH 3–STATE OUTPUTS SCAS052A – JULY 1987 – REVISED APRIL 1993 logic symbol† OE DIR 13 24 logic diagram (positive logic) OE G3 3 EN1 [BA] 3 EN2 [AB] A1 A2 A3 A4 A5 A6 A7 A8 23 1 1 2 13 1 1 2 22 3 21 4 20 9 17 10 16 11 15 12 14 DIR 24 B1 B2 B3 A1 1 23 B1 B4 B5 B6 B7 B8 To 7 Other Channels † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 74AC11640 OCTAL BUS TRANSCEIVER WITH 3–STATE OUTPUTS SCAS052A – JULY 1987 – REVISED APRIL 1993 recommended operating conditions VCC Supply voltage VIH High-level input voltage VCC = 3 V VCC = 4.5 V VCC = 5.5 V MIN NOM MAX 3 5 5.5 V 3.85 VCC = 3 V VCC = 4.5 V 0.9 Low-level input voltage VI VO Input voltage 0 Output voltage 0 IOH High-level output current 1.35 VCC = 5.5 V ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature V 1.65 VCC VCC VCC = 3 V VCC = 4.5 V VCC = 5.5 V V V –4 – 24 mA – 24 VCC = 3 V VCC = 4.5 V VCC = 5.5 V Low-level output current V 2.1 3.15 VIL IOL UNIT 12 24 mA 24 OE or DIR 0 5 Data 0 10 – 40 85 ns/V °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = – 50 µA VOH IOH = – 4 mA VOL ICC Ci Cio A or B ports OE or DIR MIN 3V 2.9 2.9 4.5 V 4.4 4.4 5.5 V 5.4 5.4 3V 2.58 2.48 3.8 MAX 3.94 5.5 V 4.94 IOH = – 75 mA† 5.5 V 3V 0.1 0.1 IOL = 50 µA 4.5 V 0.1 0.1 IOL = 75 mA† VI = VCC or GND VO = VCC or GND VI = VCC or GND, 4.8 3.85 5.5 V 0.1 0.1 3V 0.36 0.44 4.5 V 0.36 0.44 5.5 V 0.36 0.44 5.5 V IO = 0 VI = VCC or GND VO = VCC or GND UNIT V 4.5 V IOL = 12 mA OE or DIR TA = 25°C TYP MAX IOH = – 24 mA A IOL = 24 mA II IOZ‡ MIN V 1.65 5.5 V ± 0.1 ±1 µA 5.5 V ± 0.5 ±5 µA 5.5 V 8 80 µA 5V 4 pF 5V 12 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. ‡ For I/O ports, the parameter IOZ includes the input leakage current. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 74AC11640 OCTAL BUS TRANSCEIVER WITH 3–STATE OUTPUTS SCAS052A – JULY 1987 – REVISED APRIL 1993 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B MIN TA = 25°C TYP MAX MIN MAX 1.5 7 10.5 1.5 12 1.5 6.3 9.1 1.5 10.2 1.5 8.9 12.5 1.5 14.3 1.5 8.4 12.9 1.5 14.6 1.5 7.9 10 1.5 10.8 1.5 8.6 11 1.5 12 UNIT ns ns ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B MIN TA = 25°C TYP MAX MIN MAX 1.5 5.1 7.7 1.5 8.8 1.5 4.6 6.9 1.5 7.8 1.5 6.5 9.4 1.5 10.6 1.5 6.1 9.4 1.5 10.6 1.5 6.7 8.6 1.5 9.3 1.5 7.2 9.1 1.5 9.9 UNIT ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd d 4 Power dissipation capacitance per transceiver TEST CONDITIONS Outputs enabled Outputs disabled POST OFFICE BOX 655303 CL = 50 pF, pF • DALLAS, TEXAS 75265 f = 1 MHz TYP 45 12 UNIT pF 74AC11640 OCTAL BUS TRANSCEIVER WITH 3–STATE OUTPUTS SCAS052A – JULY 1987 – REVISED APRIL 1993 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open GND CL = 50 pF (see Note A) 500 Ω VCC Output Control (low-level enabling) LOAD CIRCUIT FOR OUTPUTS 50% VCC 50% 50% 0V tPLH Output (see Note D) VOH 50%VCC VOL 50%VCC Output Waveform 2 S1 at GND (see Note C) tPLZ ≈VCC Output Waveform 1 S1 at 2 × VCC (see Note C) tPHL 50% 0V tPZL Input (see Note B) S1 Open 2 × VCC GND 50%VCC tPZH VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 20%VCC VOL tPHZ VOH 50%VCC 80%VCC 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. For testing pulse duration: tr = tf = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. Figure 1. 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