DATA SHEET Compound Field Effect Power Transistor µPA1572B N-CHANNEL POWER MOS FET ARRAY SWITCHING INDUSTRIAL USE DESCRIPTION PACKAGE DIMENSIONS in millimeters The µPA1572B is N-channel Power MOS FET Array that built in 4 circuits designed for solenoid, motor and lamp driver. 4.0 26.8 MAX. 2.5 • Full Mold Package with 4 Circuits • 4 V driving is possible 10 MIN. 10 FEATURES • Low On-state Resistance RDS(on) = 0.6 Ω MAX. (VGS = 10 V, ID = 1 A) 1.4 Package µPA1572BH 10Pin SIP 0.6±0.1 1 2 3 4 5 6 7 8 910 ORDERING INFORMATION Type Number 1.4 0.5±0.1 2.54 RDS(on) = 0.8 Ω MAX. (VGS = 4 V, ID = 1 A) • Low Input Capacitance Ciss = 110 pF TYP. CONNECTION DIAGRAM 3 2 5 4 7 9 6 8 1 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C) V V 10 ELECTRODE CONNECTION 2, 4, 6, 8 : Gate 3, 5, 7, 9 : Drain Drain to Source Voltage (VGS = 0) Gate to Source Voltage (VDS = 0) VDSS VGSS (AC) 60 ±20 Drain Current (DC) Drain Current (pulse) ID (DS) ID (pulse) *1 ±2.0 A/unit ±6.0 A/unit Total Power Dissipation Total Power Dissipation PT1 *2 PT2 *3 20 3.0 Channel Temperature Storage Tempreature TCH Tstg Single Avalanche Current Single Avalanche Energy IAS *4 EAS *4 *1 PW ≤ 10 µs, Duty Cycle ≤ 1 % *2 4 Circuits TC = 25 °C *3 4 Circuits TA = 25 °C *4 Starting TCH = 25 °C, VDD = 30 V, VGS = 20 V → 0, RG = 25 Ω, L = 100 µH 1, 10 : Source W W 150 °C −55 to +150°C 5.0 0.1 A mJ Build-in Gate Diodes are for protection from static electricity in handing. In case high voltage over VGSs is applied, please append gate protection circuits. The information in this document is subject to change without notice. Document No. G11177EJ1V0DS00 (1st edition) Date Published May 1996 P Printed in Japan © 1996 µPA1572B ELECTRICAL CHARACTERISTICS (TA = 25 °C) MAX. UNIT Drain Leakage Current CHARACTERISTIC IDSS 10 µA VDS = 60 V, VGS = 0 Gate Leakage Current IGSS ±10 µA VGS = ±20 V, VDS = 0 2.0 V VDS = 10 V, ID = 1.0 mA Gate Cutoff Voltage Forward Transfer Admittance MIN. VGS (off) 1.0 Yfs 0.5 TYP. TEST CONDITION S VDS = 10 V, ID = 1.0 A Drain to Source ON-Resistance RDS (on)1 0.3 0.6 Ω VGS = 10 V, ID = 1.0 A Drain to Sourse ON-Resistance RDS (on)2 0.4 0.8 Ω VGS = 4.0 V, ID = 1.0 A Input Capacitance Ciss 110 pF VDS = 10 V, VGS = 0, f = 1.0 MHz Output Capacitance Coss 70 pF Reverse Transfer Capacitance Crss 25 pF Turn-on Delay Time td (on) 30 ns Rise Time ID = 1.0 A, VGS (on) = 10 V, VDD = 30 V, RL = 30 Ω tr 200 ns td (off) 100 ns tf 160 ns Total Gate Charge QG 5.4 nC Gate to Source Charge QGS 0.7 nC Gate to Drain Charge QGD 2.0 nC VF (S-D) 1.0 V IF = 2.0 A, VGS = 0 Reverse Recovery Time trr 130 ns IF = 2.0 A, VGS = 0, di/dt = 50 A/µs Reverse Recovery Charge Qrr 110 nC Turn-off Delay Time Fall Time Body Diode Forward Voltage 2 SYMBOL VGS = 10 V, ID = 2.0 A, VDD = 48 V µPA1572B Test Circuit 1 Avalanche Capability D.U.T. RG = 25 Ω PG. L 50 Ω VGS = 20 V → 0 VDD BVDSS IAS VDS ID VDD Starting TCH Test Circuit 2 Switching Time D.U.T. RL VGS VGS RG RG = 10 Ω PG. Wave From VDD VGS (on) 10 % 90 % 0 ID 10 % td (on) tr ton t 90 % 90 % ID ID Wave From VGS 0 0 10 % td (off) tr toff t = 1 µs Duty Cycle ≤ 1 % Test Circuit 3 Gate Charge D.U.T. IG = 2 mA PG. 50 Ω RL VDD 3 µPA1572B CHARACTERISTICS (TA = 25 °C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 2.5 4 Circuits operation 2.0 3 Circuits operation ,, 2 Circuits operation 1 Circuit operation 1.5 1.0 NEC µ PA1572BH Lead 0.5 0 Print Circuit Boad 50 100 30 4 Circuits operation 20 2 Circuits operation 150 0 d( 0 =1 100 150 S G im )L 1.0 on ( DS R ID(Pulse) ID(DC) 0. 1 0. ms 5m 10 m s 1m s s 50 m s DC 0.1 TC = 25 °C Single Pulse 0.01 0.1 1.0 10 100 80 60 40 20 100 0 VDS - Drain to Source Voltage - V ID - Drain Current - A 10 TA=125 °C 75 °C 25 °C -25 °C 0.1 VGS- Gate to Source Voltage - V 60 80 100 120 140 160 8 Pulsed VDS=10V 4 40 TC - Case Temperature - °C 100 2 20 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS ID - Drain Current - A 50 DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA V 4 1 Circuit operation 10 FORWARD BIAS SAFE OPERATING AREA ite 0 3 Circuits operation TC - Case Temperature - °C V) 1.0 Under Same dissipation in each circuit Tc is grease Temperature on back surface TA - Ambient Temperature - °C 10 ID - Drain Current - A PT - Total Power Dissipation - W Under Same dissipation in each circuit 3.0 dT - Percentage of Rated Power - % PT - Total Power Dissipation - W 3.5 TOTAL POWER DISSIPATION vs. CASE TEMPERATURE 6 Pulsed 6 VGS=20V 10V 4 VGS=4V 2 0 1 2 VDS - Drain to Source Voltage - V 3 µPA1572B TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 10 000 1 000 Rth (CH-A) 4Circuits 3Circuits 2Circuits 1Circuit 100 10 1.0 For Each Circuit, Single Pulse 0.1 100 µ 1m 10 m 100 m 1 10 100 1 000 10 VDS=10V Pulsed TA=-25°C 25°C 75°C 125°C 1.0 0.1 0.01 0.1 1.0 10 RDS(on) - Drain to Source On-State Resistance - Ω ID- Drain Current - A 2.0 Pulsed 1.0 VGS=4V VGS=10V 0 0.1 1.0 ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 1.5 Pulsed I D= 2 A 1A 0.4 A 1.0 0.5 0 10 20 VGS - Gate to Source Voltage - V GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 10 VGS(off) - Gate to Source Cutoff Voltage - V yfs - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT RDS(on) - Drain to Source On-State Resistance - Ω PW - Pulse Width - s VDS = 10 V ID = 1 mA 2 1 0 − 50 0 50 100 150 TCH - Channel Temperature - °C 5 SOURCE TO DRAIN DIODE FORWARD VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 0.8 0.6 VGS=4V 0.4 VGS=10V 0.2 Pulsed VGS=2V 1.0 VGS=0 0.1 ID = 1A 0 100 50 0 150 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE Ciss Coss Crss 10 1.0 0.1 1 10 td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF SWITCHING CHARACTERISTICS 1 000 VGS = 0 f = 1 MHz 100 td(off) tr 1.0 0.1 1.0 10 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 16 80 VDS - Drain to Source Voltage - V trr - Reverse Recovery time - ns VDD =30V VGS =10V RG =10 Ω ID - Drain Current - A di/dt =50A/ µ s VGS = 0 ID=2A 14 12 60 VDD=12V 30V 48V VGS 10 8 40 6 4 20 2 VDS 0 1.0 ID - Drain Current - A 6 td(on) 10 100 100 10 0.1 tf 100 VDS - Drain to Source Voltage - V REVERSE RECOVERY TIME vs. DRAIN CURRENT 1 000 1.5 1.0 VSD - Source to Drain Voltage - V TCH - Channel Temperature -°C 1 000 0.5 10 0 2 4 6 QG - Gate Charge - nC 8 VGS - Gate to Source Voltage - V 0 − 50 10 ISD - Diode Forward Current - A RDS(on) - Drain to Source On-State Resistance - Ω µPA1572B µPA1572B SINGLE AVALANCHE ENERGY DERATING FACTOR SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD 100 1.0 Energy Derating Factor - % IAS - Single Avalanche Current - A 10 IAS=1A EAS =0. 1m J 0.1 0.1 VDD = 30 V VGS = 20 V → 0 RG = 25Ω Starting TCH=25°C 10 µ 100µ 1m 10 m L - Inductive Load - H VDD = 30 V RG = 25 Ω VGS = 20 V → 0 IAS ≤ 1.0A 80 60 40 20 0 25 50 75 100 125 150 Starting TCH - Starting Channel Temperature - °C REFERENCE Document Name Document No. NEC semiconductor device reliability/quality control system TEI-1202 Quality grade on NEC semiconductor devices IEI-1209 Semiconductor device mounting technology manual C10535E Semiconductor device package manual C10943X Guide to quality assurance for semiconductor devices MEI-1202 Semiconductor selection guide X10679E Power MOS FET features and application switching power supply TEA-1034 Application circuits using Power MOS FET TEA-1035 Safe operating area of Power MOS FET TEA-1037 7 µPA1572B No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard : Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific : Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5