NEC UPA1853GR-9JG

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1853
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
PACKAGE DRAWING (Unit : mm)
The µPA1853 is a switching device which can be
driven directly by a 4-V power source.
The µPA1853 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
8
5
1
2, 3
4
5
6, 7
8
FEATURES
1
ORDERING INFORMATION
PACKAGE
µPA1853GR-9JG
Power TSSOP8
Drain to Source Voltage
VDSS
–30
V
Gate to Source Voltage
VGSS
–20/+5
V
Drain Current (DC)
ID(DC)
# 2.5
# 10
A
PT
2.0
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
–55 to +150
°C
Total Power Dissipation
Note2
ID(pulse)
0.6 +0.15
–0.1
6.4 ±0.2
4.4 ±0.1
1.0 ±0.2
0.1
0.8 MAX.
0.27 +0.03
–0.08
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Note1
0.5
4
0.65
Drain Current (pulse)
0.25
0.1±0.05
3.15 ±0.15
3.0 ±0.1
PART NUMBER
1.2 MAX.
1.0±0.05
3° +5°
–3°
• Can be driven by a 4-V power source
• Low on-state resistance
RDS(on)1 = 85 mΩ MAX. (VGS = –10 V, ID = –1.5 A)
RDS(on)2 = 152 mΩ MAX. (VGS = –4.5 V, ID = –1.5 A)
RDS(on)3 = 180 mΩ MAX. (VGS = –4.0 V, ID = –1.5 A)
0.145 ±0.055
★
★
:Drain1
:Source1
:Gate1
:Gate2
:Source2
:Drain2
0.10 M
EQUIVALENT CIRCUIT
Drain1
Drain2
A
Body
Diode
Gate1
Gate
Protection
Diode
Source1
Body
Diode
Gate2
Gate
Protection
Diode
Source2
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 %
2
2. Mounted on ceramic substrate of 5000 mm x 1.1 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D12968EJ1V0DS00 (1st edition)
Date Published October 1999 NS CP(K)
Printed in Japan
The mark ★ shows major revised points.
©
1997, 1999
µ PA1853
★ ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Drain Cut-off Current
I DSS
VDS = –30 V, VGS = 0 V
–10
µA
Gate Leakage Current
IGSS
VGS = # 20 V, VDS = 0 V
# 10
µA
VGS(off)
VDS = –10 V, ID = –1 mA
–1.0
–1.7
–2.5
V
| yfs |
VDS = –10 V, ID = –1.5 A
1
3.6
RDS(on)1
VGS = –10 V, ID = –1.5 A
64
85
mΩ
RDS(on)2
VGS = –4.5 V, ID = –1.5 A
114
152
mΩ
RDS(on)3
VGS = –4.0 V, ID = –1.5 A
135
180
mΩ
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
S
Input Capacitance
Ciss
VDS = –10 V
520
pF
Output Capacitance
Coss
VGS = 0 V
200
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
82
pF
Turn-on Delay Time
td(on)
VDD = –10 V
60
ns
tr
ID = –1.5 A
220
ns
VGS(on) = –10 V
800
ns
RG = 10 Ω
620
ns
Rise Time
Turn-off Delay Time
td(off)
Fall Time
tf
Total Gate Charge
QG
VDD = –24 V
12
nC
Gate to Source Charge
QGS
ID = –2.5 A
2
nC
Gate to Drain Charge
QGD
VGS = –10 V
3
nC
0.73
V
Diode Forward Voltage
VF(S-D)
IF = 2.5 A, VGS = 0 V
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
D.U.T.
RL
RG
RG = 10 Ω
PG.
VGS
VGS
Wave Form
0
PG.
90 %
90 %
ID
VGS
0
ID
10 %
0 10 %
Wave Form
τ
τ = 1µ s
Duty Cycle ≤ 1 %
tr
td(on)
ton
RL
50 Ω
VDD
90 %
VDD
ID
2
VGS(on)
10 %
IG = 2 mA
td(off)
tf
toff
Data Sheet D12968EJ1V0DS00
µ PA1853
★ TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
FORWARD BIAS SAFE OPERATING AREA
−100
80
ID - Drain Current - A
dT - Derating Factor - %
100
60
40
0
30
60
90
120
TA - Ambient Temperature - ˚C
V
(@
PW
ID (DC)
−0.1
−100.0
VDS = −10 V
−1
ID - Drain Current - A
− 4.5 V
−6
−4.0 V
−4
−10.0
TRANSFER CHARACTERISTICS
−10
VGS = −10 V
−1.0
VDS - Drain to Source Voltage - V
Pulsed
−8
ms
10
0m
s
DC
−0.1
150
=1
10
ms
−1
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
−10
−0.1
TA = 125 ˚C
75 ˚C
−0.01
25 ˚C
−25 ˚C
−0.001
−2
−0.0001
0
−0.2
0
−0.6
−0.4
−0.8
−1.0
−2.0
−3.0
VGS - Gate to Source Voltage - V
0
−1
VDS - Drain to Source Voltage - V
−2
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
VDS = −10 V
ID = −1 mA
−1.8
−1.6
−1.4
−1.2
−1
−50
0
50
150
100
−4.0
FORWARD TRANSFER ADMMITTANCE vs.
DRAIN CURRENT
100
| yfs | - Forward Transfer Admittance - S
VGS(off) - Gate to Source Cut-off Voltage - V
ID (pulse)
) L −10
on
=
S(
RD GS
Single Pulse
Mounted on Ceramic
2
Substrate of 5000mm x 1.1mm
−0.01 PD(FET1) : PD(FET2) = 1:1
20
ID - Drain Current - A
d
ite V)
im
−10
VDS = −10 V
10
TA = −25 ˚C
25 ˚C
75 ˚C
125 ˚C
1
0.1
−0.1
Tch - Channel Temperature - ˚C
Data Sheet D12968EJ1V0DS00
−1
−10
−100
ID - Drain Current - A
3
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
RDS(on) - Drain to Source On-State Resistance - mΩ
RDS(on) - Drain to Source On-state Resistance - mΩ
µ PA1853
250
VGS = −4.0 V
200
TA = 125˚C
75˚C
150
25˚C
−25˚C
100
50
−1
−0.1
−10
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
300
VGS = −4.5 V
250
200
150
TA = 125˚C
75˚C
100
−25˚C
25˚C
50
0
−0.1
−1
VGS = −10 V
120
TA = 125˚C
100
75˚C
80
25˚C
60
−25˚C
40
20
−0.1
−1
−10
−100
RDS (on) - Drain to Source On-state Resistance - mΩ
RDS(on) - Drain to Source On-state Resistance - mΩ
140
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
200
ID = −1.5 A
VGS = −4.0 V
150
−4.5 V
100
0
−50
1000
Ciss, Coss, Crss - Capacitance - pF
RDS (on) - Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
ID = −1.5 A
250
200
150
100
50
0
0
−5
−10
150
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
f = 1 MHz
Coss
100
Crss
−20
VGS - Gate to Source Voltage - V
4
0
50
100
Tch - Channel Temperature -˚C
Ciss
10
−1
−15
−10 V
50
ID - Drain Current - A
300
−100
ID - Drain Current - A
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
−10
Data Sheet D12968EJ1V0DS00
−10
VDS - Drain to Source Voltage - V
−100
µ PA1853
SWITCHING CHARACTERISTICS
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
10
1000
IF - Source to Drain Current - A
td(on), tr, td(off), tf - Swwitchig Time - ns
10000 VDD = −10V
VGS(on) = −10V
RG = 10Ω
tf
td(off)
tr
100
td(on)
10
−0.1
−1
ID - Drain Current - A
VGS = 0 V
1
0.1
0.01
0.001
0.0001
0.4
−10
0.6
0.8
1
1.2
VF(S-D) - Source to Drain Voltage - V
DYNAMIC INPUT CHARACTERISTICS
ID = -2.5 A
−8
VDD = -24V
−6
−4
−2
0
0
2
4
6
8
10
12
QG - Gate Charge - nC
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
rth(t) - Transient Thermal Resistance - ˚C/W
VGS - Gate to Source Voltage - V
−10
100
62.5˚C/W
10
1
0.1
1m
Mounted on Ceramic Substrate
of 5000mm2 x 1.1mm
Single Pulse
PD(FET1) : PD(FET2) = 1:1
10m
100m
1
10
100
1000
PW - Pulse Width - S
Data Sheet D12968EJ1V0DS00
5
µ PA1853
[MEMO]
6
Data Sheet D12968EJ1V0DS00
µ PA1853
[MEMO]
Data Sheet D12968EJ1V0DS00
7
µ PA1853
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
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the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8