DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC1658G LOW NOISE, HIGH FREQUENCY Si MMIC AMPLIFIER DESCRIPTION The µPC1658G is a silicon monolithic integrated circuit designed as amplifier for high frequency system applications. Bandwidth and output power level can be determined according to external resistor constants of negative feedback and final stage collector. This IC is available in 8-pin plastic SOP. This IC is manufactured using NEC’s 10 GHz fT NESATTM II silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability. FEATURES : NF ≤ 3 dB • Low noise figure • Due to the external negative feedback circuit, the power gain can be adjustable by selecting appropriate resistance constants. : GP ≥ 40 dB @ Without negative feedback resistor : GP ≥ 18 dB @ With negative feedback resistor • Wideband response : f3dB = 1.0 GHz @ GP = 18 dB • External resistor can vary the collector current of the final transistor in the IC to adjust the saturated output level. APPLICATIONS • IF buffer amplifier of high frequency system • Measurement equipment ORDERING INFORMATION Part Number µPC1658G-E1 Package Marking 8-pin plastic SOP (225 mil) 1658 Supplying Form Embossed tape 12 mm wide. 1 pin is tape pull-out direction. Qty 2.5 kp/reel. Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: µPC1658G) Caution TO-99 CAN package (µPC1658A) and 8-pin plastic DIP package (µPC1658C) products are discontinued. Caution Electro-static sensitive devices The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. P11120EJ3V0DS00 (3rd edition) Date Published September 1999 N CP(K) Printed in Japan The mark shows major revised points. © 1996, 1999 µPC1658G PIN CONNECTIONS (Top View) 8 1 7 2 6 3 Pin No. Pin Name 1 GND 2 Test Point 3 Output 4 VCC 5 Test Point 6 Input 7 Bypass 8 Bypass 5 4 PIN EXPLANATION 2 Pin No. Pin Name Function and Applications 1 GND Ground pin. This pin should be connected to system ground with minimum inductance. Ground pattern on the board should be formed as possible. All the ground pins must be connected together with wide ground pattern to decrease impedance difference. 2 Test Point Test Point pin. The collector current of Q2 and Q3 can be varied by connecting an appropriate external resistance between this pin and GND or by shorting this pin to GND. By increasing the collector current of Q3, the output level improves and the IC can operate as a lowdistortion amplifier. 3 Output Signal output pin. This pin must be coupled to signal source with capacitor for DC cut. 4 VCC Power supply pin. This pin should be externally equipped with bypass capacitor to minimize its impedance. 5 Test Point By connecting this pin to the power supply through an appropriate external resistance or by shorting this pin directly to the power supply, the gain can be adjustable (when using pin 2, short the pin 5 to the power supply). 6 Input Signal input pin. Through negative feedback from output pin with an external circuit, the IC operates as a wideband amplifier. 7 8 Bypass Emitter bypass pins of Q1. Bypass these pins to GND with a capacitor. Data Sheet P11120EJ3V0DS00 Internal Equivalent Circuit 4 VCC R3 R1 5 Test point R4 Q2 Q1 Input 6 Q3 3 Output R7 Bypass 7 2 Test point Bypass 8 R2 R5 R6 R8 1 GND µPC1658G ABSOLUTE MAXIMUM RATINGS Parameter Symbol Conditions Rating Unit Supply Voltage VCC TA = +25 °C 12 V Output Transistor Current IQ3 TA = +25 °C 40 mA Power Dissipation PD Mounted on double copper clad 50 × 50 × 1.6 mm epoxy glass PWB (TA = +70 °C) 280 mW Operating Ambient Temperature TA –40 to +75 °C Storage Temperature Tstg –55 to +150 °C ELECTRICAL CHARACTERISTICS (TA = +25 °C, VCC = 10.0 V, ZS = ZL = 50 Ω, Test circuit 1) Parameter Symbol Conditions MIN. TYP. MAX. Unit Circuit Current ICC No signal 9 − 18 mA Power Gain 1 GP1 f = 10 MHz 37 41 45 dB Power Gain 2 GP2 f = 100 MHz 28 31 34 dB Power Gain 3 GP3 f = 500 MHz 14 17 20 dB Noise Figure 1 NF1 f = 100 MHz − 1.5 2.5 dB Noise Figure 2 NF2 f = 500 MHz − 2.0 3.0 dB TEST SET-UP Power Supply 0.01 µ F Spectrum Analyzer or Network Analyzer Signal Generator OUTPUT INPUT Test Circuit 1 to 3 ZL = 50 Ω ZS = 50 Ω Data Sheet P11120EJ3V0DS00 3 µPC1658G TEST CIRCUITS TEST CIRCUIT 1 (Low-noise amplifier) Input 0.1 µ F 0.01 µ F 8 7 6 5 1 2 3 4 0.01 µ F VCC 0.01 µ F Output TEST CIRCUIT 2 (Wideband low-noise amplifier) Input 0.01 µ F 0.1 µ F 8 7 6 5 RF 1 2 3 VCC 4 0.01 µ F 0.01 µ F 0.01 µ F Output TEST CIRCUIT 3 (Wideband low-noise amplifier with improved output level) Input 0.01 µ F 0.1 µ F 8 7 6 5 220 Ω 1 180 Ω 2 3 4 0.01 µ F 0.01 µ F Output 4 Data Sheet P11120EJ3V0DS00 VCC 0.01 µF µPC1658G ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD µ PC1658G 1 C4 R1 OUT GND C1 IN C2 VCC C3 Notes 1. 50 × 50 × 0.4 mm double sided copper clad polyimide board. 2. Back side: GND pattern 3. Solder plated on pattern 4. : Through holes COMPONENT LIST Value C1 to C3 C4 R1 0.01 µF Remarks Necessary to all the test circuits 0.1 µF Note Open 180 Ω In the case of Low-noise Amplifier In the case of Wideband Low-noise Amplifier with improved output level Note In the case of Low-noise Amplifier, R1 is not mounted. Data Sheet P11120EJ3V0DS00 5 µPC1658G TYPICAL CHARACTERISTICS (TA = +25 °C, unless otherwise specified) POWER DISSIPATION vs. OPERATING AMBIENT TEMPERATURE CIRCUIT CURRENT vs. SUPPLY VOLTAGE 50 Circuit Current ICC (mA) Power Dissipation PD (mW) 800 600 400 200 40 Test circuit 3 30 20 10 Test circuit 1 and 2 0 –50 0 0 +50 +100 +150 Operating Ambient Temperature TA (°C) INSERTION POWER GAIN AND NOISE FIGURE vs. FREQUENCY VCC = 10 V Test Circuit 1 12 GP 30 10 8 6 4 10 0 10 20 Insertion Power Gain GP (dB) 40 20 40 30 RF = 470 Ω 10 0 10 0 25 Test Circuit 3 VCC = 8 V GP 15 VCC = 4 V 10 VCC = 6 V VCC = 4 V 5 NF VCC = 8 V 0 10 20 50 100 200 500 1 000 2 000 Frequency f (MHz) Output Power of Each Tone PO (each) (dBm) Third Order Intermodulation Distortion IM3 (dBm) NOISE FIGURE AND INSERTION POWER GAIN vs. FREQUENCY VCC = 6 V RF = 220 Ω 20 2 50 100 200 500 1 000 Frequency f (MHz) 20 VCC = 10 V Test Circuit 2 RF = ∞ Noise Figure NF (dB) Insertion Power Gain GP (dB) 6 8 10 Supply Voltage VCC (V) 50 NF Noise Figure NF (dB) Insertion Power Gain GP (dB) 4 INSERTION POWER GAIN vs. FREQUENCY 50 6 2 +40 20 50 100 200 500 1 000 2 000 Frequency f (MHz) OUTPUT POWER OF EACH TONE AND THIRD ORDER INTERMODULATION DISTORTION vs. INPUT POWER OF EACH TONE Test Circuit 3 f1 = 500 MHz +20 f2 = 501 MHz 0 VCC = 8 V PO (each) –20 VCC = 4 V –40 –60 VCC = 6 V IM3 VCC = 8 V VCC = 6 V –80 –100 –60 Data Sheet P11120EJ3V0DS00 VCC = 4 V +10 –50 –40 –30 –20 –10 0 Input Power of Each Tone Pin (each) (dBm) µPC1658G PACKAGE DIMENSIONS 8 PIN PLASTIC SOP (225 mil) (Unit: mm) 8 5 detail of lead end P 4 1 A H F I G J S B C E D M L N K S M NOTE ITEM Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition. Data Sheet P11120EJ3V0DS00 MILLIMETERS A 5.2±0.2 B 0.85 MAX. C 1.27 (T.P.) D 0.42 +0.08 −0.07 E F 0.1±0.1 1.57±0.2 G 1.49 H 6.5±0.3 I 4.4±0.15 J 1.1±0.2 K 0.17 +0.08 −0.07 L M 0.6±0.2 0.12 N 0.10 P +7° 3° −3° 7 µPC1658G NOTES ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation). All the ground pins must be connected together with wide ground pattern to decrease impedance difference. (3) Because the components will operate at high frequencies, apply chip capacitors and chip resistors with low parasitic inductance. (4) The DC capacitor must be attached to input pin and output pin. (5) The bypass capacitor should be attached to VCC line. (6) In case of improved output level type application circuit, observe precaution not to exceed the power dissipation rating, especially in VCC = 9 V or over. RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your NEC sales representative. Soldering Method Soldering Conditions Recommended Condition Symbol Infrared Reflow Package peak temperature: 235 °C or below Time: 30 seconds or less (at 210 °C) Note Count: 3, Exposure limit: None IR35-00-3 VPS Package peak temperature: 215 °C or below Time: 40 seconds or less (at 200 °C) Note Count: 3, Exposure limit: None VP15-00-3 Wave Soldering Soldering bath temperature: 260 °C or below Time: 10 seconds or less Note Count: 1, Exposure limit: None WS60-00-1 Partial Heating Pin temperature: 300 °C Time: 3 seconds or less (per side of device) Note Exposure limit: None – Note After opening the dry pack, keep it in a place below 25 °C and 65 % RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E). 8 Data Sheet P11120EJ3V0DS00 µPC1658G [MEMO] Data Sheet P11120EJ3V0DS00 9 µPC1658G [MEMO] 10 Data Sheet P11120EJ3V0DS00 µPC1658G [MEMO] Data Sheet P11120EJ3V0DS00 11 µPC1658G NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation. • The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. • NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. • Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. 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Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. M7 98. 8