DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC1679G 5 V-BIAS, +15.5 dBm OUTPUT, 1.8 GHz WIDEBAND Si MMIC AMPLIFIER DESCRIPTION The µPC1679G is a silicon monolithic integrated circuit designed as medium output power amplifier for high frequency system applications. Due to +13 dBm TYP. output at 1 GHz, this IC is recommendable for transmitter stage amplifier of L Band wireless communication systems. This IC is packaged in 8-pin plastic SOP. This IC is manufactured using NEC’s 20 GHz fT NESATTMIV silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability. FEATURES • Supply voltage : VCC = 4.5 to 5.5 V • Saturated output power : PO(sat) = +15.5 dBm TYP. @ f = 500 MHz with external inductor • Wideband response : fu = 1.8 GHz TYP. @ 3 dB bandwidth • Isolation : ISL = 34 dB TYP. @ f = 500 MHz • Power Gain : GP = 21.5 dB TYP. @ f = 500 MHz ORDERING INFORMATION Part Number µPC1679G-E1 Package Marking 8-pin plastic SOP (225 mil) 1679 µPC1679G-E2 Remark Supplying Form Embossed tape 12 mm wide. 1 pin is tape pull-out direction. Qty 2.5 kp/reel. Embossed tape 12 mm wide. 1 pin is tape roll-in direction. Qty 2.5 kp/reel. To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: µPC1679G) Caution Electro-static sensitive devices. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. P12434EJ4V0DS00 (4th edition) Date Published September 1999 N CP(K) Printed in Japan The mark shows major revision points. © 1994, 1999 µPC1679G EQUIVALENT CIRCUIT PIN CONNECTIONS (Top View) 8 VCC 5 OUT INPUT 1 8 VCC GND 2 7 GND GND 3 6 GND GND 4 5 OUTPUT IN 1 6 7 2 3 4 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Conditions Rating Unit 6 V Supply Voltage VCC TA = +25 °C, pin 5, pin 8 Input Power Pin TA = +25 °C +10 dBm Power Dissipation PD Mounted on double copper clad 50 × 50 × 1.6 mm epoxy glass PWB (TA = +85 °C) 360 mW Operating Ambient Temperature TA −45 to +85 °C Storage Temperature Tstg −55 to +150 °C RECOMMENDED OPERATING RANGE Parameter Symbol MIN. TYP. MAX. Unit Supply Voltage VCC 4.5 5.0 5.5 V Operating Ambient Temperature TA −45 +25 +85 °C Notice The same voltage should be applied to pin 5 and 8 ELECTRICAL CHARACTERISTICS (TA = +25 °C, VCC = Vout = 5.0 V, ZS = ZL = 50 Ω) Parameter Conditions MIN. TYP. MAX. Unit 32 40 49 mA Circuit Current ICC No signal Power Gain GP f = 500 MHz 19.5 21.5 23.5 dB Noise Figure NF f = 500 MHz − 6.0 8.0 dB 3 dB down below the gain at 0.1 GHz 1.5 1.8 − GHz Upper Limit Operating Frequency 2 Symbol fu Isolation ISL f = 500 MHz 29 34 − dB Input Return Loss RLin f = 500 MHz 9 12 − dB Output Return Loss RLout f = 500 MHz 1 3 − dB Saturated Output Power PO(sat) f = 500 MHz, Pin = +3 dBm +13.5 +15.5 − dBm Data Sheet P12434EJ4V0DS00 µPC1679G TEST CIRCUIT VCC 1 800 pF C3 L 8 50 Ω C2 C1 1 IN L: 20.5 T, 2 mm I.D., φ 0.25 UEW (about 300 nH) 5 50 Ω OUT 1 800 pF 1 800 pF 2, 3, 4, 6, 7 INDUCTOR FOR THE OUTPUT PIN The internal output transistor of this IC consumes 30 mA, to output medium power. To supply current for output transistor, connect an inductor between the VCC pin (pin 8) and output pin (pin 5). Select large value inductance, as listed above. The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port impedance higher to get enough gain. In this case, large inductance and Q is suitable. CAPACITORS FOR THE VCC, INPUT AND OUTPUT PINS Capacitors of 1 800 pF are recommendable as the bypass capacitor for the VCC pin and the coupling capacitors for the input and output pins. The bypass capacitor connected to the VCC pin is used to minimize ground impedance of VCC pin. So, stable bias can be supplied against VCC fluctuation. The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 Ω load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC. To obtain a flat gain from 100 MHz upwards, 1 800 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors are determined by equation, C = 1/(2 πRfc). Data Sheet P12434EJ4V0DS00 3 µPC1679G TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25 °C) CIRCUIT CURRENT vs. OPERATATING AMBIENT TEMPERATURE CIRCUIT CURRENT vs. SUPPLY VOLTAGE 60 60 No Signal 50 Circuit Current ICC (mA) Circuit Current ICC (mA) 50 40 30 20 10 0 No Signal VCC = 5.0 V 40 30 20 10 0 1 2 3 4 5 0 –60 –40 –20 6 Supply Voltage VCC (V) 6 5 4 INSERTION POWER GAIN vs. FREQUENCY 25 VCC = 5.5 V VCC = 5.0 V Insertion Power Gain GP (dB) 7 Insertion Power Gain GP (dB) Noise Figure NF (dB) 8 25 20 GP VCC = 5.0 V VCC = 4.5 V 15 10 VCC = 5.5 V 5 NF 0 0.01 0.03 VCC = 5.0 V 0.1 TA = +25 °C TA = +85 °C 15 10 5 VCC = 4.5 V 0.3 1.0 0 0.01 3.0 0.03 0.1 0.3 1.0 3.0 Frequency f (GHz) INPUT RETURN LOSS AND OUTPUT RETURN LOSS vs. FREQUENCY ISOLATION vs. FREQUENCY 0 +10 VCC = 5.0 V Input Return Loss RLin (dB) Output Return Loss RLout (dB) VCC = 5.0 V –10 Isolation ISL (dB) TA = –45 °C 20 Frequency f (GHz) –20 –30 –40 –50 0.01 0.03 0.1 0.3 1.0 3.0 0 RLout –10 RLin –20 –30 –40 0.01 Frequency f (GHz) 4 +20 +40 +60 +80 +100 Operating Ambient Temperature TA (°C) NOISE FIGURE AND INSERTION POWER GAIN vs. FREQUENCY 9 0 Data Sheet P12434EJ4V0DS00 0.03 0.1 0.3 Frequency f (GHz) 1.0 3.0 µPC1679G OUTPUT POWER vs. INPUT POWER OUTPUT POWER vs. INPUT POWER +25 +25 f = 500 MHz VCC = 5.0 V +20 Output Power Pout (dBm) Output Power Pout (dBm) f = 500 MHz VCC = 5.5 V VCC = 5.0 V +15 VCC = 4.5 V +10 +5 0 –20 –15 –10 –5 0 +5 +20 TA = –45 °C +10 +5 –15 –10 SATURATED OUTPUT POWER vs. FREQUENCY +25 Pin = +3 dBm VCC = 5.5 V +15 VCC = 5.0 V VCC = 4.5 V +10 +5 0 0.01 0.03 0.1 0.3 –5 0 +5 +10 Input Power Pin (dBm) 1.0 3.0 THIRD ORDER INTERMODULATION DISTORTION vs. OUTPUT POWER OF EACH TONE –60 Third Order Intermodulation Distortion IM3 (dBc) Saturated Output Power PO(sat) (dBm) Input Power Pin (dBm) +20 TA = +85 °C +15 0 –20 +10 TA = +25 °C f1 = 500 MHz f2 = 502 MHz –50 VCC = 5.5 V –40 VCC = 5.0 V –30 –20 VCC = 4.5 V –10 0 –5 Frequency f (GHz) 0 +5 +10 +15 Output Power of Each Tone PO(each) (dBm) Data Sheet P12434EJ4V0DS00 5 µPC1679G S-PARAMETER (TA = +25°C, VCC = Vout = 5.0 V) S11-FREQUENCY 3.0 G 1.0 G 0.1 G 2.0 G S22-FREQUENCY 3.0 G 0.1 G 0.5 G 2.0 G 1.0 G 6 Data Sheet P12434EJ4V0DS00 µPC1679G TYPICAL S-PARAMETER VALUES µ PC1679G VCC = Vout = 5.0 V, ICC = 40 mA FREQUENCY S11 S21 S12 S22 K MHz MAG. ANG. MAG. ANG. MAG. ANG. MAG. ANG. 100.0000 0.133 177.2 11.167 −4.7 0.024 −4.9 0.589 −3.9 1.40 200.0000 0.154 171.2 11.585 −9.8 0.022 −10.3 0.620 −9.7 1.41 300.0000 0.184 159.6 12.121 −16.1 0.018 −3.0 0.648 −17.3 1.51 400.0000 0.217 147.3 12.690 −23.9 0.015 4.9 0.669 −25.9 1.63 500.0000 0.247 132.4 13.210 −32.2 0.015 20.0 0.681 −35.1 1.42 600.0000 0.279 117.7 13.509 −40.9 0.017 35.5 0.680 −44.3 1.15 700.0000 0.307 102.8 13.902 −51.0 0.021 42.6 0.674 −53.6 0.88 800.0000 0.333 88.3 13.966 −59.8 0.026 44.8 0.659 −62.0 0.71 900.0000 0.342 76.4 13.895 −69.5 0.027 42.5 0.628 −70.6 0.72 1000.0000 0.412 60.4 14.401 −78.5 0.033 52.0 0.646 −75.4 0.48 1100.0000 0.419 46.1 14.244 −87.9 0.037 46.1 0.636 −83.6 0.46 1200.0000 0.434 31.7 14.249 −97.3 0.041 42.5 0.635 −90.1 0.43 1300.0000 0.450 18.1 14.096 −106.9 0.043 41.8 0.640 −97.8 0.41 1400.0000 0.461 3.2 13.945 −116.9 0.047 35.8 0.655 −105.0 0.39 1500.0000 0.481 −12.2 13.888 −125.9 0.051 34.1 0.664 −112.7 0.39 1600.0000 0.486 −27.2 13.645 −136.5 0.053 30.5 0.691 −120.6 0.39 1700.0000 0.487 −43.7 13.460 −147.3 0.053 27.3 0.707 −129.2 0.42 1800.0000 0.486 −61.2 13.043 −157.9 0.056 21.6 0.742 −138.5 0.44 1900.0000 0.479 −78.4 12.509 −170.0 0.058 17.7 0.771 −147.7 0.48 2000.0000 0.469 −95.6 11.678 179.0 0.057 13.6 0.794 −158.3 0.53 2100.0000 0.467 −113.5 10.720 168.4 0.057 9.9 0.819 −169.0 0.59 2200.0000 0.454 −130.9 9.763 158.2 0.056 3.5 0.840 179.9 0.63 2300.0000 0.450 −148.4 8.754 150.0 0.054 −1.4 0.846 168.7 0.71 2400.0000 0.449 −165.0 7.849 142.4 0.050 −6.4 0.852 157.1 0.78 2500.0000 0.443 179.3 7.022 135.4 0.045 −9.9 0.829 145.9 0.90 2600.0000 0.441 163.8 6.289 130.2 0.037 −13.3 0.790 133.6 1.11 2700.0000 0.430 149.9 5.800 126.1 0.029 −11.1 0.733 124.7 1.49 2800.0000 0.426 139.0 5.277 121.8 0.027 −1.1 0.697 117.2 1.75 2900.0000 0.429 128.2 5.108 116.7 0.027 6.1 0.672 110.0 1.84 3000.0000 0.432 118.6 4.894 114.0 0.025 15.9 0.635 103.2 2.02 3100.0000 0.419 110.7 4.541 107.4 0.028 31.2 0.598 98.0 2.05 Data Sheet P12434EJ4V0DS00 7 µPC1679G PACKAGE DIMENSIONS 8 PIN PLASTIC SOP (225 mil) (Unit: mm) 8 5 detail of lead end P 4 1 A H F I G J S B C E D M L M NOTE ITEM Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition. 8 N K Data Sheet P12434EJ4V0DS00 MILLIMETERS A 5.2±0.2 B 0.85 MAX. C 1.27 (T.P.) D 0.42 +0.08 −0.07 E F 0.1±0.1 1.57±0.2 G 1.49 H 6.5±0.3 I 4.4±0.15 J 1.1±0.2 K 0.17 +0.08 −0.07 L M 0.6±0.2 0.12 N 0.10 P +7° 3° −3° S µPC1679G NOTE ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation). All the ground pins must be connected together with wide ground pattern to decrease impedance difference. (3) The bypass capacitor should be attached to VCC line. (4) The inductor must be attached between VCC and output pins. The inductance value should be determined in accordance with desired frequency. (5) The DC cut capacitor must be attached to input pin. RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your NEC sales representative. Soldering Method Soldering Conditions Recommended Condition Symbol Infrared Reflow Package peak temperature: 235 °C or below Time: 30 seconds or less (at 210 °C) Note Count: 3, Exposure limit: None IR35-00-3 VPS Package peak temperature: 215 °C or below Time: 40 seconds or less (at 200 °C) Note Count: 3, Exposure limit: None VP15-00-3 Wave Soldering Soldering bath temperature: 260 °C or below Time: 10 seconds or less Note Count: 1, Exposure limit: None WS60-00-1 Partial Heating Pin temperature: 300 °C Time: 3 seconds or less (per side of device) Note Exposure limit: None – Note After opening the dry pack, keep it in a place below 25 °C and 65 % RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E). Data Sheet P12434EJ4V0DS00 9 µPC1679G [MEMO] 10 Data Sheet P12434EJ4V0DS00 µPC1679G [MEMO] Data Sheet P12434EJ4V0DS00 11 µPC1679G NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation. • The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. • NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. 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