NEC UPC1685G-E1

DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC1685G
GENERAL PURPOSE 5 V FREQUENCY DOWN-CONVERTER IC
DESCRIPTION
The µPC1685G is Silicon monolithic IC designed for UHF band receiver applications. This IC consists of double
balanced mixer, local oscillator, IF amplifier, and voltage regulator.
The package is 8-pin SOP suitable for high-density surface mount.
FEATURES
• UHF band operation
• Good capability of UHF-varactor diode due to balanced amplifier oscillator
• Supply voltage: 5 V
• Packaged in 8-pin SOP suitable for high-density mounting
APPLICATIONS
• Tuners for TV and VCR
• Receivers for UHF band
ORDERING INFORMATION
Part Number
µPC1685G-E1
Package
Package Style
8-pin plastic SOP (225 mil)
Embossed tape 12 mm wide.
Pin 1 indicates pull-out direction of tape.
Qty 2.5 kp/reel.
Remark To order evaluation samples, please contact your local NEC office. (Part number for sample order:
µPC1685G)
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P14483EJ2V0DS00 (2nd edition)
(Previous No. ID-2330)
Date Published October 1999 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1988, 1999
µPC1685G
INTERNAL BLOCK DIAGRAM
8
7
6
PIN CONFIGURATION (Top View)
5
1. OSC base (bypass)
IF Pre
1
8
2
7
3
6
4
5
2. OSC base (feedback)
Amp.
3. OSC collector (coupling)
OSC
Buffer
OSC
MIX
2
2
3
5. IF output (open collector)
6. GND
REG.
1
4. VCC
7. RF input1 (bypass)
8. RF input2
4
Data Sheet P14483EJ2V0DS00
µPC1685G
PIN EXPLANATION
Pin
No.
1
2
Symbol
OSC base
(bypass)
Function and Explanation
Internal oscillator consists in balance amplifier.
2 pin and 3 pin should be externally equiped
with tank resonater circuit in order to oscillate
with feedback loop.
OSC base
(feedback)
1 pin should be grounded through coupling
capacitor to 5 pF.
3
OSC
collector
(coupling)
3 pin is defined as open collector. This pin
should be coupled through resistor or chock coil
in order to adjust Q and be supplied voltage. In
case of abnormal oscillation, adjust its Q lower
to stabilize the operation.
4
VCC
Supply voltage pin for the IC.
5
IF output
IF output pin.
Equivalent Circuit
3
1
2
VCC
to OSC
buffer
amp.
VREF
VCC
This pin is assigned for the open collector
output with high impedance dependent on
external inductance.
5
VREF
6
GND
GND pin for the IC.
7
RF input 1
(bypass)
7 pin and 8 pin are inputs for mixer designed as
double balanced type.
Either pin can be assigned for input and another
for ground.
8
VCC
to IF
amp.
from
OSC
buffer
RF input 2
RF
input
Data Sheet P14483EJ2V0DS00
3
µPC1685G
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Conditions
Rating
Unit
6.0
V
250
mW
Supply Voltage
VCC
TA = +25 °C
Power Dissipation
PD
TA = +85 °C
Operating Ambient Temperature
TA
−40 to +85
°C
Storage Temperature
Tstg
−65 to +150
°C
Note
Note Mounted on 50 × 50 × 1.6-mm epoxy glass PWB, with copper patterning on both sides.
RECOMMENDED OPERATING RANGE
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Supply Voltage
VCC
4.5
5.0
5.5
V
Operating Ambient Temperature
TA
−40
+25
+85
°C
ELECTRICAL CHARACTERISTICS (VCC = 5 V, TA = +25 °C)
Parameter
Symbol
Test Conditions
Circuit Current 1
ICC1
No input signal
Note
Conversion Gain 1
CG1
fRF = 500 MHz, fIF = 50 MHz,
PRF = −40 dBm, POSC = −5 dBm
Note
TYP.
MAX.
Unit
21
31.5
40
mA
9.5
13.5
15.5
dB
Conversion Gain 2
CG2
fRF = 900 MHz, fIF = 50 MHz,
PRF = −40 dBm, POSC = −5 dBm Note
8
12
14
dB
Noise Figure 1
NF1
fRF = 500 MHz, fIF = 50 MHz,
POSC = −5 dBm
−
12
15
dB
Note
fRF = 900 MHz, fIF = 50 MHz,
POSC = −5 dBm
−
12.5
15.5
dB
Note
fRF = 500 MHz, fIF = 50 MHz,
PRF = 0 dBm, POSC = −5 dBm
−
−2
−
dBm
Note
fRF = 900 MHz, fIF = 50 MHz,
PRF = 0 dBm, POSC = −5 dBm
−
−2
−
dBm
Note
Noise Figure 2
Maximum Output Power 1
Maximum Output Power 2
NF2
PO(sat)1
PO(sat)2
Note By test circuit 1
4
MIN.
Data Sheet P14483EJ2V0DS00
µPC1685G
STANDARD CHARACTERISTICS (FOR REFERENCE) (VCC = 5 V, TA = +25 °C unless otherwise specified)
Parameter
Symbol
Test Conditions
Reference Values
Unit
Oscillation Frequency Stability
fstb
VCC = ±10 %, fOSC = 550 to 950 MHz
Note 1
±200
kHz
Oscillation Frequency Drift
fdrift
fOSC = 550 to 950 MHz, 30 min.
Note 1
150
kHz
Note 1
3.0
V
Oscillation Start Voltage
VOSC
fOSC = 550 to 950 MHz
1 % Cross-modulation Distortion 1
CM1
fRF = 500 MHz
Note 2, 3
86.5
dBµ
1 % Cross-modulation Distortion 2
CM2
fRF = 900 MHz
Note 2, 3
86
dBµ
Notes 1. By test circuit 2
2. By test circuit 1
3. fundes = fRF ±12 MHz, PRF = −31 dBm, fIF = 50 MHz, POSC = −5 dBm
AM: 100 kHz, 30 % Mod., S/I Ratio = 46 dBc, output 75 Ω open
Data Sheet P14483EJ2V0DS00
5
µPC1685G
TYPICAL CHARACTERISTICS (TA = +25 °C)
CIRCUIT CURRENT VS. SUPPLY VOLTAGE
No Input
Signal
Circuit Current ICC (mA)
50
40
30
20
10
0
1
2
3
4
5
6
Supply Voltage VCC (V)
NOISE FIGURE AND CONVERSION GAIN VS. INPUT FREQUENCY
16
25
10
8
6
4
Conversion Gain CG (dB)
Noise Figure NF (dB)
14
12
VCC = 5 V
fIF = 50 MHz
RF Input Terminal: No Tuned
Test Circuit 1
PRF = –40 dBm
POSC = –5 dBm
20
15
NF
10
CG
5
0
500
Input Frequency fRF (MHz)
6
Data Sheet P14483EJ2V0DS00
1 000
1 200
µPC1685G
CONVERSION GAIN VS. INPUT FREQUENCY
VCC = 5 V
fIF = 50 MHz
RF Input Terminal: Tuned
PRF = –40 dBm
POSC = –5 dBm
Conversion Gain CG (dB)
30
25
20
15
10
5
0
55
200
500
900
Input Frequency fRF (MHz)
1 % Cross-modulation Distortion CM (dBµ)
1 % CROSS-MODULATION DISTORTION VS. INPUT FREQUENCY
100
90
80
VCC = 5 V
fundes = fRF ±12 MHz
PRF = –31 dBm
fIF = 50 MHz
POSC = –5 dBm
AM: 100 kHz, 30 % Mod.
S/I Ratio = 46 dBc
Output Port: 75 Ω Open
70
60
0
500
1 000
1 200
Input Frequency fRF (MHz)
Data Sheet P14483EJ2V0DS00
7
µPC1685G
OUTPUT POWER VS. INPUT POWER
+30
Output Power Pout (dBm)
VCC = 5 V
fRF = 900 MHz
fIF = 50 MHz
POSC = –5 dBm
0
–40
Pout
–20
0
+40
Input Power Pin (dBm)
OSC-FREQUENCY STABILITY VS. OSC-FREQUENCY
Oscillation Frequency Stability Fstb (kHz)
+300
VCC ±10 %
VCC –10 %
0
VCC +10 %
–300
0
500
Oscillation Frequency fOSC (MHz)
8
Data Sheet P14483EJ2V0DS00
1 000
1 200
µPC1685G
TEST CIRCUIT 1
47 Ω
1 000 pF
150 nH
VCC
OSC
Input
5 pF
1 000 pF
4
3
2
1
5
6
7
8
10 µ H
1 000 pF
33 pF 1 µ H
8 pF
RF Input
1 000 pF
1 000 pF
4 pF
IF Output
TEST CIRCUIT 2
ZO = 200 Ω
= 20 mm
BT
47 kΩ
8 pF
47 Ω
4 pF
10 pF
HVU202
150 nH
0.5 pF
5 pF
VCC
1 000 pF
4
3
2
1
5
6
7
8
10 µ H
1 000 pF
33 pF 1 µ H
8 pF
1 000 pF
RF Input
1 000 pF
4 pF
IF Output
Data Sheet P14483EJ2V0DS00
9
µPC1685G
APPLICATION CIRCUIT EXAMPLE
ZO = 200 Ω
= 20 mm
BT
47 kΩ
8 pF
4 pF
10 pF
47 Ω
HVU202
0.5 pF
150 nH
VCC
5 pF
1 000 pF
4
3
2
1
5
6
7
8
10 µ H
1 000 pF
33 pF 1 µ H
8 pF
1 000 pF
4 pF
IF Output
10
Data Sheet P14483EJ2V0DS00
RF Input
µPC1685G
PACKAGE DIMENSIONS
8 PIN PLASTIC SOP (225 mil) (UNIT: mm)
8
5
detail of lead end
+7˚
3˚–3˚
4
1
5.2 ± 0.2
6.5 ± 0.3
1.57 ± 0.2
4.4 ± 0.15
1.49
0.85 MAX.
1.27
+0.08
0.42 –0.07
1.1 ± 0.2
0.6 ± 0.2
+0.08
0.17 –0.07
0.10
0.12 M
0.1 ± 0.1
NOTE
Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition.
Data Sheet P14483EJ2V0DS00
11
µPC1685G
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electro-static sensitive devices.
(2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation).
(3) Keep the track length of the ground pins as short as possible.
(4) Connect a bypass capacitor (example: 1 000 pF) to the VCC pin.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended conditions.
For soldering methods and
conditions other than those recommended below, contact your NEC sales representative.
Soldering Method
Soldering Conditions
Recommended Condition Symbol
Infrared Reflow
Package peak temperature: 235 °C or below
Time: 30 seconds or less (at 210 °C)
Note
Count: 3, Exposure limit: None
IR35-00-3
VPS
Package peak temperature: 215 °C or below
Time: 40 seconds or less (at 200 °C)
Note
Count: 3, Exposure limit: None
VP15-00-3
Wave Soldering
Soldering bath temperature: 260 °C or below
Time: 10 seconds or less
Note
Count: 1, Exposure limit: None
WS60-00-1
Partial Heating
Pin temperature: 300 °C
Time: 3 seconds or less (per side of device)
Note
Exposure limit: None
–
Note After opening the dry pack, keep it in a place below 25 °C and 65 % RH for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating).
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
12
Data Sheet P14483EJ2V0DS00
µPC1685G
[MEMO]
Data Sheet P14483EJ2V0DS00
13
µPC1685G
[MEMO]
14
Data Sheet P14483EJ2V0DS00
µPC1685G
[MEMO]
Data Sheet P14483EJ2V0DS00
15
µPC1685G
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• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
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M7 98. 8